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[RISCV] Remove unused ComplexPatterns. NFC

This commit is contained in:
Craig Topper 2021-05-06 12:17:37 -07:00
parent 2c6f23cea3
commit 0265102f2f
3 changed files with 0 additions and 25 deletions

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@ -1448,21 +1448,6 @@ bool RISCVDAGToDAGISel::selectRVVSimm5(SDValue N, unsigned Width,
return false;
}
bool RISCVDAGToDAGISel::selectRVVUimm5(SDValue N, unsigned Width,
SDValue &Imm) {
if (auto *C = dyn_cast<ConstantSDNode>(N)) {
int64_t ImmVal = C->getSExtValue();
if (!isUInt<5>(ImmVal))
return false;
Imm = CurDAG->getTargetConstant(ImmVal, SDLoc(N), Subtarget->getXLenVT());
return true;
}
return false;
}
// Merge an ADDI into the offset of a load/store instruction where possible.
// (load (addi base, off1), off2) -> (load base, off1+off2)
// (store val, (addi base, off1), off2) -> (store val, base, off1+off2)

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@ -74,11 +74,6 @@ public:
return selectRVVSimm5(N, Width, Imm);
}
bool selectRVVUimm5(SDValue N, unsigned Width, SDValue &Imm);
template <unsigned Width> bool selectRVVUimm5(SDValue N, SDValue &Imm) {
return selectRVVUimm5(N, Width, Imm);
}
void addVectorLoadStoreOperands(SDNode *Node, unsigned SEWImm,
const SDLoc &DL, unsigned CurOp,
bool IsMasked, bool IsStridedOrIndexed,

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@ -233,11 +233,6 @@ def sew16simm5 : ComplexPattern<XLenVT, 1, "selectRVVSimm5<16>", []>;
def sew32simm5 : ComplexPattern<XLenVT, 1, "selectRVVSimm5<32>", []>;
def sew64simm5 : ComplexPattern<XLenVT, 1, "selectRVVSimm5<64>", []>;
def sew8uimm5 : ComplexPattern<XLenVT, 1, "selectRVVUimm5<8>", []>;
def sew16uimm5 : ComplexPattern<XLenVT, 1, "selectRVVUimm5<16>", []>;
def sew32uimm5 : ComplexPattern<XLenVT, 1, "selectRVVUimm5<32>", []>;
def sew64uimm5 : ComplexPattern<XLenVT, 1, "selectRVVUimm5<64>", []>;
multiclass VPatBinaryVL_VV<SDNode vop,
string instruction_name,
ValueType result_type,