1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-22 02:33:06 +01:00

[NFC] fix trivial typos in documents and comments

"is is" -> "is", "if if" -> "if", "or or" -> "or"

llvm-svn: 329878
This commit is contained in:
Hiroshi Inoue 2018-04-12 05:53:20 +00:00
parent e6f9bc38ab
commit eee649c09f
11 changed files with 11 additions and 11 deletions

View File

@ -2269,7 +2269,7 @@ VGPR register initial state is defined in
> 1) wavefront lane.
========== ========================== ====== ==============================
The setting of registers is is done by GPU CP/ADC/SPI hardware as follows:
The setting of registers is done by GPU CP/ADC/SPI hardware as follows:
1. SGPRs before the Work-Group Ids are set by CP using the 16 User Data
registers.

View File

@ -365,7 +365,7 @@ abstract interface.
When used in the native Windows C++ exception handling implementation, this
intrinsic serves as a placeholder to delimit code before a catch handler is
outlined. When the handler is is outlined, this intrinsic will be replaced
outlined. When the handler is outlined, this intrinsic will be replaced
by instructions that retrieve the exception object pointer from the frame
allocation block.

View File

@ -2984,7 +2984,7 @@ Conceptually, ``LLVMContext`` provides isolation. Every LLVM entity
in-memory IR belongs to an ``LLVMContext``. Entities in different contexts
*cannot* interact with each other: ``Module``\ s in different contexts cannot be
linked together, ``Function``\ s cannot be added to ``Module``\ s in different
contexts, etc. What this means is that is is safe to compile on multiple
contexts, etc. What this means is that is safe to compile on multiple
threads simultaneously, as long as no two threads operate on entities within the
same context.

View File

@ -527,7 +527,7 @@ public:
///
/// If this loop contains the same llvm.loop metadata on each branch to the
/// header then the node is returned. If any latch instruction does not
/// contain llvm.loop or or if multiple latches contain different nodes then
/// contain llvm.loop or if multiple latches contain different nodes then
/// 0 is returned.
MDNode *getLoopID() const;
/// Set the llvm.loop loop id metadata for this loop.

View File

@ -321,7 +321,7 @@ namespace llvm {
/// Arrange for there to be a cast of V to Ty at IP, reusing an existing
/// cast if a suitable one exists, moving an existing cast if a suitable one
/// exists but isn't in the right place, or or creating a new one.
/// exists but isn't in the right place, or creating a new one.
Value *ReuseOrCreateCast(Value *V, Type *Ty,
Instruction::CastOps Op,
BasicBlock::iterator IP);

View File

@ -785,7 +785,7 @@ MachineBasicBlock*
LiveIntervals::intervalIsInOneMBB(const LiveInterval &LI) const {
// A local live range must be fully contained inside the block, meaning it is
// defined and killed at instructions, not at block boundaries. It is not
// live in or or out of any block.
// live in or out of any block.
//
// It is technically possible to have a PHI-defined live range identical to a
// single block, but we are going to return false in that case.

View File

@ -321,7 +321,7 @@ static Constant *ExtractConstantBytes(Constant *C, unsigned ByteStart,
if (ByteStart == 0 && ByteSize*8 == SrcBitSize)
return CE->getOperand(0);
// If extracting something completely in the input, if if the input is a
// If extracting something completely in the input, if the input is a
// multiple of 8 bits, recurse.
if ((SrcBitSize&7) == 0 && (ByteStart+ByteSize)*8 <= SrcBitSize)
return ExtractConstantBytes(CE->getOperand(0), ByteStart, ByteSize);

View File

@ -944,7 +944,7 @@ COFFObjectFile::getPE32PlusHeader(const pe32plus_header *&Res) const {
std::error_code
COFFObjectFile::getDataDirectory(uint32_t Index,
const data_directory *&Res) const {
// Error if if there's no data directory or the index is out of range.
// Error if there's no data directory or the index is out of range.
if (!DataDirectory) {
Res = nullptr;
return object_error::parse_failed;

View File

@ -1705,7 +1705,7 @@ bool NewGVN::isCycleFree(const Instruction *I) const {
if (ICS == ICS_Unknown) {
SCCFinder.Start(I);
auto &SCC = SCCFinder.getComponentFor(I);
// It's cycle free if it's size 1 or or the SCC is *only* phi nodes.
// It's cycle free if it's size 1 or the SCC is *only* phi nodes.
if (SCC.size() == 1)
InstCycleState.insert({I, ICS_CycleFree});
else {

View File

@ -137,7 +137,7 @@ define void @test_32bit_complexmask(i32 *%existing, i32 *%new) {
ret void
}
; Neither mask is is a contiguous set of 1s. BFI can't be used
; Neither mask is a contiguous set of 1s. BFI can't be used
define void @test_32bit_badmask(i32 *%existing, i32 *%new) {
; CHECK-LABEL: test_32bit_badmask:
; CHECK-NOT: bfi

View File

@ -2,7 +2,7 @@
; Checking gvn-hoist in case of indirect branches.
; Check that the bitcast is is not hoisted because it is after an indirect call
; Check that the bitcast is not hoisted because it is after an indirect call
; CHECK-LABEL: @foo
; CHECK-LABEL: l1.preheader:
; CHECK-NEXT: bitcast