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Commit Graph

192684 Commits

Author SHA1 Message Date
Jordan Rupprecht
00276e417e [NFC] Fix minor python issues.
* llvm-gisel-cov.py: extra `)` after print
* chunk-print-before-all.py: py2-only print method
2020-02-28 14:17:43 -08:00
Jay Foad
7622b45921 [AMDGPU] Remove dubious logic in bidirectional list scheduler
Summary:
pickNodeBidirectional tried to compare the best top candidate and the
best bottom candidate by examining TopCand.Reason and BotCand.Reason.
This is unsound because, after calling pickNodeFromQueue, Cand.Reason
does not reflect the most important reason why Cand was chosen. Rather
it reflects the most recent reason why it beat some other potential
candidate, which could have been for some low priority tie breaker
reason.

I have seen this cause problems where TopCand is a good candidate, but
because TopCand.Reason is ORDER (which is very low priority) it is
repeatedly ignored in favour of a mediocre BotCand. This is not how
bidirectional scheduling is supposed to work.

To fix this I changed the code to always compare TopCand and BotCand
directly, like the generic implementation of pickNodeBidirectional does.
This removes some uncommented AMDGPU-specific logic; if this logic turns
out to be important then perhaps it could be moved into an override of
tryCandidate instead.

Graphics shader benchmarking on gfx10 shows a lot more positive than
negative effects from this change.

Reviewers: arsenm, tstellar, rampitec, kzhuravl, vpykhtin, dstuttard, tpr, atrick, MatzeB

Subscribers: jvesely, wdng, nhaehnle, yaxunl, t-tye, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D68338
2020-02-28 21:35:34 +00:00
Francis Visoiu Mistrih
b4279d9528 [LTO][Legacy] Add new API to query Mach-O CPU (sub)type
Tools working with object files on Darwin (e.g. lipo) may need to know
properties like the CPU type and subtype of a bitcode file. The logic of
converting a triple to a Mach-O CPU_(SUB_)TYPE should be provided by
LLVM instead of relying on tools to re-implement it.

Differential Revision: https://reviews.llvm.org/D75067
2020-02-28 12:56:05 -08:00
Krzysztof Parzyszek
dc9c42a319 [Hexagon] Map dcfetch intrinsic to Y2_dcfetchbo, not Y2_dcfetch 2020-02-28 14:19:20 -06:00
David Green
4ef5c3bfa6 [DAGCombine] Fix alias analysis for unaligned accesses
The alias analysis in DAG Combine looks at the BaseAlign, the Offset and
the Size of two accesses, and determines if they are known to access
different parts of memory by the fact that they are different offsets
from inside that "alignment window". It does not seem to account for
accesses that are not a multiple of the size, and may overflow from one
alignment window into another.

For example in the test case we have a 19byte memset that is splits into
a 16 byte neon store and an unaligned 4 byte store with a 15 byte
offset. This 15byte offset (with a base align of 8) wraps around to the
next alignment windows. When compared to an access that is a 16byte
offset (of the same 4byte size and 8byte basealign), the two accesses
are said not to alias.

I've fixed this here by just ensuring that the offsets are a multiple of
the size, ensuring that they don't overlap by wrapping. Fixes PR45035,
which was exposed by the UseAA changes in the arm backend.

Differential Revision: https://reviews.llvm.org/D75238
2020-02-28 18:44:36 +00:00
Austin Kerbow
6f849d2fc0 [VectorCombine] Fix assert on compare extract index
Extract index could be a differnet integral type.

Differential Revision: https://reviews.llvm.org/D75327
2020-02-28 10:37:08 -08:00
Valery N Dmitriev
029949667a [SLP][NFC] Assert that tree entry operands completed when scheduler looks for dependencies.
This change adds an assertion to prevent tricky bug related to recursive
approach of building vectorization tree. For loop below takes number of
operands directly from tree entry rather than from scalars.
If the entry at this moment turns out incomplete (i.e. not all operands set)
then not all the dependencies will be seen by the scheduler.
This can lead to failed scheduling (and thus failed vectorization)
for perfectly vectorizable tree.
Here is code example which is likely to fire the assertion:
for (i : VL0->getNumOperands()) {
  ...
  TE->setOperand(i, Operands);
  buildTree_rec(Operands, Depth + 1,...);
}

Correct way is two steps process: first set all operands to a tree entry
and then recursively process each operand.

Differential Revision: https://reviews.llvm.org/D75296
2020-02-28 10:34:48 -08:00
Alexey Bataev
d911bbf57f [SLP]Update test checks, NFC. 2020-02-28 13:25:44 -05:00
Craig Topper
a2b4c55346 [X86] Recognize CVTPH2PS from STRICT_FP_EXTEND
This should avoid scalarizing the cvtph2ps intrinsics with D75162

Differential Revision: https://reviews.llvm.org/D75304
2020-02-28 10:19:57 -08:00
Hiroshi Yamauchi
37dab1a32f Devirtualize a call on alloca without waiting for post inline cleanup and next DevirtSCCRepeatedPass iteration.
This aims to fix a missed inlining case.

If there's a virtual call in the callee on an alloca (stack allocated object) in
the caller, and the callee is inlined into the caller, the post-inline cleanup
would devirtualize the virtual call, but if the next iteration of
DevirtSCCRepeatedPass doesn't happen (under the new pass manager), which is
based on a heuristic to determine whether to reiterate, we may miss inlining the
devirtualized call.

This enables inlining in clang/test/CodeGenCXX/member-function-pointer-calls.cpp.

This is a second commit after a revert
https://reviews.llvm.org/rG4569b3a86f8a4b1b8ad28fe2321f936f9d7ffd43 and a fix
https://reviews.llvm.org/rG41e06ae7ba91.

Differential Revision: https://reviews.llvm.org/D69591
2020-02-28 09:43:32 -08:00
Hiroshi Yamauchi
945c948972 [CallPromotionUtils] Add missing promotion legality check to tryPromoteCall.
Summary: This fixes the crash that led to the revert of D69591.

Reviewers: davidxl

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D75307
2020-02-28 09:35:09 -08:00
Valery N Dmitriev
0ac59590bb [SLP][NFC] Delete some unreachable code.
This patch deletes some dead code out of SLP vectorizer.
Couple of changes taken out of D57059 to slightly lighten it
plus one more similar case fixed.

Differential Revision: https://reviews.llvm.org/D75276
2020-02-28 09:22:51 -08:00
Christopher Tetreault
158224cf12 Revert "[NFC][ARM] Update test"
Summary:
There exists no corresponding code change for this commit, and this
commit causes downstream breakages.

This reverts commit 2db5547c016dbbd6acac3f3175937324f0095226.

Reviewers: samparker

Subscribers: kristof.beyls, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D75358
2020-02-28 09:14:50 -08:00
Teresa Johnson
e53f3c1bec [Inliner] Inlining should honor nobuiltin attributes
Summary:
Final patch in series to fix inlining between functions with different
nobuiltin attributes/options, which was specifically an issue in LTO.
See discussion on D61634 for background.

The prior patch in this series (D67923) enabled per-Function TLI
construction that identified the nobuiltin attributes.

Here I have allowed inlining to proceed if the callee's nobuiltins are a
subset of the caller's nobuiltins, but not in the reverse case, which
should be conservatively correct. This is controlled by a new option,
-inline-caller-superset-nobuiltin, which is enabled by default.

Reviewers: hfinkel, gchatelet, chandlerc, davidxl

Subscribers: arsenm, jvesely, nhaehnle, mehdi_amini, eraman, hiraditya, haicheng, dexonsmith, kerbowa, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D74162
2020-02-28 07:34:14 -08:00
Simon Pilgrim
9d6924a218 Fix MSVC "32-bit shift implicitly converted to 64 bits" warning. NFCI. 2020-02-28 15:23:37 +00:00
Simon Pilgrim
4962b74184 [TargetLowering] SimplifyDemandedBits - fix SCALAR_TO_VECTOR knownbits bug
We can only report the knownbits for a SCALAR_TO_VECTOR node if we only demand the 0'th element - the upper elements are undefined and shouldn't be trusted.

This is causing a number of regressions that need addressing but we need to get the bugfix in first.
2020-02-28 15:23:37 +00:00
Pierre-vh
1a010241a0 [Transform][MemCpyOpt] Add missing DebugLoc to %tmpbitcast
Fix for https://bugs.llvm.org/show_bug.cgi?id=37967

Differential Revision: https://reviews.llvm.org/D75173
2020-02-28 15:20:51 +00:00
Krzysztof Parzyszek
6df2db3c8d Reland 7691790dfd1011d08f5468f63952d7690755aad4 with a MSAN fix
In some cases when HexagonTargetLowering::allowsMemoryAccess returned
true, it did not set the "Fast" argument, leaving it uninitialized.

[Hexagon] Improve casting of boolean HVX vectors to scalars

- Mark memory access for bool vectors as disallowed in target lowering.
  This will prevent combining bitcasts of bool vectors with stores.
- Replace the actual bitcasting code with a faster version.
- Handle casting of v16i1 to i16.
2020-02-28 08:32:58 -06:00
David Green
14330a06ca [ARM] MVE VMLAS
This addes extra patterns for the VMLAS MVE instruction, which performs
Qda = Qda * Qn + Rm, a similar pattern to the existing VMLA. The sinking
of splat(Rm) into the loop is already performed, meaning we just need
extra Pat's in tablegen.

Differential Revision: https://reviews.llvm.org/D75115
2020-02-28 14:27:21 +00:00
David Green
d8362a5f36 [ARM] Additional MVE VMLA tests. NFC 2020-02-28 14:27:21 +00:00
Simon Pilgrim
b195100ee1 [cmake][msvc] Don't disable C4345 any more.
This shouldn't be relevant now that we just support VS2017+.
2020-02-28 13:57:20 +00:00
Jay Foad
5763faae81 [Utils] Make some scripts directly executable 2020-02-28 13:39:54 +00:00
Jay Foad
f6bcc30446 [AMDGPU] Mark the scheduling model as complete 2020-02-28 13:35:55 +00:00
Jay Foad
8de9a35fef [AMDGPU] Update a comment missed in 74e2974ac6a 2020-02-28 13:35:55 +00:00
Alexey Lapshin
ccd90397cc Fix buildbots after c074f5234d29439116f0e0be6033ea9331e85394.
Removed unused function getSectionByName() from dsymutil/DwarfStreamer.cpp.
2020-02-28 16:20:29 +03:00
Simon Cook
5c4172c74b [RISCV] Compress instructions based on function features
When running under LTO, it is common to not specify the architecture
spec, which is used for setting up the target machine, and instead rely
on features specified in each function to generate the correct
instructions.

This works for the code generator, but the RISC-V backend uses the
AsmPrinter to do instruction compression, which does not see these
features but instead uses a MCSubtargetInfo object to see whether
compression is enabled. Since this is configured based on the
TargetMachine at startup, it will result in compressed instructions not
being emitted when it has not been given the 'c' TargetFeature, but the
function has it.

This changes the RISCVAsmPrinter to re-initialize the STI feature set
based on the current MachineFunction, such that compressed instructions
are now correctly emitted regardless of the method used to enable them.

Differential revision: https://reviews.llvm.org/D73339
2020-02-28 11:52:55 +00:00
LLVM GN Syncbot
cff53cb2cb [gn build] Port 6af859dcca2 2020-02-28 11:49:23 +00:00
Jeremy Morse
80365b065d [DebugInfo] Re-implement LexicalScopes dominance method, add unit tests
Way back in D24994, the combination of LexicalScopes::dominates and
LiveDebugValues was identified as having worst-case quadratic complexity,
but it wasn't triggered by any code path at the time. I've since run into a
scenario where this occurs, in a very large basic block where large numbers
of inlined DBG_VALUEs are present.

The quadratic-ness comes from LiveDebugValues::join calling "dominates" on
every variable location, and LexicalScopes::dominates potentially touching
every instruction in a block to test for the presence of a scope. We have,
however, already computed the presence of scopes in blocks, in the
"InstrRanges" of each scope. This patch switches the dominates method to
examine whether a block is present in a scope's InsnRanges, avoiding
walking through the whole block.

At the same time, fix getMachineBasicBlocks to account for the fact that
InsnRanges can cover multiple blocks, and add some unit tests, as Lexical
Scopes didn't have any.

Differential revision: https://reviews.llvm.org/D73725
2020-02-28 11:41:28 +00:00
Juneyoung Lee
274ef2efad Let EarlyCSE fold equivalent freeze instructions
Summary:
This patch makes EarlyCSE fold equivalent freeze instructions.

Another optimization that I think will be useful is to remove freeze if its operand is used as a branch condition or at llvm.assume:

```
  %c = ...
  br i1 %c, label %A, ..
A:
  %d = freeze %c ; %d can be optimized to %c because %c cannot be poison or undef (or 'br %c' would be UB otherwise)
```

If it make sense for EarlyCSE to support this as well, I will make a patch for this.

Reviewers: spatel, reames, lebedev.ri

Reviewed By: lebedev.ri

Subscribers: lebedev.ri, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D75334
2020-02-28 20:35:20 +09:00
Peter Smith
9a1fd96887 [MC][ELF][ARM] Add relocations for some pc-relative fixups
Add ELF relocations for the following fixups:
fixup_thumb_adr_pcrel_10 -> R_ARM_THM_PC8
fixup_thumb_cp -> R_ARM_THM_PC8
fixup_t2_adr_pcrel_12 -> R_ARM_THM_PREL_11_0
fixup_t2_ldst_pcrel_12 -> R_ARM_THM_PC12

While these relocations are short-ranged there is support in the open
source ELF linker's in binutils and soon to be in LLD. MC will no longer
resolve pc-relative fixups to global symbols due to interpositioning
concerns. We can handle these at link time by implementing the relocations.

The R_ARM_THM_PC8 has some extra encoding rules for addends that llvm-mc
sidesteps by not supporting addends for these instructions, using the wide
Thumb 2 instruction if it is available. I think that this is a reasonable
compromise given that these are rare.

This partiall reverts D72892, the Thumb fixups no longer need to be
evaluated at assembly time.

Differential Revision: https://reviews.llvm.org/D75039
2020-02-28 11:29:29 +00:00
Sam Parker
48cb6ea724 [NFC][ARM] Add tests 2020-02-28 11:24:02 +00:00
Jay Foad
68730495b8 [AMDGPU] Precommit some scheduler related test updates
Summary:
The point of this is to make some tests with manual checks robust
against scheduler tweaks, so that only autogenerated test updates will
be required when pushing D68338 "[AMDGPU] Remove dubious logic in
bidirectional list scheduler".

Reviewers: arsenm, rampitec, vpykhtin

Subscribers: kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, kerbowa, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D75302
2020-02-28 11:20:58 +00:00
Sam Parker
61a9bbd1eb [RDA] Track implicit-defs
Ensure that we're recording implicit defs, as well as visiting implicit
uses and implicit defs when we're walking through operands.

Differential Revision: https://reviews.llvm.org/D75185
2020-02-28 11:14:42 +00:00
Stefan Agner
a40bf13d13 [ARM][Thumb2] support .w assembler qualifier for dmb/dsb/isb
Support the explicit wide assembler qualifier for the dmb/dsb/isb synchronization barrier instructions.

Differential revision: https://reviews.llvm.org/D75143
2020-02-28 11:08:24 +00:00
Stefan Agner
d1deb4199c [ARM][Thumb2] Support .w assembler qualifier for pld/pldw/pli
Accept explicit wide assembler qualifier for the pld/pldw/pli.

Differential revision: https://reviews.llvm.org/D75144
2020-02-28 11:08:24 +00:00
Djordje Todorovic
79c36c8212 [NFC] [Test commit] Testing commit access with new email 2020-02-28 12:01:52 +01:00
Alexey Lapshin
24b18e4dfe [DWARFLinker][NFC] Remove usages of "const object::ObjectFile" from DWARFLinker.
Summary:
DWARFContext has all the required information to access source debug info.
It is not necessary to use "const object::ObjectFile" to create DWARFContext.
Thus this patch removes all usages of "const object::ObjectFile"
from DWARFLinker. Instead, already created DWARFContext is passed
to DWARFLinker. The purpose is to not depend on "const object::ObjectFile".

The patch looks big, but most of changes are renamings and movements.

Testing: it passes "check-all" lit testing. MD5 checksum for clang .dSYM bundle
matches for the dsymutil with/without that patch.

Reviewers: JDevlieghere, friss, dblaikie, aprantl

Reviewed By: JDevlieghere

Subscribers: hiraditya, llvm-commits

Tags: #llvm, #debug-info

Differential Revision: https://reviews.llvm.org/D75029
2020-02-28 13:26:22 +03:00
Hans Wennborg
3d298169f4 SROA: Don't drop atomic load/store alignments (PR45010)
SROA will drop the explicit alignment on allocas when the ABI guarantees
enough alignment. Because the alignment on new load/store instructions
are set based on the alloca's alignment, that means SROA would end up
dropping the alignment from atomic loads and stores, which is not
allowed (see bug). For those, make sure to always carry over the
alignment from the previous instruction.

Differential revision: https://reviews.llvm.org/D75266
2020-02-28 10:38:40 +01:00
serge-sans-paille
c97c187c13 No longer generate calls to *_finite
According to Joseph Myers, a libm maintainer

> They were only ever an ABI (selected by use of -ffinite-math-only or
> options implying it, which resulted in the headers using "asm" to redirect
> calls to some libm functions), not an API. The change means that ABI has
> turned into compat symbols (only available for existing binaries, not for
> anything newly linked, not included in static libm at all, not included in
> shared libm for future glibc ports such as RV32), so, yes, in any case
> where tools generate direct calls to those functions (rather than just
> following the "asm" annotations on function declarations in the headers),
> they need to stop doing so.

As a consequence, we should no longer assume these symbols are available on the
target system.

Still keep the TargetLibraryInfo for constant folding.

Differential Revision: https://reviews.llvm.org/D74712
2020-02-28 10:07:37 +01:00
Hans Wennborg
34b8d5cba5 llvm-ar: Fix MinGW compilation
llvm-ar is using CompareStringOrdinal which is available
only starting with Windows Vista (WINVER 0x600).

Fix this by hoising WindowsSupport.h, which sets _WIN32_WINNT
to 0x0601, up to llvm/include/llvm/Support and use it in llvm-ar.

Patch by Cristian Adam!

Differential revision: https://reviews.llvm.org/D74599
2020-02-28 09:59:24 +01:00
Igor Kudrin
cd7f9e3ce0 [DebugInfo] Fix parsing DWARF64 units in DWP.
The integrity check code allowed only DWARF32 units.

Differential Revision: https://reviews.llvm.org/D75178
2020-02-28 15:35:51 +07:00
Igor Kudrin
f473ff580e [DebugInfo] Avoid crashing when parsing an invalid unit header in DWP.
The integrity checks for index entries in DWARFUnitHeader::extract()
might cause the function to return before checking the state of an
Error object, which leads to a crash in runtime. The patch fixes the
issue by moving the checks in a safe place.

Differential Revision: https://reviews.llvm.org/D75177
2020-02-28 15:35:51 +07:00
Pavel Labath
7d8c00606f [DataExtractor] Improve error message when we run off the end of the buffer
Summary: Include the offset at which this happened.

Reviewers: dblaikie, jhenderson

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D75265
2020-02-28 09:02:33 +01:00
Saleem Abdulrasool
3ae1657c3e build: process the libxml2 library path for embedding
Process the path for libxml2 before embedding that into the command line
that is generated in `llvm-config`.  Each element in the path is being
given a `-l` unconditionally which should not be the case for absolute
paths.  Since the library path may be absolute or not, just apply some
CMake pre-processing when generating the path.

Before:
```
/usr/lib/x86_64-linux-gnu/libz.so -lrt -ldl -ltinfo -lpthread -lm /usr/lib/x86_64-linux-gnu/libxml2.so
```

After:
```
/usr/lib/x86_64-linux-gnu/libz.so -lrt -ldl -ltinfo -lpthread -lm -lxml2
```

Resolves PR44179!
2020-02-27 22:00:30 -08:00
Craig Topper
af4ecda792 [X86] Add FMA commuting test case for D75016
This test case shows extra moves due to not fully considering all
commuting opportunities.
2020-02-27 20:41:26 -08:00
Jun Ma
b622c11886 [Coroutines] CoroElide enhancement
Fix regression of CoreElide pass when current function is
coroutine.

Differential Revision: https://reviews.llvm.org/D71663
2020-02-28 10:41:59 +08:00
Juneyoung Lee
a92b27e638 Revert "[SimpleLoopUnswitch] Fix introduction of UB when hoisted condition may be undef or poison"
.. due to performance regression.

This patch is reverted until infrastructore for CSE/LICM support for freeze is
added.

This reverts commit 181628b
2020-02-28 11:10:46 +09:00
Eli Friedman
16b6718f9a [IndVars] Fix sort comparator.
std::sort will compare an element to itself in some cases.  We should
not crash if this happens.

Differential Revision: https://reviews.llvm.org/D75000
2020-02-27 17:25:18 -08:00
Reid Kleckner
312b1860b3 Add missing cstdint include not found on Windows 2020-02-27 17:24:50 -08:00
Reid Kleckner
d1e548f99a [Support] Remove byte swapping from MathExtras.h
MathExtras.h was just wrapping SwapByteOrder.h functionality, so have
the callers use it directly.  Use the MathExtras.h name (ByteSwap_NN) as
the standard naming, since it appears to be the most popular.
2020-02-27 17:23:48 -08:00