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Commit Graph

151179 Commits

Author SHA1 Message Date
David Blaikie
061c32748f DebugInfo: Generalize LoadedObjectInfoHelper from RuntimeDyld
Make it usable by any class derived (even indirectly) from
LoadedObjectInfo by allowing a custom base class to be specified and
perfect forwarding to the ctor.

llvm-svn: 307166
2017-07-05 15:23:56 +00:00
Daniel Sanders
06935b98f4 [globalisel][tablegen] Finish fixing compile-time regressions by merging the matcher and emitter state machines.
Summary:
Also, made a few minor tweaks to shave off a little more cumulative memory consumption:
* All rules share a single NewMIs instead of constructing their own. Only one
  will end up using it.
* Use MIs.resize(1) instead of MIs.clear();MIs.push_back(I) and prevent
  GIM_RecordInsn from changing MIs[0].

Depends on D33764

Reviewers: rovka, vitalybuka, ab, t.p.northover, qcolombet, aditya_nandakumar

Reviewed By: ab

Subscribers: kristof.beyls, igorb, llvm-commits

Differential Revision: https://reviews.llvm.org/D33766

llvm-svn: 307159
2017-07-05 14:50:18 +00:00
Dinar Temirbulatov
181c4e6396 [SLPVectorizer] Add an extra parameter to cancelScheduling function, NFCI.
llvm-svn: 307158
2017-07-05 13:53:03 +00:00
David Green
2277ac4403 [IndVarSimplify] Add AShr exact flags using induction variables ranges.
This adds exact flags to AShr/LShr flags where we can statically
prove it is valid using the range of induction variables. This
allows further optimisations to remove extra loads.

Differential Revision: https://reviews.llvm.org/D34207

llvm-svn: 307157
2017-07-05 13:25:58 +00:00
Ulrich Weigand
0683488c73 [SystemZ] Simplify handling of 128-bit multiply/divide instruction
Several integer multiply/divide instructions require use of a
register pair as input and output.  This patch moves setting
up the input register pair from C++ code to TableGen, simplifying
the whole process and making it more easily extensible.

No functional change.

llvm-svn: 307155
2017-07-05 13:17:31 +00:00
Ulrich Weigand
0fdabbc664 [SystemZ] Small cleanups to SystemZScheduleZ13.td
Fixes a couple of whitespace errors, re-sorts the vector floating-point
instructions to make them more easily extensible, and adds a missing
pseudo instruction.

No functional change.

llvm-svn: 307154
2017-07-05 13:14:43 +00:00
Nirav Dave
72a601de28 [Hexagon] Preclude non-memory test from being optimized away. NFC.
llvm-svn: 307153
2017-07-05 13:08:03 +00:00
Tom Stellard
447f9d8866 CMake: Add LLVM_UTILS_INSTALL_DIR option
Summary:
This is like the LLVM_TOOLS_INSTALL_DIR option, but for the utils
that are installed when the LLVM_INSTALL_UTILS.  This option
defaults to 'bin' to remain consistent with the current behavior, but
distros may want to install these to libexec/llvm.

Reviewers: beanz

Reviewed By: beanz

Subscribers: llvm-commits, mgorny

Differential Revision: https://reviews.llvm.org/D30655

llvm-svn: 307150
2017-07-05 12:57:30 +00:00
Diana Picus
290114fb47 [GlobalISel] Refactor Legalizer helpers for libcalls
We used to have a helper that replaced an instruction with a libcall.
That turns out to be too aggressive, since sometimes we need to replace
the instruction with at least two libcalls. Therefore, change our
existing helper to only create the libcall and leave the instruction
removal as a separate step. Also rename the helper accordingly.

llvm-svn: 307149
2017-07-05 12:57:24 +00:00
Sjoerd Meijer
248e82f311 [AsmParser] Mnemonic Spell Corrector
This implements suggesting other mnemonics when an invalid one is specified,
for example:

$ echo "adXd r1,r2,#3" | llvm-mc -triple arm
<stdin>:1:1: error: invalid instruction, did you mean: add, qadd?
adXd r1,r2,#3
^

The implementation is target agnostic, but as a first step I have added it only
to the ARM backend; so the ARM backend is a good example if someone wants to
enable this too for another target.

Differential Revision: https://reviews.llvm.org/D33128

llvm-svn: 307148
2017-07-05 12:39:13 +00:00
Daniel Sanders
97becfdb9b [globalisel][tablegen] Fix the misuse of STATISTICS() on release builds (like r307088) after r307133.
r307133 brought back a couple instances of the same mistake that was already
fixed by r307088. Fixed it again.

Using NumPatternEmitted as a unique id for the tables is not valid on release
builds since the counters don't count in that case.

llvm-svn: 307146
2017-07-05 12:14:18 +00:00
Diana Picus
b8e5596c50 [ARM] GlobalISel: Extract tiny helper. NFC
Extract functionality for determining if the target uses AEABI.

llvm-svn: 307145
2017-07-05 11:53:51 +00:00
Diana Picus
2a391c1fb3 [MachineIRBuilder] Fix formatting. NFC.
llvm-svn: 307144
2017-07-05 11:47:23 +00:00
Igor Breger
bb756671d2 [GlobalISel][X86] For now don't handle not trivial function arguments lowering.
llvm-svn: 307142
2017-07-05 11:40:35 +00:00
Diana Picus
ad68bc7a9f [MachineIRBuilder] Add buildOr helper. NFC.
This isn't used anywhere yet, but I need it for a future commit.

llvm-svn: 307141
2017-07-05 11:32:12 +00:00
Igor Breger
98662f5c75 [GlobalIsel] allow x86_fp80 values to be dumped.
Summary:
Otherwise the fallback path fails with an assertion on x86_64 targets,
when "x86_fp80" is encountered.

Reviewers: t.p.northover, zvi, guyblank

Reviewed By: zvi

Subscribers: rovka, kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D34975

llvm-svn: 307140
2017-07-05 11:11:10 +00:00
Diana Picus
6216b92663 [MachineIRBuilder] Add buildBinaryOp helper. NFC
Add a helper for building simple binary ops like add, mul, sub, and.
This can be used in the future for quickly adding support for or, xor.

llvm-svn: 307139
2017-07-05 11:02:31 +00:00
Daniel Sanders
0251f5055d [globalisel][tablegen] Fix an unused variable warning in release builds after r307133
llvm-svn: 307138
2017-07-05 10:16:48 +00:00
Max Kazantsev
ce80090e48 Revert "[IndVars] Canonicalize comparisons between non-negative values and indvars"
This patch seems to cause failures of test MathExtras.SaturatingMultiply on
multiple buildbots. Reverting until the reason of that is clarified.

Differential Revision: https://reviews.llvm.org/rL307126

llvm-svn: 307135
2017-07-05 09:44:41 +00:00
Daniel Sanders
067ddbd8c9 [globalisel][tablegen] Added instruction emission to the state-machine-based matcher.
Summary:
This further improves the compile-time regressions that will be caused by a
re-commit of r303259.

Also added included preliminary work in preparation for the multi-insn emitter
since I needed to change the relevant part of the API for this patch anyway.

Depends on D33758

Reviewers: rovka, vitalybuka, ab, t.p.northover, qcolombet, aditya_nandakumar

Reviewed By: ab

Subscribers: kristof.beyls, igorb, llvm-commits

Differential Revision: https://reviews.llvm.org/D33764

llvm-svn: 307133
2017-07-05 09:39:33 +00:00
Max Kazantsev
cfefb2f8af [IndVars] Canonicalize comparisons between non-negative values and indvars
-If there is a IndVar which is known to be non-negative, and there is a value which is also non-negative,
then signed and unsigned comparisons between them produce the same result. Both of those can be
seen in the same loop. To allow other optimizations to simplify them, we turn all instructions like

  %c = icmp slt i32 %iv, %b
to

  %c = icmp ult i32 %iv, %b

if both %iv and %b are known to be non-negative.

Differential Revision: https://reviews.llvm.org/D34979

llvm-svn: 307126
2017-07-05 06:38:49 +00:00
Igor Breger
7287cfe2fc [GlobalISel][X86] Allow graceful fallback for struct/array argument/return value lowering. Going to support it in follow patch.
llvm-svn: 307125
2017-07-05 06:24:13 +00:00
Nemanja Ivanovic
e589b2a942 Add the missing triple to the test case added as part of r307120.
llvm-svn: 307122
2017-07-05 05:14:43 +00:00
Nemanja Ivanovic
b7abd5994a [PowerPC] Fix for PR33636
Remove casts to a constant when a node can be an undef.

Differential Revision: https://reviews.llvm.org/D34808

llvm-svn: 307120
2017-07-05 04:51:29 +00:00
Yuka Takahashi
878b347f79 [Bash-autocompletion] Show flags which has HelpText or GroupID
Summary: Otherwise internal flags will be also completed.

Differential Revision: https://reviews.llvm.org/D34930

llvm-svn: 307116
2017-07-05 02:36:32 +00:00
Nirav Dave
c3f1114c60 Rewrite areNonVolatileConsecutiveLoads to use BaseIndexOffset
Relanding after rewriting undef.ll test to avoid host-dependant
endianness.

As discussed in D34087, rewrite areNonVolatileConsecutiveLoads using
generic checks. Also, propagate missing local handling from there to
BaseIndexOffset checks.

Tests of note:

  * test/CodeGen/X86/build-vector* - Improved.
  * test/CodeGen/BPF/undef.ll - Improved store alignment allows an
    additional store merge

  * test/CodeGen/X86/clear_upper_vector_element_bits.ll - This is a
    case we already do not handle well. Here, the DAG is improved, but
    scheduling causes a code size degradation.

Reviewers: RKSimon, craig.topper, spatel, andreadb, filcab

Subscribers: nemanjai, llvm-commits

Differential Revision: https://reviews.llvm.org/D34472

llvm-svn: 307114
2017-07-05 01:21:23 +00:00
Alexander Shaposhnikov
4bfc13da61 [profiledata] Avoid creating a temporary vector in getNumValueData
getValueSitesForKind returns ArrayRef which has a cast operator
to std::vector, as a result a temporary vector is created
if the type of the variable is const std::vector& 
that is suboptimal in this case.

Differential revision: https://reviews.llvm.org/D34970

Test plan: make check-all

llvm-svn: 307113
2017-07-05 01:20:52 +00:00
Anna Thomas
2f21b887d3 [SafepointIRVerifier] Add verifier pass for finding GC relocation bugs
Original Patch and summary by Philip Reames.

RewriteStatepointsForGC tries to rewrite a function in a manner where
the optimizer can't end up using a pointer value after it might have
been relocated by a safepoint. This pass checks the invariant that
RSForGC is supposed to establish and that (if we constructed semantics
correctly) later passes must preserve.

This has been a really useful diagnostic tool when initially developing
the rewriting scheme and has found numerous bugs.

Differential Revision: https://reviews.llvm.org/D15940

Reviewed by: swaroop.sridhar, mjacob

Subscribers: llvm-commits
llvm-svn: 307112
2017-07-05 01:16:29 +00:00
Dylan McKay
4df9fae587 Revert "[AVR] Add the branch selection pass from the GitHub repository"
This reverts commit 602ef067c1d58ecb425d061f35f2bc4c7e92f4f3.

llvm-svn: 307111
2017-07-05 00:50:56 +00:00
Dylan McKay
590d049bd1 [AVR] Add the branch selection pass from the GitHub repository
We should rewrite this using the generic branch relaxation pass, but for
the moment having this pass is better than hitting an assertion error.

llvm-svn: 307109
2017-07-05 00:41:19 +00:00
Gadi Haber
13cb50e549 NFC.
Made some updates to the half.ll test under CodeGen to make it friendly to the update_llc_test_checks .py tool as follows:
1.Removing the llc flag -asm-verbose=false
2.Grouping the multiple check-prefix directives
3.Apply update_llc_test_checks.py tool on the test

This change is needed to easily update scheduling changes in an upcoming patch.

Reviewers: zvi, RKSimon, craig.topper 

Differential Revision: https://reviews.llvm.org/D34934

llvm-svn: 307108
2017-07-04 21:51:05 +00:00
Craig Topper
53882d70f0 Recommit r307064, "[InstCombine] Add test cases demonstrating creation of extra bswap instrinsic calls when when optimizing bswap and bitwise ops when the bswaps have additional uses. NFC"
The test check lines have now been fixed.

llvm-svn: 307106
2017-07-04 20:15:24 +00:00
Andrew Zhogin
c78e525e6b [ARM][test] Added test/CodeGen/ARM/ror.ll test. NFC precommit for D12833.
llvm-svn: 307103
2017-07-04 19:50:22 +00:00
Simon Pilgrim
96f5744476 [X86][SSE4A] Add support for combining from non-v16i8 EXTRQI/INSERTQI shuffles
With the improved shuffle decoding we can now combine EXTRQI/INSERTQI shuffles from non-v16i8 vector types

llvm-svn: 307099
2017-07-04 18:11:02 +00:00
Simon Pilgrim
42a63cca1a Fix signed/unsigned comparison warnings
llvm-svn: 307098
2017-07-04 17:42:01 +00:00
Alexander Timofeev
71cf453d98 [AMDGPU] Switch scalarize global loads ON by default
Differential revision: https://reviews.llvm.org/D34407

llvm-svn: 307097
2017-07-04 17:32:00 +00:00
Anna Thomas
289d0ebad4 [LoopDeletion] NFC: Add loop being analyzed debug statement
llvm-svn: 307096
2017-07-04 17:00:03 +00:00
Simon Pilgrim
e2ac627557 [X86][SSE4A] Generalized EXTRQI/INSERTQI shuffle decodes
The existing decodes only worked for v16i8 vectors, this adds support for any 128-bit vector

llvm-svn: 307095
2017-07-04 16:53:12 +00:00
Hiroshi Inoue
8c9589ce3a fix trivial typos in comments; NFC
llvm-svn: 307094
2017-07-04 16:35:26 +00:00
Daniel Sanders
177fc6453d [globalisel][tablegen] Fix the modules build after r307079
Exclude InstructionSelectorImpl.h since DEBUG_TYPE may vary between includes.

llvm-svn: 307093
2017-07-04 16:29:38 +00:00
Andrew Zhogin
0d027b7284 [DAGCombiner] Intermediate variables in visitRotate promoted to the function's begin. NFC precommit for D12833.
llvm-svn: 307091
2017-07-04 15:57:39 +00:00
Daniel Sanders
30c3678129 [globalisel][tablegen] Fix release builds after r307079
Using NumPatternEmitted as a unique id for the tables is not valid on release
builds since the counters don't count in that case.

Also fix an unused variable warning.

llvm-svn: 307088
2017-07-04 15:31:50 +00:00
Anna Thomas
e7c8763550 [FastISel] Move gc intrinsic test to X86 directory
Move from generic to X86 directory since gc intrinsics only supposed in
X86 64 bit.
Add target triple as well.
Fixes build failure in i686-linux-RA  caused by rL307084.

llvm-svn: 307086
2017-07-04 15:24:08 +00:00
Alexander Kornienko
5c84ab0bec Fix dangling StringRefs found by clang-tidy misc-dangling-handle check.
llvm-svn: 307085
2017-07-04 15:13:02 +00:00
Anna Thomas
9d7382c30f [FastISel][SelectionDAG]Teach fastISel about GC intrinsics
Summary:
We are crashing in LLC at O0 when gc intrinsics are present in the block.
The reason being FastISel performs basic block ISel by modifying GC.relocates
to be the first instruction in the block. This can cause us to visit the GC
relocate before it's corresponding GC.statepoint is visited, which is incorrect.
When we lower the statepoint, we record the base and derived pointers, along
with the gc.relocates. After this we can visit the gc.relocate.

This patch avoids fastISel from incorrectly creating the block with gc.relocate
as the first instruction.

Reviewers: qcolombet, skatkov, qikon, reames

Reviewed by: skatkov

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D34421

llvm-svn: 307084
2017-07-04 15:09:09 +00:00
Marek Olsak
518ccca66b [AMDGPU] Fix latency of MIMG instructions
Patch by cwabbott (Connor Abbott).

llvm-svn: 307081
2017-07-04 14:43:38 +00:00
Ilya Biryukov
5ce674cda2 NFC. Removed mention of missing script from build_docker_image.sh.
llvm-svn: 307080
2017-07-04 14:41:21 +00:00
Daniel Sanders
f4173f55ab [globalisel][tablegen] Partially fix compile-time regressions by converting matcher to state-machine(s)
Summary:
Replace the matcher if-statements for each rule with a state-machine. This
significantly reduces compile time, memory allocations, and cumulative memory
allocation when compiling AArch64InstructionSelector.cpp.o after r303259 is
recommitted.

The following patches will expand on this further to fully fix the regressions.

Reviewers: rovka, ab, t.p.northover, qcolombet, aditya_nandakumar

Reviewed By: ab

Subscribers: vitalybuka, aemerson, javed.absar, igorb, llvm-commits, kristof.beyls

Differential Revision: https://reviews.llvm.org/D33758

llvm-svn: 307079
2017-07-04 14:35:06 +00:00
Anna Thomas
690b0b954d [LoopDeletion] NFC: Add debug statements to the optimization
We have a DEBUG option for loop deletion, but no related debug messages.
Added some debug messages to state why loop deletion failed.

llvm-svn: 307078
2017-07-04 14:05:19 +00:00
Hiroshi Inoue
b8f3b6269d fix trivial typos in comments; NFC
llvm-svn: 307075
2017-07-04 13:09:29 +00:00