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Author SHA1 Message Date
Nate Begeman
0966f7d0b9 Add support for target nodes with more than 3 operands, required by ppc 
llvm-svn: 22894
 2005-08-19 00:56:28 +00:00
Chris Lattner
5cfc567fb8 mark variable arity instructions as such. Alpha wins the battle for 
cleanest backend in this metric :)

llvm-svn: 22893
 2005-08-19 00:51:37 +00:00
Chris Lattner
5194ff37c4 Mark some instructions as variable_ops, and PSEUDO_ALLOC as taking a GPR. 
I'm not convinced this is all of them,  but I can't do much testing, because
IA64 LLC crashes on big programs :(

llvm-svn: 22892
 2005-08-19 00:47:42 +00:00
Chris Lattner
d7bd59d77e add a few missing cases 
llvm-svn: 22891
 2005-08-19 00:41:29 +00:00
Chris Lattner
f62a66a21c Give ADJCALLSTACKDOWN/UP the correct operands. 
Give a whole bunch of other stuff variable operands, particularly FP.  The
FP stackifier is playing fast and loose with operands here, so we have to
mark them all as variable.  This will have to be fixed before we can dag->dag
the X86 backend.  The solution is for the pre-stackifier and post-stackifier
instructions to all be disjoint.

llvm-svn: 22890
 2005-08-19 00:38:22 +00:00
Nate Begeman
1182e06dcf ISD::OR, and it's accompanying SelectBitfieldInsert 
llvm-svn: 22889
 2005-08-19 00:38:14 +00:00
Chris Lattner
abad70eaf8 The variable SAR's only take one operand too 
llvm-svn: 22888
 2005-08-19 00:31:37 +00:00
Chris Lattner
8ce7dd449a Stop adding bogus operands to variable shifts on X86. These instructions 
only take one operand.  The other comes implicitly in through CL.

llvm-svn: 22887
 2005-08-19 00:16:17 +00:00
Nate Begeman
a978ae8b7d Remove the X86 and PowerPC Simple instruction selectors; their time has 
passed.

llvm-svn: 22886
 2005-08-18 23:53:15 +00:00
Chris Lattner
d03fa09ce7 Figure out how many operands each instruction has, keep track of whether 
or not it's variable.

llvm-svn: 22885
 2005-08-18 23:38:41 +00:00
Nate Begeman
c1aeaed2b9 Add shifts. 
llvm-svn: 22884
 2005-08-18 23:38:00 +00:00
Chris Lattner
1d3d2fb435 Fix operand numbers by marking variable arity nodes as such and by fixing 
the operand lists of a few other nodes.

llvm-svn: 22883
 2005-08-18 23:25:33 +00:00
Chris Lattner
9b342804a8 MFLR doesn't take an operand, the LR register is implicit 
llvm-svn: 22882
 2005-08-18 23:24:50 +00:00
Chris Lattner
32120e461e Add a new flag 
llvm-svn: 22881
 2005-08-18 23:17:07 +00:00
Chris Lattner
1f718aa8b5 revert this change, which causes breakage, temporarily 
llvm-svn: 22880
 2005-08-18 22:12:31 +00:00
Chris Lattner
b312f4d374 When emitting implicit use/def lists, only emit each unique list once. Though 
LLVM is able to merge identical static const globals, GCC isn't, and this caused
some bloat in the generated data.  This has a marginal effect on PPC, shrinking
the implicit sets from 10->4, but shrinks X86 from 179 to 23, a much bigger
reduction.

This should speed up the register allocator as well by reducing the dcache
footprint for this static data.

llvm-svn: 22879
 2005-08-18 21:36:47 +00:00
Chris Lattner
7b9f02525e add a new -view-sched-dags option to view dags as they are sent to the scheduler. 
llvm-svn: 22878
 2005-08-18 20:11:49 +00:00
Chris Lattner
2147daa960 Move this to the emitter 
llvm-svn: 22877
 2005-08-18 20:08:53 +00:00
Chris Lattner
62bc771af7 Implement the first chunk of a code emitter. This is sophisticated enough to 
codegen:

_empty:
.LBB_empty_0:   ;
        blr

but can't do anything more (yet). :)

llvm-svn: 22876
 2005-08-18 20:07:59 +00:00
Jim Laskey
0022ebabdf Unmangled names. 
llvm-svn: 22875
 2005-08-18 20:06:09 +00:00
Chris Lattner
b7176ee776 Add ScheduleDAG.cpp to the project 
llvm-svn: 22874
 2005-08-18 19:52:06 +00:00
Chris Lattner
d3814ff064 Fill in the numOperands field of the TargetInstrDescriptor struct from the 
.td file.

llvm-svn: 22873
 2005-08-18 19:45:37 +00:00
Jim Laskey
0e5b5a3433 1. Fix comment. 
2. Get an exact count of 'li ' instructions.

llvm-svn: 22872
 2005-08-18 19:38:57 +00:00
Jim Laskey
4251791f33 Add regression test to make sure that constants are generated optimally. 
llvm-svn: 22871
 2005-08-18 19:32:46 +00:00
Jim Laskey
7399a3d644 More optimal solution for loading constants. 
llvm-svn: 22870
 2005-08-18 18:58:23 +00:00
Chris Lattner
a094a1279a After selecting the instructions for a basic block, emit the instructions 
llvm-svn: 22869
 2005-08-18 18:46:06 +00:00
Chris Lattner
ebb48e5877 new file, obviously just a stub 
llvm-svn: 22868
 2005-08-18 18:45:24 +00:00
Chris Lattner
2e3f21c27f add a method 
llvm-svn: 22867
 2005-08-18 18:44:33 +00:00
Chris Lattner
80a5ffb6c5 remove some unused stuff 
llvm-svn: 22866
 2005-08-18 18:34:00 +00:00
Nate Begeman
7efd8aa1d1 Fix int foo() { return 65535; } by using the top 16 bits of the constant 
as the argument to LIS rather than the result of HA16(constant).

The DAG->DAG ISel was already doing the right thing.

llvm-svn: 22865
 2005-08-18 18:14:49 +00:00
Nate Begeman
7726312fac Improve ISD::Constant codegen. 
Now for int foo() { return -1; } we generate:
_foo:
        li r3, -1
        blr

instead of
_foo:
        lis r2, -1
        ori r3, r2, 65535
        blr

llvm-svn: 22864
 2005-08-18 18:01:39 +00:00
Chris Lattner
5cbeaed711 Enable critical edge splitting by default 
llvm-svn: 22863
 2005-08-18 17:35:14 +00:00
Chris Lattner
79b0fc3b9a replace switch stmt with an assert, generate li 0 instead of lis 0 for 0, 
to make the code follow people's expectations better.

llvm-svn: 22861
 2005-08-18 17:16:52 +00:00
Jim Laskey
ed406c683b Handle loading of 0x????0000 constants with a single instruction. 
llvm-svn: 22858
 2005-08-18 15:52:30 +00:00
Nate Begeman
67f3483a97 Add support for ISD::AND, and its various optimized forms. 
llvm-svn: 22857
 2005-08-18 07:30:46 +00:00
Nate Begeman
474ec3c02d Add support for target DAG nodes that take 4 operands, such as PowerPC's 
rlwinm.

llvm-svn: 22856
 2005-08-18 07:30:15 +00:00
Nate Begeman
3681359c93 Maintain consistency in negating things 
llvm-svn: 22855
 2005-08-18 05:44:50 +00:00
Nate Begeman
b6e36decb6 Implement XOR, remove a broken sign_extend_inreg case 
llvm-svn: 22854
 2005-08-18 05:00:13 +00:00
Chris Lattner
d6b9b36616 Fix printing of VTSDNodes 
llvm-svn: 22853
 2005-08-18 03:31:02 +00:00
Nate Begeman
413277de9a Add a testcase for load short -> uint, which is currently emitted as a 
zextload + sign_extend_inreg rather than a sextload.

llvm-svn: 22852
 2005-08-18 03:11:44 +00:00
Nate Begeman
feac5964d7 Add a bunch more simple nodes. 
llvm-svn: 22851
 2005-08-18 03:04:18 +00:00
Nate Begeman
4a875e784e Add a couple more nodes that are easy to handle 
llvm-svn: 22850
 2005-08-18 00:53:47 +00:00
Nate Begeman
276155cb07 Be fruitful and multiply! 
llvm-svn: 22849
 2005-08-18 00:21:41 +00:00
Jim Laskey
aa4903a2a6 Better version of isIntImmediate. 
llvm-svn: 22848
 2005-08-18 00:15:15 +00:00
Jim Laskey
d3ced4b358 messed up 
llvm-svn: 22847
 2005-08-17 23:57:24 +00:00
Jim Laskey
b45eb1e518 include/llvm/Support/MathExtras.h 
llvm-svn: 22846
 2005-08-17 23:54:12 +00:00
Nate Begeman
e7c038e591 Teach the DAG->DAG ISel about FNEG, and how it can be used to invert 
several of the PowerPC opcodes that come in both negated and non-negated
forms.

llvm-svn: 22845
 2005-08-17 23:46:35 +00:00
Nate Begeman
50efb750b6 Add two new methods isTargetOpcode() which returns true if the node type 
is greater than the range of building selection dag node types, and
getTargetOpcode(), which returns the node opcode less the value of
isd::builtin_op_end, which specifies the end of the builtin types.

llvm-svn: 22844
 2005-08-17 23:44:54 +00:00
Chris Lattner
a852093954 Fix Transforms/LoopStrengthReduce/2005-08-17-OutOfLoopVariant.ll, a crash 
on 177.mesa

llvm-svn: 22843
 2005-08-17 21:22:41 +00:00
Chris Lattner
605afae736 new testcase distilled from mesa 
llvm-svn: 22842
 2005-08-17 21:21:47 +00:00