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187406 Commits

Author SHA1 Message Date
Simon Pilgrim
09d86aa16b [CostModel][X86] Improve add vXi64 + fadd vXf64 reduction tests for SLM
As noted on D59710 we weren't handling the high costs of these operations on SLM.
2019-11-06 17:55:38 +00:00
Simon Pilgrim
eec64adc30 [CostModel][X86] Add add/fadd reduction tests for SLM 2019-11-06 17:04:22 +00:00
Simon Pilgrim
45791378ea CodeGenInstruction - fix uninitialized variable warnings. NFCI. 2019-11-06 17:04:21 +00:00
Simon Pilgrim
b3fa3af42f LoopAccessAnalysis - fix uninitialized variable warnings. NFCI. 2019-11-06 17:04:21 +00:00
Simon Pilgrim
512a23db84 BranchProbabilityInfo - fix uninitialized variable warning. NFCI. 2019-11-06 17:04:21 +00:00
Don Hinton
f1b6995b38 [CommandLine] Add inline ArgName printing
Summary:
This patch adds PrintArgInline (after PrintArg) that strips the
leading spaces from an argument before printing them, for usage
inline.

Related bug: PR42943 <https://bugs.llvm.org/show_bug.cgi?id=42943>

Patch by Daan Sprenkels!

Reviewers: jhenderson, chandlerc, hintonda

Reviewed By: jhenderson

Subscribers: hiraditya, kristina, llvm-commits, dsprenkels

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D69501
2019-11-06 08:17:33 -08:00
Pavel Labath
d82cf6fb61 DWARFDebugLoclists: Move to a incremental parsing model
Summary:
This patch stems from the discussion D68270 (including some offline
talks). The idea is to provide an "incremental" api for parsing location
lists, which will avoid caching or materializing parsed data. An
additional goal is to provide a high level location list api, which
abstracts the differences between different encoding schemes, and can be
used by users which don't care about those (such as LLDB).

This patch implements the first part. It implements a call-back based
"visitLocationList" api. This function parses a single location list,
calling a user-specified callback for each entry. This is going to be
the base api, which other location list functions (right now, just the
dumping code) are going to be based on.

Future patches will do something similar for the v4 location lists, and
add a mechanism to translate raw entries into concrete address ranges.

Reviewers: dblaikie, probinson, JDevlieghere, aprantl, SouraVX

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D69672
2019-11-06 16:25:06 +01:00
Miloš Stojanović
1ac6de2765 [NFC][APInt] Fix typos in comments.
Testing git commit access.
2019-11-06 16:01:58 +01:00
Sanjay Patel
d8c7faafe9 [x86] avoid crashing when splitting AVX stores with non-simple type (PR43916)
The store splitting transform was assuming a simple type (MVT),
but that's not necessarily the case as shown in the test.
2019-11-06 09:28:41 -05:00
Ilya Biryukov
9f476ae4bb [Support] fix mingw-w64 build
Older versions of Mingw-w64 do not define _beginthreadex_proc_type,
so we replace it with `unsigned (__stdcall *ThreadFunc)(void *)`.

Fixes https://github.com/clangd/clangd/issues/188

Patch by lh123!

Differential Revision: https://reviews.llvm.org/D69879
2019-11-06 15:18:58 +01:00
Simon Pilgrim
1556de2854 [X86] Fix uninitialized variable warnings. NFCI. 2019-11-06 14:02:43 +00:00
Simon Pilgrim
f134f16f11 X86FoldTablesEmitter - fix static analyzer potential invalid iterator warning. NFCI. 2019-11-06 13:31:00 +00:00
Simon Pilgrim
9ef7cc05e4 [X86] LowerAVXExtend - fix dodgy self-comparison assert.
PVS Studio noticed that we were asserting "VT.getVectorNumElements() == VT.getVectorNumElements()" instead of "VT.getVectorNumElements() == InVT.getVectorNumElements()".
2019-11-06 12:50:29 +00:00
Momchil Velikov
186e50f9f0 [AArch64] Move the branch relaxation pass after BTI insertion
Summary:
Inserting BTI instructions can push branch destinations out of range.

The branch relaxation pass itself cannot insert indirect branches since `TargetInstrInfo::insertIndirecrtBranch` is not implemented for AArch64 (guess +/-128 MB direct branch range is more than enough in practice).

Testing this is a bit tricky.

The original test case we have is 155kloc/6.1M. I've generated a test case using this program:
```

int main() {
  std::cout << R"src(int test();
void g0(), g1(), g2(), g3(), g4(), e();

void f(int v) {
  if ((test() & 2) == 0) {
  switch (v) {
  case 0:
    g0();
  case 1:
    g1();
  case 2:
    g2();
  case 3:
    g3();
  }
)src";

  const int N = 8176;

  for (int i = 0; i < N; ++i)
    std::cout << "    void h" << i << "();\n";
  for (int i = 0; i < N; ++i)
    std::cout << "    h" << i << "();\n";

  std::cout << R"src(
  } else {
    e();
  }
}
)src";
}
```
which is still a bit too much to commit as a regression test, IMHO.

Reviewers: t.p.northover, ostannard

Reviewed By: ostannard

Subscribers: kristof.beyls, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D69118

Change-Id: Ide5c922bcde08ff4cf635da5e52365525a997a0a
2019-11-06 12:46:50 +00:00
Simon Pilgrim
f32861caf3 [APInt] Fix implicit truncation warning in bitsToFloat(). NFCI. 2019-11-06 12:30:04 +00:00
Roman Lebedev
f8cfdaecea [LoopUnroll] countToEliminateCompares(): fix handling of [in]equality predicates (PR43840)
Summary:
I believe this bisects to https://reviews.llvm.org/D44983
(`[LoopUnroll] Only peel if a predicate becomes known in the loop body.`)

While that revision did contain tests that showed arguably-subpar peeling
for [in]equality predicates that [not] happen in the middle of the loop,
it also disabled peeling for the *first* loop iteration,
because latch would be canonicalized to [in]equality comparison..

That was intentional as per https://reviews.llvm.org/D44983#1059583.
I'm not 100% sure that i'm using correct checks here,
but this fix appears to be going in the right direction..

Let me know if i'm missing some checks here..

Fixes [[ https://bugs.llvm.org/show_bug.cgi?id=43840 | PR43840 ]].

Reviewers: fhahn, mkazantsev, efriedma

Reviewed By: fhahn

Subscribers: xbolva00, hiraditya, zzheng, llvm-commits, fhahn

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D69617
2019-11-06 15:08:59 +03:00
Roman Lebedev
5cd2221e03 [NFC][LoopUnroll] Update test coverage for peeling w/ inequality predicates 2019-11-06 15:08:59 +03:00
dfukalov
3c6fc97f38 [AMDGPU] Improve code size cost model (part 2)
Summary: Added estimations for ShuffleVector, some cast and arithmetic instructions

Reviewers: rampitec

Reviewed By: rampitec

Subscribers: arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, zzheng, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D69629
2019-11-06 13:55:48 +03:00
Sjoerd Meijer
2a67a1de31 [TTI][LV] preferPredicateOverEpilogue
We have two ways to steer creating a predicated vector body over creating a
scalar epilogue. To force this, we have 1) a command line option and 2) a
pragma available. This adds a third: a target hook to TargetTransformInfo that
can be queried whether predication is preferred or not, which allows the
vectoriser to make the decision without forcing it.

While this change behaves as a non-functional change for now, it shows the
required TTI plumbing, usage of this new hook in the vectoriser, and the
beginning of an ARM MVE implementation. I will follow up on this with:
- a complete MVE implementation, see D69845.
- a patch to disable this, i.e. we should respect "vector_predicate(disable)"
  and its corresponding loophint.

Differential Revision: https://reviews.llvm.org/D69040
2019-11-06 10:14:20 +00:00
Simon Tatham
6b22946dbf [ARM,MVE] Add intrinsics for gather/scatter load/stores.
This patch adds two new families of intrinsics, both of which are
memory accesses taking a vector of locations to load from / store to.

The vldrq_gather_base / vstrq_scatter_base intrinsics take a vector of
base addresses, and an immediate offset to be added consistently to
each one. vldrq_gather_offset / vstrq_scatter_offset take a scalar
base address, and a vector of offsets to add to it. The
'shifted_offset' variants also multiply each offset by the element
size type, so that the vector is effectively of array indices.

At the IR level, these operations are represented by a single set of
four IR intrinsics: {gather,scatter} × {base,offset}. The other
details (signed/unsigned, shift, and memory element size as opposed to
vector element size) are all specified by IR intrinsic polymorphism
and immediate operands, because that made the selection job easier
than making a huge family of similarly named intrinsics.

I considered using the standard IR representations such as
llvm.masked.gather, but they're not a good fit. In order to use
llvm.masked.gather to represent a gather_offset load with element size
smaller than a pointer, you'd have to expand the <8 x i16> vector of
offsets into an <8 x i16*> vector of pointers, which would be split up
during legalization, so you'd spend most of your time undoing the mess
it had made. Also, ISel support for llvm.masked.gather would be easy
enough in a trivial way (you can expand it into a gather-base load
with a zero immediate offset), but instruction-selecting lots of
fiddly idioms back into all the _other_ MVE load instructions would be
much more work. So I think dedicated IR intrinsics are the more
sensible approach, at least for the moment.

On the clang tablegen side, I've added two new features to the
Tablegen source accepted by MveEmitter: a 'CopyKind' type node for
defining a type that varies with the parameter type (it lets you ask
for an unsigned integer type of the same width as the parameter), and
an 'unsignedflag' value node for passing an immediate IR operand which
is 0 for a signed integer type or 1 for an unsigned one. That lets me
write each kind of intrinsic just once and get all its subtypes and
immediate arguments generated automatically.

Also I've tweaked the handling of pointer-typed values in the code
generation part of MveEmitter: they're generated as Address rather
than Value (i.e. including an alignment) so that they can be given to
the ordinary IR load and store operations, but I'd omitted the code to
convert them back to Value when they're going to be used as an
argument to an IR intrinsic.

On the MC side, I've enhanced MVEVectorVTInfo so that it can tell you
not only the full assembly-language suffix for a given vector type
(like 's32' or 'u16') but also the numeric-only one used by store
instructions (just '32' or '16').

Reviewers: dmgreen

Subscribers: kristof.beyls, hiraditya, cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D69791
2019-11-06 09:01:42 +00:00
LLVM GN Syncbot
fa9d8e37f8 gn build: Merge 24130d661ed 2019-11-06 08:29:28 +00:00
Thomas Finch
7f44300477 YAML parser robustness improvements
Summary: This patch fixes a number of bugs found in the YAML parser
through fuzzing. In general, this makes the parser more robust against
malformed inputs.

The fixes are mostly improved null checking and returning errors in
more cases. In some cases, asserts were changed to regular errors,
this provides the same robustness but also protects release builds
from the triggering conditions. This also improves the fuzzability of
the YAML parser since asserts can act as a roadblock to further
fuzzing once they're hit.

Each fix has a corresponding test case:
  - TestAnchorMapError - Added proper null pointer handling in
    `Stream::printError` if N is null and `KeyValueNode::getValue` if
    getKey returns null, `Input::createHNodes` `dyn_casts` changed to
    `dyn_cast_or_null` so the null pointer checks are actually able to
    fail
  - TestFlowSequenceTokenErrors - Added case in
    `Document::parseBlockNode` for FlowMappingEnd, FlowSequenceEnd, or
    FlowEntry tokens outside of mappings or sequences
  - TestDirectiveMappingNoValue - Changed assert to regular error
    return in `Scanner::scanValue`
  - TestUnescapeInfiniteLoop - Fixed infinite loop in
    `ScalarNode::unescapeDoubleQuoted` by returning an error for
    unrecognized escape codes
  - TestScannerUnexpectedCharacter - Changed asserts to regular error
    returns in `Scanner::consume`
  - TestUnknownDirective - For both of the inputs the stream doesn't
    fail and correctly returns TK_Error, but there is no valid root
    node for the document. There's no reasonable way to make the
    scanner fail for unknown directives without breaking the YAML spec
    (see spec-07-01.test). I think the assert is unnecessary given
    that an error is still generated for this case.

The `SimpleKeys.clear()` line fixes a bug found by AddressSanitizer
triggered by multiple test cases - when TokenQueue is cleared
SimpleKeys is still holding dangling pointers into it, so SimpleKeys
should be cleared as well.

Patch by Thomas Finch!

Reviewers: chandlerc, Bigcheese, hintonda

Reviewed By: Bigcheese, hintonda

Subscribers: hintonda, kristina, beanz, dexonsmith, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D61608
2019-11-05 21:51:04 -08:00
Yevgeny Rouban
a162363827 [ADT] Add equality operator for SmallPtrSet
Reviewed By: tellenbach
Differential Revision: https://reviews.llvm.org/D69429
2019-11-06 11:17:51 +07:00
QingShan Zhang
33ea4ca3d8 [PowerPC] Fix the incorrect 'RM' flag set on load/store instr
The 'RM' flag model the "Rounding Mode" and it has nothing to do with the load/store instructions.

Differential Revision: https://reviews.llvm.org/D69551
2019-11-06 02:46:37 +00:00
Chris Bieneman
2479c6c683 Implement sys::getHostCPUName() for Darwin ARM
Summary: Currently there is no implementation of `sys::getHostCPUName()` for Darwin ARM targets. This patch makes it so that LLVM running on ARM makes reasonable guesses about the CPU features of the host CPU.

Reviewers: t.p.northover, lhames, efriedma

Reviewed By: efriedma

Subscribers: rjmccall, efriedma, kristof.beyls, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D69597
2019-11-05 17:49:16 -08:00
Vladimir Vereschaka
d74db9a8ca Fixed a profdata file size detection on Windows system.
The space symbols are allowed in the group names on Windows system (as
example: Domain Users). In that case the test extracts a wrong field
from the output to get a size of the profdata file.

This patch avoids a printing of the group names in the test output and
extracts a proper field as a file size.

Differential Revision: https://reviews.llvm.org/D69317
2019-11-05 17:09:50 -08:00
Teresa Johnson
1c2dd6d975 [IRMover] Set Address Space for moved global values
Summary:
Set Address Space when creating a new function (from another).

Fix PR41154.

Patch by Ehud Katz <ehudkatz@gmail.com>

Reviewers: tejohnson, chandlerc

Reviewed By: tejohnson

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D69361
2019-11-05 16:32:48 -08:00
Daniel Sanders
9413ba8b9d [globalisel][docs] Rework GMIR documentation and add an early GenericOpcode reference
It looks like I pushed an older version of this commit without the review
fixups earlier. This applies the review changes

Differential Revision: https://reviews.llvm.org/D69545
2019-11-05 15:44:26 -08:00
Daniel Sanders
6cdb5ec3bc [globalisel][docs] Rework GMIR documentation and add an early GenericOpcode reference
Summary:
Rework the GMIR documentation to focus more on the end user than the
implementation and tie it in to the MIR document. There was also some
out-of-date information which has been removed.

The quality of the GenericOpcode reference is highly variable and drops
sharply as I worked through them all but we've got to start somewhere :-).
It would be great if others could expand on this too as there is an awful
lot to get through.

Also fix a typo in the definition of G_FLOG. Previously, the comments said
we had two base-2's (G_FLOG and G_FLOG2).

Reviewers: aemerson, volkan, rovka, arsenm

Reviewed By: rovka

Subscribers: wdng, arphaman, jfb, Petar.Avramovic, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D69545
2019-11-05 15:16:43 -08:00
James Molloy
c9c0d59dd4 [Automaton] Make Automaton thread-safe
In an optimization to improve performance (rL375240) we added a std::shared_ptr
around the main table map. This is safe, but we also ended up making the
transcriber object a std::shared_ptr too. This has mutable state, so must be
copied when we copy the Automaton object. This is very cheap; the main optimization
was about the map `M` only.

Reported by Dan Palermo. No test as triggering this is rather hard from a unit test.
2019-11-05 22:57:44 +00:00
Daniel Sanders
c868861fe8 [globalisel][docs] Add a section about debugging with the block extractor
Summary: Depends on D69644

Reviewers: rovka, volkan, arsenm

Subscribers: wdng, Petar.Avramovic, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D69645
2019-11-05 14:48:27 -08:00
Stanislav Mekhanoshin
43c3e520f5 [AMDGPU] Add missing flags to DS_Real
Differential Revision: https://reviews.llvm.org/D69867
2019-11-05 14:24:48 -08:00
Sanjay Patel
292dd62299 [SLP] add tests for 2-wide reductions; NFC 2019-11-05 17:18:37 -05:00
Volodymyr Sapsai
2d616bdac4 Revert "[analyzer] Add test directory for scan-build."
This reverts commit 0aba69eb1a01c44185009f50cc633e3c648e9950 with
subsequent changes to test files.

It caused test failures on GreenDragon, e.g.,
http://green.lab.llvm.org/green/job/clang-stage1-cmake-RA-incremental/
2019-11-05 14:03:36 -08:00
Teresa Johnson
6768a397d3 [IRMover] Use GlobalValue::getAddressSpace instead of directly from its type [NFC]
Summary: Change the old form of G->getType()->getAddressSpace() to the new G->getAddressSpace() (underneath does the same).

Patch by Ehud Katz <ehudkatz@gmail.com>

Reviewers: tejohnson, chandlerc

Reviewed By: tejohnson

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D69550
2019-11-05 13:54:41 -08:00
Simon Atanasyan
fa3a3af046 [mips] Fix getRegForInlineAsmConstraint to do not crash on empty Constraint 2019-11-06 00:50:39 +03:00
Alina Sbirlea
b44d371b7c [LoopRotationUtils] Check values are newly inserted into maps.
This is a cleanup that came up in D63680.
All values added to the ValueMaps should be newly added.
2019-11-05 13:40:10 -08:00
Simon Pilgrim
5c72f1396f [Hexagon] getCompoundCandidateGroup - fix 'false' value is implicitly cast to unsigned warning. NFCI.
Consistently return HexagonII::HCG_None.
2019-11-05 21:37:53 +00:00
Philip Reames
17c2029d62 [X86/Atomics] Correct a few transforms for new atomic lowering
This is a partial fix for the issues described in commit message of 027aa27 (the revert of G24609).  Unfortunately, I can't provide test coverage for it on it's own as the only (known) wrong example is still wrong, but due to a separate issue.

These fixes are cases where when performing unrelated DAG combines, we were dropping the atomicity flags entirely.
2019-11-05 13:20:08 -08:00
Amy Huang
4bc07fee4b [MIR] Add MIR parsing for heap alloc site instruction markers
Summary:
This patch adds MIR parsing and printing for heap alloc markers, which were
added in D69136. They are printed as an operand similar to pre-/post-instr
symbols, with a heap-alloc-marker token and a metadata node.

Reviewers: rnk

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D69864
2019-11-05 12:57:45 -08:00
Benjamin Kramer
7fd0a8ebef [X86] Gate select->fmin/fmax transform on NoSignedZeros instead of UnsafeFPMath 2019-11-05 21:28:41 +01:00
Julian Lettner
0752aef3ee Revert "[lit] Better/earlier errors when no tests are executed"
This reverts commit d8f2bff75126c6dde694ad245f9807fa12ad5630.
2019-11-05 12:10:43 -08:00
Stanislav Mekhanoshin
f1ac1c199b [AMDGPU] Removed dead code from R600ISelLowering.cpp
This was added to inhibit a warning from gcc 7.3 according to
the comment. However, it triggers warning from PVS. In addition
I cannot reproduce it with gcc 7.4 and I also cannot reproduce
it with gcc 7.3 using compiler explorer.

Differential Revision: https://reviews.llvm.org/D69863
2019-11-05 12:02:48 -08:00
Philip Reames
594dcaeec7 [X86/Atomics] (Semantically) revert G246098, switch back to the old atomic example
When writing an email for a follow up proposal, I realized one of the diffs in the committed change was incorrect.  Digging into it revealed that the fix is complicated enough to require some thought, so reverting in the meantime.

The problem is visible in this diff (from the revert):
 ; X64-SSE-LABEL: store_fp128:
 ; X64-SSE:       # %bb.0:
-; X64-SSE-NEXT:    movaps %xmm0, (%rdi)
+; X64-SSE-NEXT:    subq $24, %rsp
+; X64-SSE-NEXT:    .cfi_def_cfa_offset 32
+; X64-SSE-NEXT:    movaps %xmm0, (%rsp)
+; X64-SSE-NEXT:    movq (%rsp), %rsi
+; X64-SSE-NEXT:    movq {{[0-9]+}}(%rsp), %rdx
+; X64-SSE-NEXT:    callq __sync_lock_test_and_set_16
+; X64-SSE-NEXT:    addq $24, %rsp
+; X64-SSE-NEXT:    .cfi_def_cfa_offset 8
 ; X64-SSE-NEXT:    retq
   store atomic fp128 %v, fp128* %fptr unordered, align 16
   ret void

The problem here is three fold:
1) x86-64 doesn't guarantee atomicity of anything larger than 8 bytes.  Some platforms observably break this guarantee, others don't, but the codegen isn't considering this, so it's wrong on at least some platforms.
2) When I started to track down the problem, I discovered that DAGCombiner had stripped the atomicity off the store entirely.  This comes down to idiomatic usage of DAG.getStore passing all MMO components separately as opposed to just passing the MMO.
3) On x86 (not -64), there are cases where 8 byte atomiciy is supported, but only for floating point operations.  This would seem to imply that operation typing matters for correctness, and DAGCombine happily folds away bitcasts.  I'm not 100% sure there's a problem here, but I'm not entirely sure there isn't either.

I plan on returning to each issue in turn;  sorry for the churn here.
2019-11-05 11:24:27 -08:00
Sid Manning
c105d26f97 [llvm-objdump] Fix spurious "The end of the file was unexpectedly encountered" if a SHT_NOBITS sh_offset is larger than the file size
llvm-objdump -D this file:

  int a[100000];
  int main() { return 0; }

Will produce an error: "The end of the file was unexpectedly encountered".

This happens because of a check in Binary.h checkOffset.  (Addr + Size > M.getBufferEnd()).

The sh_offset and sh_size fields can be ignored for SHT_NOBITS sections.
Fix the error by changing ELFObjectFile<ELFT>::getSectionContents to use
the file base for SHT_NOBITS sections.

Reviewed By: grimar, MaskRay

Differential Revision: https://reviews.llvm.org/D69192
2019-11-05 11:14:12 -08:00
Joel E. Denny
729f23e751 [lit] Fix not calling internal commands
Without this patch, when using lit's internal shell, if `not` on a lit
RUN line calls `env`, `diff`, or any of the other in-process shell
builtins that lit implements, lit accidentally searches for the latter
as an external executable.  What's worse is that works fine when a
developer is testing on a platform where those executables are
available and behave as expected, but it then breaks on other
platforms.

`not` seems useful for some builtins, such as `diff`, so this patch
supports such uses.  `not --crash` does not seem useful for builtins,
so this patch diagnoses such uses.  In all cases, this patch ensures
shell builtins are found behind any sequence of `env` and `not`
commands.

`not` calling `env` calling an external command appears useful when
the `env` and external command are part of a lit substitution, as in
D65156.  This patch supports that by looking through any sequence of
`env` and `not` commands, building the environment from the `env`s,
and storing the `not`s.  The `not`s are then added back to the command
line without the `env`s to execute externally.  This avoids the need
to replicate the `not` implementation, in particular the `--crash`
option, in lit.

Reviewed By: rnk

Differential Revision: https://reviews.llvm.org/D66531
2019-11-05 14:09:21 -05:00
Stanislav Mekhanoshin
53c349c0d4 [AMDGPU] Removed dead code handling M0CopyReg
Static analyzer complains about always false condition.
See https://bugs.llvm.org/show_bug.cgi?id=43886

Differential Revision: https://reviews.llvm.org/D69860
2019-11-05 11:05:13 -08:00
Benjamin Kramer
4240cc4eb1 [X86] Specifically limit fmin/fmax commutativity to NoNaNs + NoSignedZeros
The backend UnsafeFPMath flag is not a superset of all the others, so
limit it to the exact bits needed.
2019-11-05 19:34:06 +01:00
Daniel Sanders
7a5b72e3a3 [globalisel] Rename G_GEP to G_PTR_ADD
Summary:
G_GEP is rather poorly named. It's a simple pointer+scalar addition and
doesn't support any of the complexities of getelementptr. I therefore
propose that we rename it. There's a G_PTR_MASK so let's follow that
convention and go with G_PTR_ADD

Reviewers: volkan, aditya_nandakumar, bogner, rovka, arsenm

Subscribers: sdardis, jvesely, wdng, nhaehnle, hiraditya, jrtc27, atanasyan, arphaman, Petar.Avramovic, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D69734
2019-11-05 10:31:17 -08:00
Stanislav Mekhanoshin
771ecdbd33 [AMDGPU] return Fail instead of SolfFail from addOperand()
addOperand() method of AMDGPU disassembler returns SoftFail
on error. All instances which may lead to that place are
an impossible encdoing, not something which is possible to
encode, but semantically incorrect as described for SoftFail.

Then tablegen generates a check of the following form:

if (Decode...(..) == MCDisassembler::Fail) { return MCDisassembler::Fail; }

Since we can only return Success and SoftFail that is dead
code as detected by the static code analyzer.

Solution: return Fail as it should be.

See https://bugs.llvm.org/show_bug.cgi?id=43886

Differential Revision: https://reviews.llvm.org/D69819
2019-11-05 10:25:27 -08:00