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Commit Graph

154612 Commits

Author SHA1 Message Date
Matt Arsenault
e558077eb1 AMDGPU: Start selecting v_mad_mixlo_f16
Also add some tests that should be able to use v_mad_mixhi_f16,
but do not yet. This is trickier because we don't really model
the partial update of the register done by 16-bit instructions.

llvm-svn: 313806
2017-09-20 20:28:39 +00:00
Vlad Tsyrklevich
a7c52cebfb Revert "Introduce the llvm-cfi-verify tool (resubmission of D37937)."
This reverts commit r313798, it's causing buildbot failures.

llvm-svn: 313804
2017-09-20 19:46:02 +00:00
Vlad Tsyrklevich
af7b67d45c Introduce the llvm-cfi-verify tool (resubmission of D37937).
Summary: Resubmission of D37937. Fixed i386 target building (conversion from std::size_t& to uint64_t& failed). Fixed documentation warning failure about docs/CFIVerify.rst not being in the tree.

Reviewers: vlad.tsyrklevich

Reviewed By: vlad.tsyrklevich

Patch by Mitch Phillips

Subscribers: mgorny, pcc, llvm-commits, kcc

Differential Revision: https://reviews.llvm.org/D38089

llvm-svn: 313798
2017-09-20 19:14:16 +00:00
Matt Arsenault
d1934c5240 AMDGPU: Fix encoding of op_sel for mad_mix* opcodes
llvm-svn: 313797
2017-09-20 19:09:28 +00:00
Sam Clegg
85b547e995 Reland "[WebAssembly] Add support for naming wasm data segments"
Add adds support for naming data segments.  This is useful
useful linkers so that they can merge similar sections.

Differential Revision: https://reviews.llvm.org/D37886

llvm-svn: 313795
2017-09-20 19:03:35 +00:00
Craig Topper
639a5feb24 [APInt] Use getActiveBits() to implement logBase2 and ceilLogBase2. NFC
llvm-svn: 313793
2017-09-20 18:49:31 +00:00
Craig Topper
0f488ed700 [InstCombine] Use APInt::getActiveBits() to avoid creating an APInt from a trailing zero count to do a comparison. NFCI
llvm-svn: 313792
2017-09-20 18:49:29 +00:00
Saleem Abdulrasool
7b31fd91f1 CodeGen: support SwiftError SwiftCC on Windows x64
Add support for passing SwiftError through a register on the Windows x64
calling convention.  This allows the use of swifterror attributes on
parameters which is used by the swift front end for the `Error`
parameter.  This partially enables building the swift standard library
for Windows x86_64.

llvm-svn: 313791
2017-09-20 18:40:59 +00:00
Marek Sokolowski
2b8a5c6709 [llvm-readobj] Teach readobj to dump .res files (WindowsResource).
This enables readobj to output Windows resource files (.res). This way,
we'll be able to test .res outputs without comparing them byte-by-byte
with "magic binary files" generated by MS toolchain.

Differential Revision: https://reviews.llvm.org/D38058

llvm-svn: 313790
2017-09-20 18:33:35 +00:00
Jake Ehrlich
00f84cc89f Rename K_MIPS64 to K_GNU64
This patch renames K_MIPS64 to K_GNU64 as part of a change to add
support for writing archives with 64-bit indexes in the symbol table.

llvm-svn: 313787
2017-09-20 18:23:01 +00:00
Reid Kleckner
6a52da2d23 Re-land "[DebugInfo] Insert DW_OP_deref when spilling indirect DBG_VALUEs"
After r313775, it's easier to maintain a parallel BitVector of spilled
locations indexed by location number.

I wasn't able to build a good reduced test case for this iteration of
the bug, but I added a more direct assertion that spilled values must
use frame index locations. If this bug reappears, it won't only fire on
the NEON vector code that we detected it on, but on medium-sized
integer-only programs as well.

llvm-svn: 313786
2017-09-20 18:19:08 +00:00
Zachary Turner
2388758e94 [TableGen] Some optimizations to TableGen.
This changes some STL data types to corresponding LLVM
data types that have better performance characteristics.

Differential Revision: https://reviews.llvm.org/D37957

llvm-svn: 313783
2017-09-20 18:01:40 +00:00
Zachary Turner
bc2d9f8cf4 [TableGen] Add a DenseMapInfo for MachineValueType.
No functional change, just adding a DenseMapInfo and tombstone
value so that MVT's can be put into a DenseMap / DenseSet.

llvm-svn: 313782
2017-09-20 18:01:20 +00:00
Hans Wennborg
44d1f6514a Revert r313771 "[SLP] Vectorize jumbled memory loads."
This broke the buildbots, e.g.
http://bb.pgr.jp/builders/test-llvm-i686-linux-RA/builds/391

> Summary:
> This patch tries to vectorize loads of consecutive memory accesses, accessed
> in non-consecutive or jumbled way. An earlier attempt was made with patch D26905
> which was reverted back due to some basic issue with representing the 'use mask'
> jumbled accesses.
>
> This patch fixes the mask representation by recording the 'use mask' in the usertree entry.
>
> Change-Id: I9fe7f5045f065d84c126fa307ef6ebe0787296df
>
> Subscribers: mzolotukhin
>
> Reviewed By: ayal
>
> Differential Revision: https://reviews.llvm.org/D36130
>
> Review comments updated accordingly
>
> Change-Id: I22ab0a8a9bac9d49d74baa81a08e1e486f5e75f0
>
> Added a TODO for sortLoadAccesses API
>
> Change-Id: I3c679bf1865422d1b45e17ea28f1992bca660b58
>
> Modified the TODO for sortLoadAccesses API
>
> Change-Id: Ie64a66cb5f9e2a7610438abb0e750c6e090f9565
>
> Review comment update for using OpdNum to insert the mask in respective location
>
> Change-Id: I016d0c1b29874e979efc0205bbf078991f92edce
>
> Fixes '-Wsign-compare warning' in LoopAccessAnalysis.cpp and code rebase
>
> Change-Id: I64b2ea5e68c1d7b6a028f5ef8251c5a97333f89b

llvm-svn: 313781
2017-09-20 18:00:03 +00:00
Hans Wennborg
575c7921a1 Pacify a gcc -Wparentheses warning
llvm-svn: 313780
2017-09-20 18:00:02 +00:00
Hans Wennborg
2c391c5d74 Pacify gcc's -Wnum-compare after r313775
llvm-svn: 313779
2017-09-20 18:00:02 +00:00
Adrian Prantl
25bdef70ce llvm-dwarfdump: implement --recurse-depth=<N>
This patch implements the Darwin dwarfdump option --recurse-depth=<N>,
which limits the recursion depth when selectively printing DIEs at an
offset.

Differential Revision: https://reviews.llvm.org/D38064

llvm-svn: 313778
2017-09-20 17:44:00 +00:00
Reid Kleckner
2d77714800 [DebugInfo] Use a MapVector to coalesce MachineOperand locations
Summary:
The new code should be linear in the number of DBG_VALUEs, while the old
code was quadratic. NFC intended.

This is also hopefully a more direct expression of the problem, which is
to:

1. Rewrite all virtual register operands to stack slots or physical
   registers
2. Uniquely number those machine operands, assigning them location
   numbers
3. Rewrite all uses of the old location numbers in the interval map to
   use the new location numbers

In r313400, I attempted to track which locations were spilled in a
parallel bitvector indexed by location number. My code was broken
because these location numbers are not stable during rewriting.

Reviewers: aprantl, hans

Subscribers: hiraditya, llvm-commits

Differential Revision: https://reviews.llvm.org/D38068

llvm-svn: 313775
2017-09-20 17:32:54 +00:00
Quentin Colombet
fe9e785376 [InstCombine] Add select simplifications
In these cases, two selects have constant selectable operands for
both the true and false components and have the same conditional
expression.
We then create two arithmetic operations of the same type and feed a
final select operation using the result of the true arithmetic for the true
operand and the result of the false arithmetic for the false operand and reuse
the original conditionl expression.
The arithmetic operations are naturally folded as a consequence, leaving
only the newly formed select to replace the old arithmetic operation.

Patch by: Michael Berg <michael_c_berg@apple.com>
Differential Revision: https://reviews.llvm.org/D37019

llvm-svn: 313774
2017-09-20 17:32:16 +00:00
Jake Ehrlich
f68b3a1b5f Reland "[llvm-objcopy] Add support for .dynamic, .dynsym, and .dynstr"
I did not upload two binaries that I reference in tests.

This change adds support for sections involved in dynamic loading such
as SHT_DYNAMIC, SHT_DYNSYM, and allocated string tables.

The two added binaries used for tests can be downloaded here and here

Differential Revision: https://reviews.llvm.org/D36560

llvm-svn: 313772
2017-09-20 17:22:06 +00:00
Mohammad Shahid
5a29343ec1 [SLP] Vectorize jumbled memory loads.
Summary:
This patch tries to vectorize loads of consecutive memory accesses, accessed
in non-consecutive or jumbled way. An earlier attempt was made with patch D26905
which was reverted back due to some basic issue with representing the 'use mask'
jumbled accesses.

This patch fixes the mask representation by recording the 'use mask' in the usertree entry.

Change-Id: I9fe7f5045f065d84c126fa307ef6ebe0787296df

Subscribers: mzolotukhin

Reviewed By: ayal

Differential Revision: https://reviews.llvm.org/D36130

Review comments updated accordingly

Change-Id: I22ab0a8a9bac9d49d74baa81a08e1e486f5e75f0

Added a TODO for sortLoadAccesses API

Change-Id: I3c679bf1865422d1b45e17ea28f1992bca660b58

Modified the TODO for sortLoadAccesses API

Change-Id: Ie64a66cb5f9e2a7610438abb0e750c6e090f9565

Review comment update for using OpdNum to insert the mask in respective location

Change-Id: I016d0c1b29874e979efc0205bbf078991f92edce

Fixes '-Wsign-compare warning' in LoopAccessAnalysis.cpp and code rebase

Change-Id: I64b2ea5e68c1d7b6a028f5ef8251c5a97333f89b
llvm-svn: 313771
2017-09-20 17:19:57 +00:00
Vedant Kumar
cb51713f37 [cmake] Add an option to build llvm with IR PGO
This adds an LLVM_ENABLE_IR_PGO option to enable building llvm and its
tools with IR PGO instrumentation.

Usage: -DLLVM_BUILD_INSTRUMENTED=On -DLLVM_ENABLE_IR_PGO=On (both
options must be enabled)

Differential Revision: https://reviews.llvm.org/D38066

llvm-svn: 313770
2017-09-20 17:16:01 +00:00
Vedant Kumar
0874cfae81 [cmake] Unmark LLVM_BUILD_INSTRUMENTED_COVERAGE as experimental
The coverage bot has been stable for a while:

  http://lab.llvm.org:8080/coverage/coverage-reports/index.html

llvm-svn: 313769
2017-09-20 17:16:00 +00:00
Vedant Kumar
0bafc97fe2 [docs] Make a note of LLVM_BUILD_INSTRUMENTED_COVERAGE
llvm-svn: 313768
2017-09-20 17:16:00 +00:00
Jake Ehrlich
250f0cb393 Reland "[llvm-objcopy] Add support for .dynamic, .dynsym, and .dynstr"
I overzealously landed this before I was sure that another change
wouldn't break the build that this change depends on.

This change adds support for sections involved in dynamic loading such
as SHT_DYNAMIC, SHT_DYNSYM, and allocated string tables.

The two added binaries used for tests can be downloaded here and here

Differential Revision: https://reviews.llvm.org/D36560

llvm-svn: 313767
2017-09-20 17:11:58 +00:00
Teresa Johnson
4e8f623913 [ThinLTO] Fix dead stripping analysis for SamplePGO
Summary:
The fix for dead stripping analysis in the case of SamplePGO indirect
calls to local functions (r313151) introduced the possibility of an
infinite loop.

Make sure we check for the value being already live after we update it
for SamplePGO indirect call handling.

Reviewers: danielcdh

Subscribers: mehdi_amini, inglorion, llvm-commits, eraman

Differential Revision: https://reviews.llvm.org/D38086

llvm-svn: 313766
2017-09-20 17:09:47 +00:00
Zachary Turner
2d0987456a [lit] Reverse path list when updating environment vars.
Bug pointed out by EricWF.  This would construct a path where
items would be added in the wrong order, potentially leading
to using the wrong tools for testing.

llvm-svn: 313765
2017-09-20 17:08:20 +00:00
Zachary Turner
a3baf1b07f Make libcxx tests work when llvm sources are not present.
Despite a strong CMake warning that this is an unsupported
libcxx build configuration, some bots still rely on being
able to check out lit and libcxx independently with no
LLVM sources, and then run lit against libcxx.

A previous patch broke that workflow, so this is making it work
again.  Unfortunately, it breaks generation of the llvm-lit
script for libcxx, but we will just have to live with that until
a solution is found that allows libcxx to make more use of
llvm build pieces.  libcxx can still run tests by using the
ninja check target, or by running lit.py directly against the
build tree or source tree.

Differential Revision: https://reviews.llvm.org/D38057

llvm-svn: 313763
2017-09-20 16:01:50 +00:00
David Blaikie
74b36127e6 DebugInfo: Remove unneeded attributes from test/DebugInfo/Generic/imported-name-inlined.ll
Remove unneeded attributes from test/DebugInfo/Generic/imported-name-inlined.ll because it was causing failures on pure MIPS builds.

Patch by Miloš Stojanović!

Differential Revision: https://reviews.llvm.org/D38079

llvm-svn: 313762
2017-09-20 15:59:57 +00:00
Simon Atanasyan
f79ee825be [mips] Add a valid test case to check the reason of the recent build-bot failure. NFC
llvm-svn: 313761
2017-09-20 15:57:25 +00:00
Alexander Kornienko
694b27a0ce Revert r313736: "[SLP] Vectorize jumbled memory loads."
The revision breaks buildbots:
http://lab.llvm.org:8011/builders/clang-x86_64-debian-fast/builds/6694/steps/test/logs/stdio

llvm-svn: 313758
2017-09-20 14:53:07 +00:00
Alexander Kornienko
8006791875 Revert r313753: "Fix a -Wsign-compare warning in LoopAccessAnalysis.cpp"
llvm-svn: 313757
2017-09-20 14:52:56 +00:00
Simon Pilgrim
9de2bddca5 [X86][SSE] Add PR22415 test case
llvm-svn: 313755
2017-09-20 13:49:52 +00:00
Alexander Kornienko
ae1097a240 Fix a -Wsign-compare warning in LoopAccessAnalysis.cpp
llvm-svn: 313753
2017-09-20 12:18:22 +00:00
Florian Hahn
6c9eb841b2 Recommit [MachineCombiner] Update instruction depths incrementally for large BBs.
This version of the patch fixes an off-by-one error causing PR34596. We
do not need to use std::next(BlockIter) when calling updateDepths, as
BlockIter already points to the next element.

Original commit message:
> For large basic blocks with lots of combinable instructions, the
> MachineTraceMetrics computations in MachineCombiner can dominate the compile
> time, as computing the trace information is quadratic in the number of
> instructions in a BB and it's relevant successors/predecessors.

> In most cases, knowing the instruction depth should be enough to make
> combination decisions. As we already iterate over all instructions in a basic
> block, the instruction depth can be computed incrementally. This reduces the
> cost of machine-combine drastically in cases where lots of instructions
> are combined. The major drawback is that AFAIK, computing the critical path
> length cannot be done incrementally. Therefore we only compute
> instruction depths incrementally, for basic blocks with more
> instructions than inc_threshold. The -machine-combiner-inc-threshold
> option can be used to set the threshold and allows for easier
> experimenting and checking if using incremental updates for all basic
> blocks has any impact on the performance.
>
> Reviewers: sanjoy, Gerolf, MatzeB, efriedma, fhahn
>
> Reviewed By: fhahn
>
> Subscribers: kiranchandramohan, javed.absar, efriedma, llvm-commits
>
> Differential Revision: https://reviews.llvm.org/D36619

llvm-svn: 313751
2017-09-20 11:54:37 +00:00
George Rimar
7765db43c2 Revert r313746 "[yaml2obj] - Don't crash on invalid document."
It broke BB:
http://lab.llvm.org:8011/builders/llvm-hexagon-elf/builds/9781

llvm-svn: 313748
2017-09-20 10:24:37 +00:00
George Rimar
c645861015 [yaml2obj] - Don't crash on invalid document.
Previously jaml2obj would segfault on empty document.
(without yaml description).
Patch fixes the issue.

Differential revision: https://reviews.llvm.org/D38036

llvm-svn: 313746
2017-09-20 09:57:11 +00:00
Simon Pilgrim
313372f200 [X86][SSE] Remove unnecessary NonceMasks from combineX86ShufflesRecursively calls (NFCI)
llvm-svn: 313743
2017-09-20 09:36:11 +00:00
Mikael Holmen
106d4b462c [IfConversion] Add testcases [NFC]
These tests should have been included in r310697 / D34099 but apparently
I missed them.

llvm-svn: 313737
2017-09-20 08:23:29 +00:00
Mohammad Shahid
33f617c7de [SLP] Vectorize jumbled memory loads.
Summary:
This patch tries to vectorize loads of consecutive memory accesses, accessed
in non-consecutive or jumbled way. An earlier attempt was made with patch D26905
which was reverted back due to some basic issue with representing the 'use mask' of
jumbled accesses.

This patch fixes the mask representation by recording the 'use mask' in the usertree entry.

Change-Id: I9fe7f5045f065d84c126fa307ef6ebe0787296df

Reviewers: mkuper, loladiro, Ayal, zvi, danielcdh

Reviewed By: Ayal

Subscribers: mzolotukhin

Differential Revision: https://reviews.llvm.org/D36130

Commit after rebase for patch D36130

Change-Id: I8add1c265455669ef288d880f870a9522c8c08ab
llvm-svn: 313736
2017-09-20 08:18:28 +00:00
Andrew V. Tischenko
5082d61ff1 'into' instruction should not be decoded as a valid instr in 64-bit mode
llvm-svn: 313735
2017-09-20 08:17:17 +00:00
Craig Topper
6c77770b5b [X86] Remove isel checks for immediate size on floating point compare and xop compare instructions. NFCI
If these checks fail we end up not selecting an instruction at all. So we are already relying on the immediate being checked upstream of isel. So doing the check in isel is just bloat to the isel table. Interestingly, we didn't check on the AVX512 version of the instructions anyway.

llvm-svn: 313724
2017-09-20 06:38:41 +00:00
Stanislav Mekhanoshin
6661ccf6e5 [AMDGPU] Fixed memory leak with inliner replaced
Delete inliner before replacing it.

llvm-svn: 313723
2017-09-20 06:34:28 +00:00
Matt Arsenault
281639c34b AMDGPU: Move r600 only code into r600 only td file
llvm-svn: 313719
2017-09-20 06:11:25 +00:00
Stanislav Mekhanoshin
7f4de2ed4f [AMDGPU] Fix regression in test clang/test/CodeGen/backend-unsupported-error.ll
llvm-svn: 313718
2017-09-20 06:10:15 +00:00
Matt Arsenault
8057a50cc4 AMDGPU: Match load d16 hi instructions
Also starts selecting global loads for constant address
in some cases. Some end up selecting to mubuf still, which
requires investigation.

We still get sub-optimal regalloc and extra waitcnts inserted
due to not really tracking the liveness of the separate register
halves.

llvm-svn: 313716
2017-09-20 05:01:53 +00:00
NAKAMURA Takumi
b8fb3b4666 DiagnosticInfoOptimizationBase: Appease g++-4.8.2 not confused to add an explicit type to resolve emit() as non-template function.
llvm-svn: 313715
2017-09-20 04:39:02 +00:00
Stanislav Mekhanoshin
1bdace90a3 [AMDGPU] Port of HSAIL inliner
Differential Revision: https://reviews.llvm.org/D36849

llvm-svn: 313714
2017-09-20 04:25:58 +00:00
Matt Arsenault
0000361c39 AMDGPU: Cleanup load/store PatFrags
Try to use a consistent naming scheme.

llvm-svn: 313713
2017-09-20 03:43:35 +00:00
Matt Arsenault
23103260e3 AMDGPU: Match store d16_hi instructions
llvm-svn: 313712
2017-09-20 03:20:09 +00:00