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9910 Commits

Author SHA1 Message Date
Bob Wilson
11aebf39f1 Handle Neon v2f64 and v2i64 vector shuffles as register copies. 
This fixes the remaining issue with pr7167.

llvm-svn: 104257
 2010-05-20 18:39:53 +00:00
Dan Gohman
c8b4555a94 Fix assembly parsing and encoding of the pushf and popf family of 
instructions.

llvm-svn: 104231
 2010-05-20 16:16:00 +00:00
Dan Gohman
52dcd5fb9a Define the x86 pause instruction. 
llvm-svn: 104204
 2010-05-20 01:35:50 +00:00
Dan Gohman
00b8752500 Fix the sfence instruction to use MRM_F8 instead of MRM7r, since it 
doesn't have a register operand. Also, use I instead of PSI, for
consistency with mfence and lfence.

llvm-svn: 104203
 2010-05-20 01:23:41 +00:00
Bill Wendling
e7a42798bc Match "4" or "8" depending upon if it's 32- or 64-bit. 
llvm-svn: 104196
 2010-05-20 00:27:10 +00:00
Eric Christopher
1643e2f4c6 Once more, with feeling. 
llvm-svn: 104190
 2010-05-20 00:07:13 +00:00
Dan Gohman
772b731ca5 Teach LSR how to cope better with unrolled loops on targets where 
the addressing modes don't make this trivially easy. This allows
it to avoid falling into the less precise heuristics in more
cases.

llvm-svn: 104186
 2010-05-19 23:43:12 +00:00
Chris Lattner
aedd148163 fix rdar://7986634 - match instruction opcodes case insensitively. 
llvm-svn: 104183
 2010-05-19 23:34:33 +00:00
Bill Wendling
483ce4b9b7 Testcase for r104181. 
llvm-svn: 104182
 2010-05-19 23:33:26 +00:00
Eric Christopher
8c8d643a87 A more combo tls testcase. 
llvm-svn: 104163
 2010-05-19 21:19:42 +00:00
Eric Christopher
6b51010080 Few more simple tls testcases. 
llvm-svn: 104148
 2010-05-19 20:35:15 +00:00
Jakob Stoklund Olesen
6a2bfde3c8 TwoAddressInstructionPass doesn't really know how to merge live intervals when 
lowering REG_SEQUENCE instructions.

Insert copies for REG_SEQUENCE sources not killed to avoid breaking later passes.

llvm-svn: 104146
 2010-05-19 20:08:00 +00:00
Eric Christopher
fd72aa1040 Attempt to run this test on x86 only. 
llvm-svn: 104143
 2010-05-19 18:59:37 +00:00
Bob Wilson
e5f623ac22 Testcase to go with 104141. 
llvm-svn: 104142
 2010-05-19 18:58:37 +00:00
Evan Cheng
6f52107b12 t2LEApcrel and tLEApcrel are re-materializable. This makes it possible to hoist more loads during machine LICM. 
llvm-svn: 104115
 2010-05-19 07:28:01 +00:00
Evan Cheng
632cb17357 Intrinsics which do a vector compare (results are all zero or all ones) are modeled as icmp / fcmp + sext. This is turned into a vsetcc by dag combine (yes, not a good long term solution). The targets can then isel the vsetcc to the appropriate instruction. 
The trouble arises when the result of a vector cmp + sext is then and'ed with all ones. Instcombine will turn it into a vector cmp + zext, dag combiner will miss turning it into a vsetcc and hell breaks loose after that.

Teach dag combine to turn a vector cpm + zest into a vsetcc + and 1. This fixes rdar://7923010.

llvm-svn: 104094
 2010-05-19 01:08:17 +00:00
Eric Christopher
aec869777c Add a test to make sure that we're lowering the shift amount correctly. 
llvm-svn: 104090
 2010-05-19 00:22:04 +00:00
Jakob Stoklund Olesen
f3114dbb3a Remember to update VirtRegLastUse when spilling without killing before a call. 
llvm-svn: 104074
 2010-05-18 22:20:09 +00:00
Dan Gohman
eaa3ee65bd When converting a test to a cmp to fold a load, use the cmp that has an 
8-bit immediate field rather than one with a wider immediate field.

llvm-svn: 104064
 2010-05-18 21:42:03 +00:00
Eric Christopher
79cbb29471 Quick test to make sure we're emitting the tbss section correctly. 
llvm-svn: 104063
 2010-05-18 21:40:20 +00:00
Evan Cheng
e2980af336 Sink dag combine's post index load / store code that swap base ptr and index into the target hook. Only the target knows whether the swap is safe. In Thumb2 mode, the offset must be an immediate. rdar://7998649 
llvm-svn: 104060
 2010-05-18 21:31:17 +00:00
Dale Johannesen
6b88a14922 Test passed on ppc, to my surprise; if it worked 
there it may work everywhere...

llvm-svn: 104053
 2010-05-18 20:47:04 +00:00
Evan Cheng
9fc34e676d Fix PR7162: Use source register classes and sub-indices to determine the correct register class of the definitions of REG_SEQUENCE. 
llvm-svn: 104050
 2010-05-18 20:03:28 +00:00
Dale Johannesen
00e3e62df1 Testcase for llvm-gcc checkin 104042. 
llvm-svn: 104043
 2010-05-18 19:03:51 +00:00
Kevin Enderby
438a36f66a Fixed the problem with a branch to "0b" that was not parsed by llvm-mc 
correctly.  The Lexer was incorrectly eating the newline casusing it to branch
to address 0.  Updated the test case to use a "0:" label and a branch to "0b".

llvm-svn: 104038
 2010-05-18 17:51:35 +00:00
Daniel Dunbar
739e720a21 MC/Mach-O: Implement support for setting indirect symbol table offset in section header. 
Also, create symbol data for LHS of assignment, to match 'as' symbol ordering better.

llvm-svn: 104033
 2010-05-18 17:28:24 +00:00
Daniel Dunbar
8c20c162fe MC/X86: Implement custom lowering to make sure we match things like 
X86::ADC32ri $0, %eax
to
  X86::ADC32i32 $0

llvm-svn: 104030
 2010-05-18 17:22:24 +00:00
Evan Cheng
39b5115e93 FIX PR7158. SimplifyVBinOp was asserting when it fails to constant fold (op (build_vector), (build_vector)). 
llvm-svn: 104004
 2010-05-18 00:03:40 +00:00
Evan Cheng
8aa900cf16 Fix PR7175. Insert copies of a REG_SEQUENCE source if it is used by other REG_SEQUENCE instructions. 
llvm-svn: 103994
 2010-05-17 23:24:12 +00:00
Kevin Enderby
14c986967b Added support in MC for Directional Local Labels. 
llvm-svn: 103989
 2010-05-17 23:08:19 +00:00
Eric Christopher
6ea9cf8425 More data/parsing support for tls directives. Add a few more testcases 
and cleanup comments as well.

llvm-svn: 103985
 2010-05-17 22:53:55 +00:00
Evan Cheng
378d6c5d76 Fix PR7156. If the sources of a REG_SEQUENCE are all IMPLICIT_DEF's. Replace it with an IMPLICIT_DEF rather than deleting it or else it would be left without a def. 
llvm-svn: 103984
 2010-05-17 22:09:49 +00:00
Daniel Dunbar
b18dfe6cb4 MC/Mach-O/x86: Optimal nop sequences should only be used for the .text sections, not all sections in the text segment. 
llvm-svn: 103981
 2010-05-17 21:54:30 +00:00
Daniel Dunbar
ee5ac7a69b MC/Mach-O: Reverse order of SymbolData scanning when emitting instructions. 
- This fixes a string table mismatch with 'as' when two new symbols are defined
   in a single instruction.

llvm-svn: 103979
 2010-05-17 21:19:59 +00:00
Evan Cheng
bb0a4fbe13 Careful with reg_sequence coalescing to not to overwrite sub-register indices. 
llvm-svn: 103971
 2010-05-17 20:57:12 +00:00
Daniel Dunbar
80719b2d36 MC/Mach-O: Fix some differences in symbol flag handling. 
- Don't clear weak reference flag, 'as' was only "trying" to do this, it wasn't
   actually succeeding.
 - Clear the "lazy bound" bit when we mark something external. This corresponds
   roughly to the lazy clearing of the bit that 'as' implements in
   symbol_table_lookup.
 - The exact meaning of these flags appears pretty loose, since 'as' isn't very
   consistent. For now we just try to match 'as', we will clean this up one day
   hopefully.

llvm-svn: 103964
 2010-05-17 20:12:31 +00:00
Evan Cheng
3bce87c79f Turn on -neon-reg-sequence by default. 
Using NEON load / store multiple instructions will no longer create gobs of vmov of D registers!

llvm-svn: 103960
 2010-05-17 19:51:20 +00:00
Daniel Dunbar
8f5da3624f llvm-mc: Support reassignment of variables in one special case, when the 
variable has not yet been used in an expression. This allows us to support a few
cases that show up in real code (mostly because gcc generates it for Objective-C
on Darwin), without giving up a reasonable semantic model for assignment.

llvm-svn: 103950
 2010-05-17 17:46:23 +00:00
Jakob Stoklund Olesen
c07fd51d56 Avoid allocating the same physreg to multiple virtregs in one instruction. 
While that approach works wonders for register pressure, it tends to break
everything.

This should unbreak the arm-linux builder and fix a number of miscompilations.

llvm-svn: 103946
 2010-05-17 17:18:59 +00:00
Jakob Stoklund Olesen
40545bf117 Only use clairvoyance when defining a register, and then only if it has one use. 
This makes allocation independent on the ordering of use-def chains.

llvm-svn: 103935
 2010-05-17 04:50:57 +00:00
Eric Christopher
950f0d7892 Assume that we'll handle mangling the symbols earlier and just put the 
symbol to the file as we have it.  Simplifies out tbss handling.

llvm-svn: 103928
 2010-05-17 02:13:02 +00:00
Dale Johannesen
b71d6a4150 Removing as part of previous reversion. 
llvm-svn: 103915
 2010-05-16 20:19:40 +00:00
Dale Johannesen
cf2d4b9f91 Revert 103911; it broke a test that expects bitconvert 
<1xi64> -> i64 to work in MMX registers on hosts where -no-sse
is the default (not mine).  The right thing is
to accept this and make i64->f64 conversions go through memory,
but I don't have time right now.

llvm-svn: 103914
 2010-05-16 20:19:04 +00:00
Dale Johannesen
15dce10b5a Make x86-64 64-bit bitconvert work when SSE is not available. 
(This worked as of about 6 months ago and I didn't track down
exactly what broke it; I think this fix is appropriate.)

llvm-svn: 103911
 2010-05-16 18:22:38 +00:00
Anton Korobeynikov
925a32ae37 Add support for thiscall calling convention. 
Patch by Charles Davis and Steven Watanabe!

llvm-svn: 103902
 2010-05-16 09:08:45 +00:00
Anton Korobeynikov
314ccc5501 Some cheap DAG combine goodness for multiplication with a particular constant. 
This can be extended later on to handle more "complex" constants.

llvm-svn: 103881
 2010-05-15 18:16:59 +00:00
Evan Cheng
85497bd415 Allow TargetLowering::getRegClassFor() to be called on illegal types. Also 
allow target to override it in order to map register classes to illegal
but synthesizable types. e.g. v4i64, v8i64 for ARM / NEON.

llvm-svn: 103854
 2010-05-15 02:18:07 +00:00
Bill Wendling
5fde821884 SystemZ really does mean "has calls" and not just "adjusts stack." Go ahead and 
replace the check with the appropriate predicate. Modify the testcase to reflect
the correct code. (It should be saving callee-saved registers on the stack
allocated by the calling fuction.)

llvm-svn: 103829
 2010-05-14 22:17:42 +00:00
Devang Patel
6bbba26bf1 Test case for r103800. 
llvm-svn: 103801
 2010-05-14 21:04:45 +00:00
Kevin Enderby
dc13d89540 Fix so "int3" is correctly accepted, added "into" and fixed "int" with an 
argument, like "int $4", to not get an Assertion error.

llvm-svn: 103791
 2010-05-14 19:16:02 +00:00