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Commit Graph

151306 Commits

Author SHA1 Message Date
Simon Pilgrim
144dd3c621 [Sparc] Fix -Wimplicit-fallthrough warning. NFCI.
llvm-svn: 307378
2017-07-07 10:14:46 +00:00
Alex Lorenz
a6dc00a25f Update the Windows version of updateTripleOSVersion to account for
changes in r307372

llvm-svn: 307377
2017-07-07 10:08:52 +00:00
Simon Pilgrim
a399a4d551 [SystemZ] Fix -Wimplicit-fallthrough warnings. NFCI.
llvm-svn: 307376
2017-07-07 10:07:09 +00:00
Simon Pilgrim
8cca661544 [Arm] Fix -Wimplicit-fallthrough warnings. NFCI.
llvm-svn: 307375
2017-07-07 10:05:45 +00:00
Simon Pilgrim
211b55102e [Hexagon] Fix -Wimplicit-fallthrough warnings. NFCI.
llvm-svn: 307374
2017-07-07 10:04:12 +00:00
Alex Lorenz
1741b91584 [Support] sys::getProcessTriple should return a macOS triple using
the system's version of macOS

sys::getProcessTriple returns LLVM_HOST_TRIPLE, whose system version might not
be the actual version of the system on which the compiler running. This commit
ensures that, for macOS, sys::getProcessTriple returns a triple with the
system's macOS version.

rdar://33177551

Differential Revision: https://reviews.llvm.org/D34446

llvm-svn: 307372
2017-07-07 09:53:47 +00:00
Florian Hahn
e531d186af [AArch64] Add test case for preferred function alignment (NFC).
Reviewers: evandro, joelkevinjones, mcrosier

Reviewed By: joelkevinjones, mcrosier

Subscribers: mcrosier, aemerson, llvm-commits, rengolin, evandro, javed.absar, joelkevinjones, kristof.beyls

Differential Revision: https://reviews.llvm.org/D34951

llvm-svn: 307369
2017-07-07 09:17:53 +00:00
Diana Picus
7a450fe6fd [ARM] GlobalISel: Fixup r307365
Rename member DebugLoc -> DbgLoc (so it doesn't conflict with the class
name).

llvm-svn: 307366
2017-07-07 08:53:27 +00:00
Diana Picus
fc47e4e210 [ARM] GlobalISel: Select hard G_FCMP for s32
We lower to a sequence consisting of:
- MOVi 0 into a register
- VCMPS to do the actual comparison and set the VFP flags
- FMSTAT to move the flags out of the VFP unit
- MOVCCi to either use the "zero register" that we have previously set
  with the MOVi, or move 1 into the result register, based on the values
  of the flags

As was the case with soft-float, for some predicates (one, ueq) we
actually need two comparisons instead of just one. When that happens, we
generate two VCMPS-FMSTAT-MOVCCi sequences and chain them by means of
using the result of the first MOVCCi as the "zero register" for the
second one. This is a bit overkill, since one comparison followed by
two non-flag-setting conditional moves should be enough. In any case,
the backend manages to CSE one of the comparisons away so it doesn't
matter much.

Note that unlike SelectionDAG and FastISel, we always use VCMPS, and not
VCMPES. This makes the code a lot simpler, and it also seems correct
since the LLVM Lang Ref defines simple true/false returns if the
operands are QNaN's. For SNaN's, even VCMPS throws an Invalid Operand
exception, so they won't be slipping through unnoticed.

Implementation-wise, this introduces a template so we can share the same
code that we use for handling integer comparisons, since the only
differences are in the details (exact opcodes to be used etc). Hopefully
this will be easy to extend to s64 G_FCMP.

llvm-svn: 307365
2017-07-07 08:39:04 +00:00
Craig Topper
638d01fc9f [TableGen] Cleanup capturing of instruction namespace for the fast isel emitter to remove a std::string and duplicated code. NFC
llvm-svn: 307363
2017-07-07 06:22:36 +00:00
Craig Topper
c19a7dc04a [TableGen] Use StringRef instead of std::string for CodeGenInstruction namespace. NFC
llvm-svn: 307362
2017-07-07 06:22:35 +00:00
Craig Topper
af9e9d0d1a [TableGen] Add a proper namespace to an Instruction in an AsmMatcher test. This is required after r307358.
llvm-svn: 307361
2017-07-07 05:50:45 +00:00
Rafael Espindola
f9132eae4f Reduce code duplication.
By addding a mapNameToDWARFSection we only need to check section names
in one place.

llvm-svn: 307359
2017-07-07 05:36:53 +00:00
Craig Topper
7d14114241 [TableGen] Fix some mismatches in the use of Namespace fields versus Target name in some of our emitters.
Some of our emitters were using the name of the Target to reference things that were created by others emitters using Namespace.

Apparently all targets have the same Target name as their instruction and register Namespace field?

Someone on IRC had a target that didn't do this and was getting build errors. This patch is a necessary, but maybe not sufficient fix.

llvm-svn: 307358
2017-07-07 05:19:25 +00:00
Zachary Turner
8ef979bdc8 [PDB] Teach libpdb to write DBI Stream ECNames.
Based strictly on the name, this seems to have something to do
width edit & continue.  The goal of this patch has nothing to do
with supporting edit and continue though.  msvc link.exe writes
very basic information into this area even when *not* compiling
with support for E&C, and so the goal here is to bring lld-link
to parity.  Since we cannot know what assumptions standard tools
make about the content of PDB files, we need to be as close as
possible.

This ECNames data structure is a standard PDB string hash table.
link.exe puts a single string into this hash table, which is the
full path to the PDB file on disk.  It then references this string
from the module descriptor for the compiler generated `* Linker *`
module.

With this patch, lld-link will generate the exact same sequence of
bytes as MSVC link for this subsection for a given object file
input (as reported by `llvm-pdbutil bytes -ec`).

llvm-svn: 307356
2017-07-07 05:04:36 +00:00
Lang Hames
bf126cc890 [Orc] Add missing return value (left out in r307350).
llvm-svn: 307354
2017-07-07 03:22:57 +00:00
Tony Tye
2e2fda4b55 Correct GFX9 processor names.
Differential Revision: https://reviews.llvm.org/D33736

llvm-svn: 307353
2017-07-07 03:10:01 +00:00
Matthias Braun
100d5916de RegisterScavenging: Fix PR33687
When scavenging for a use in instruction MI, we will reload after
that instruction and hence cannot spill uses/defs of this instruction.

This fixes http://llvm.org/PR33687

llvm-svn: 307352
2017-07-07 03:02:18 +00:00
Matthias Braun
3df3235c8d LiveRegUnits: Rename accumulateBackward()->accumulate()
Contrary to the stepForward()/stepBackward() method accumulate() doesn't
have a direction as defs, uses and clobbers all have the same effect.

Also improve the documentation comment.

llvm-svn: 307351
2017-07-07 03:02:17 +00:00
Lang Hames
94e6e7207c [ORC] Errorize the ORC APIs.
This patch updates the ORC layers and utilities to return and propagate
llvm::Errors where appropriate. This is necessary to allow ORC to safely handle
error cases in cross-process and remote JITing.

llvm-svn: 307350
2017-07-07 02:59:13 +00:00
Yaxun Liu
1a5878b840 [InferAddressSpaces] Fix assertion about null pointer
InferAddressSpaces does not check address space in collectFlatAddressExpressions,
which causes values with non flat address space put into Postorder and causes
assertion in cloneValueWithNewAddressSpace.

This patch fixes assertion in OpenCL 2.0 conformance test generic_address_space
subtest for amdgcn target.

Differential Revision: https://reviews.llvm.org/D34991

llvm-svn: 307349
2017-07-07 02:40:13 +00:00
Sam Clegg
b11d8eb34f [WebAssembly] Support weak defined symbols
Model weakly defined symbols as symbols that are both
exports and imported and marked as weak. Local references
to the symbols refer to the import but the linker can
resolve this to the weak export if not strong symbol
is found at link time.

Differential Revision: https://reviews.llvm.org/D35029

llvm-svn: 307348
2017-07-07 02:01:29 +00:00
Sean Fertile
2de601c7f8 Extend memcpy expansion in Transform/Utils to handle wider operand types.
Adds loop expansions for known-size and unknown-sized memcpy calls, allowing the
target to provide the operand types through TTI callbacks. The default values
for the TTI callbacks use int8 operand types and matches the existing behaviour
if they aren't overridden by the target.

Differential revision: https://reviews.llvm.org/D32536

llvm-svn: 307346
2017-07-07 02:00:06 +00:00
Evgeniy Stepanov
b030cd7232 Revert r307342, r307343.
Revert "Copy arguments passed by value into explicit allocas for ASan."
Revert "[asan] Add end-to-end tests for overflows of byval arguments."

Build failure on lldb-x86_64-ubuntu-14.04-buildserver.
Test failure on clang-cmake-aarch64-42vma and sanitizer-x86_64-linux-android.

llvm-svn: 307345
2017-07-07 01:31:23 +00:00
Evgeniy Stepanov
798fe78d37 Copy arguments passed by value into explicit allocas for ASan.
ASan determines the stack layout from alloca instructions. Since
arguments marked as "byval" do not have an explicit alloca instruction, ASan
does not produce red zones for them. This commit produces an explicit alloca
instruction and copies the byval argument into the allocated memory so that red
zones are produced.

Patch by Matt Morehouse.

Differential revision: https://reviews.llvm.org/D34789

llvm-svn: 307342
2017-07-07 00:48:25 +00:00
Anna Thomas
febdeffb6b [SafepointIRVerifier] NFC: Refactor code for identifying exclusive base type
Added a new Enum to identify if the base pointer is exclusively null or
exlusively some constant or not exclusively any constant.
Converted the base pointer identification method from recursive to
iterative form.

llvm-svn: 307340
2017-07-07 00:40:37 +00:00
George Karpenkov
e55b0ad210 [lit] Modify LIT to accept environment variable LIT_FILTER to select tests.
This is especially useful when lit is invoked indirectly by the build
system, and additional arguments can not be easily specified.

Differential Revision: https://reviews.llvm.org/D35091

llvm-svn: 307339
2017-07-07 00:22:11 +00:00
Wei Mi
a3256711ec [ConstHoisting] Turn on consthoist-with-block-frequency by default.
Using profile information to guide consthoisting is generally helpful for
performance, so the patch turns it on by default. No compile time or perf
regression were found using spec2000 and spec2006 on x86.  Some significant
improvement (>20%) was seen on internal benchmarks.

Differential Revision: https://reviews.llvm.org/D35063

llvm-svn: 307338
2017-07-07 00:11:05 +00:00
Michael Kuperstein
edd218dbfd Reverting r307326 because it breaks clang tests.
llvm-svn: 307334
2017-07-06 23:24:39 +00:00
Craig Topper
a149827294 [InstCombine] No need to pass DataLayout to helper functions if we're passing the InstCombiner object. We can just ask it for the DataLayout. NFC
llvm-svn: 307333
2017-07-06 23:18:43 +00:00
Craig Topper
743fbcd524 [InstCombine] Remove unused arguments from some helper functions. NFC
llvm-svn: 307332
2017-07-06 23:18:42 +00:00
Craig Topper
4eacd258b8 [InstCombine] Change a couple helper functions to only take the IRBuilder as an argument and not the whole InstCombiner object. NFC
llvm-svn: 307331
2017-07-06 23:18:41 +00:00
Wei Mi
538215e467 [ConstHoisting] choose to hoist when frequency is the same.
The patch is to adjust the strategy of frequency based consthoisting:
Previously when the candidate block has the same frequency with the existing
blocks containing a const, it will not hoist the const to the candidate block.
For that case, now we change the strategy to hoist the const if only existing
blocks have more than one block member. This is helpful for reducing code size.

Differential Revision: https://reviews.llvm.org/D35084

llvm-svn: 307328
2017-07-06 22:32:27 +00:00
Michael Kuperstein
dc71dcb613 [NVPTX] Add lowering of i128 params.
The patch adds support of i128 params lowering. The changes are quite trivial to
support i128 as a "special case" of integer type. With this patch, we lower i128
params the same way as aggregates of size 16 bytes: .param .b8 _ [16].

Currently, NVPTX can't deal with the 128 bit integers:
* in some cases because of failed assertions like
ValVTs.size() == OutVals.size() && "Bad return value decomposition"
* in other cases emitting PTX with .i128 or .u128 types (which are not valid [1])
[1] http://docs.nvidia.com/cuda/parallel-thread-execution/index.html#fundamental-types

Differential Revision: https://reviews.llvm.org/D34555
Patch by: Denys Zariaiev (denys.zariaiev@gmail.com)

llvm-svn: 307326
2017-07-06 22:18:54 +00:00
Lang Hames
231abab692 [ORC] Add missing <memory> include for shared_ptr.
Accidentally left out of r307319.

llvm-svn: 307322
2017-07-06 22:02:49 +00:00
David L. Jones
e88e36fbfd Change remaining references to lit.util.capture to use subprocess.check_output.
Summary:
The capture() function was removed in r306625. This should fix PGO breakages
reported by Michael Zolotukhin.

Reviewers: mzolotukhin

Subscribers: sanjoy, llvm-commits

Differential Revision: https://reviews.llvm.org/D35088

llvm-svn: 307320
2017-07-06 21:46:47 +00:00
Lang Hames
64864662ab [ORC] Update GlobalMappingLayer::addModuleSet to addModule.
This layer was accidentally left out of r306166.

llvm-svn: 307319
2017-07-06 21:33:48 +00:00
Rafael Espindola
183c4a2f4b Use @LINE in two more tests.
llvm-svn: 307318
2017-07-06 21:33:23 +00:00
Martin Storsjo
0743dfe73a [COFF, AArch64] Set the private label prefix to .L
This fixes calls to external functions starting with a capital L,
fixing errors like this:
fatal error: error in backend: assembler label 'LocalFree' can not be undefined

Differential Revision: https://reviews.llvm.org/D35079

llvm-svn: 307317
2017-07-06 21:08:34 +00:00
Matt Arsenault
8858f865a6 AMDGPU: Add macro fusion schedule DAG mutation
Try to increase opportunities to shrink vcc uses.

llvm-svn: 307313
2017-07-06 20:57:05 +00:00
Matt Arsenault
67da610b84 AMDGPU: Minor cleanup of shrinking logic
llvm-svn: 307312
2017-07-06 20:56:59 +00:00
Matt Arsenault
fd56791db3 AMDGPU: Remove unnecessary IR from MIR tests
llvm-svn: 307311
2017-07-06 20:56:57 +00:00
Reid Kleckner
8b4beffcce [lit] Factor out some shell input/output redirection logic, NFC
This is a very light refactoring aimed at improving readability. There
is definitely still room for improvement here.

llvm-svn: 307310
2017-07-06 20:40:27 +00:00
Stanislav Mekhanoshin
c39b2b753b [AMDGPU] Always use rcp + mul with fast math
Regardless of relaxation options such as -cl-fast-relaxed-math
we are producing rather long code for fdiv via amdgcn_fdiv_fast
intrinsic. This intrinsic is used to replace fdiv with 2.5ulp
metadata and does not handle denormals, thus believed to be fast.

An fdiv instruction can also have fast math flag either by itself
or together with fpmath metadata. Clang used with a relaxation flag
always produces both metadata and fast flag:

%div = fdiv fast float %v, %0, !fpmath !12
!12 = !{float 2.500000e+00}

Current implementation ignores fast flag and favors metadata. An
instruction with just fast flag would be lowered to a fastest rcp +
mul, but that never happen on practice because of described mutual
clang and BE behavior.

This change allows an "fdiv fast" to be always lowered as rcp + mul.

Differential Revision: https://reviews.llvm.org/D34844

llvm-svn: 307308
2017-07-06 20:34:21 +00:00
Davide Italiano
507123e6ff [lib/LTO] Add a comment to explain where we set the linkage in the summary.
Pointed out by Teresa!

llvm-svn: 307305
2017-07-06 20:04:20 +00:00
Chad Rosier
75f3890adc [ValueTracking] Support icmps fed by 'and' and 'or'.
This patch adds support for handling some forms of ands and ors in
ValueTracking's isImpliedCondition API.

PR33611
https://reviews.llvm.org/D34901

llvm-svn: 307304
2017-07-06 20:00:25 +00:00
Davide Italiano
7937292912 [LTO] Fix the interaction between linker redefined symbols and ThinLTO
This is the same as r304719 but for ThinLTO.
The substantial difference is that in this case we don't have
whole visibility, just the summary.
In the LTO case, when we got the resolution for the input file we
could just see if the linker told us whether a symbol was linker
redefined (using --wrap or --defsym) and switch the linkage directly
for the GV.

Here, we have the summary. So, we record that the linkage changed
from <whatever it was> to $weakany to prevent IPOs across this symbol
boundaries and actually just switch the linkage at FunctionImport time.

This patch should also fixes the lld bits (as all the scaffolding for
communicating if a symbol is linker redefined should be there & should
be the same), but I'll make sure to add some tests there as well.

Fixes PR33192.

Differential Revision:  https://reviews.llvm.org/D35064

llvm-svn: 307303
2017-07-06 19:58:26 +00:00
Aditya Nandakumar
8b33f4001f [GISel]: Enhance the MachineIRBuilder API
Allows the MachineIRBuilder APIs to directly create registers (based on
LLT or TargetRegisterClass) as well as accept MachineInstrBuilders
and implicitly converts to register(with getOperand(0).getReg()).

Eg usage:
LLT s32 = LLT::scalar(32);
auto C32 = Builder.buildConstant(s32, 32);
auto Tmp = Builder.buildInstr(TargetOpcode::G_SUB, s32, C32,
OtherReg);
auto Tmp2 = Builder.buildInstr(Opcode, DstReg,
Builder.buildConstant(s32, 31)); ....

Only a few methods added for now.

Reviewed by Tim

llvm-svn: 307302
2017-07-06 19:40:07 +00:00
Simon Pilgrim
d66da5ff80 [X86][SSE] Tests for bitcasting iX integers to vXi1 boolean vectors
Including sign/zero extension to legal types

llvm-svn: 307301
2017-07-06 19:33:10 +00:00
Rafael Espindola
2c69b18b4d Add @LINE to checks in a test.
This makes it a lot easier to see which error failed a check.

llvm-svn: 307300
2017-07-06 19:09:35 +00:00