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Author SHA1 Message Date
Evan Cheng
5a218b203a Move isUnpredicatedTerminator() default implementation to TargetInstrInfoImpl to break Target's dependency on CodeGen. 
llvm-svn: 146247
 2011-12-09 06:41:08 +00:00
Evan Cheng
e186276896 Remove hasSSE1orAVX(). It's the same as hasXMM(). 
llvm-svn: 146246
 2011-12-09 06:32:46 +00:00
Andrew Trick
4f0b3bb42b Add -unroll-runtime for unrolling loops with run-time trip counts. 
Patch by Brendon Cahoon!

This extends the existing LoopUnroll and LoopUnrollPass. Brendon
measured no regressions in the llvm test suite with -unroll-runtime
enabled. This implementation works by using the existing loop
unrolling code to unroll the loop by a power-of-two (default 8). It
generates an if-then-else sequence of code prior to the loop to
execute the extra iterations before entering the unrolled loop.

llvm-svn: 146245
 2011-12-09 06:19:40 +00:00
Evan Cheng
2c8bac6b4c Forgot setting -march. 
llvm-svn: 146244
 2011-12-09 06:15:00 +00:00
Chandler Carruth
18c74d444a Fix InitializeNativeTargetAsmParser in CMake builds by defining the 
appropriate macro. Patch by Alexey Prokhin. Fixes PR11498.

llvm-svn: 146239
 2011-12-09 03:31:58 +00:00
Rafael Espindola
82e22767cf Handle the case of the magical _GLOBAL_OFFSET_TABLE_ showing up in a 
symbol difference. This matches gas behavior and fixes PR11513.

We still don't handle _GLOBAL_OFFSET_TABLE_ in data sections.

llvm-svn: 146238
 2011-12-09 03:03:58 +00:00
Chad Rosier
00721ab85b Typo. 
llvm-svn: 146234
 2011-12-09 02:00:44 +00:00
Akira Hatanaka
8477374125 Rename WrapperPIC. It is now used for both pic and static. 
llvm-svn: 146232
 2011-12-09 01:53:17 +00:00
Akira Hatanaka
ce89ae9f84 jalr should use t9 ($25) for indirect calls regardless of the relocation model 
specified.

llvm-svn: 146229
 2011-12-09 01:45:12 +00:00
Devang Patel
361be2683a Fix comment. 
llvm-svn: 146226
 2011-12-09 01:25:04 +00:00
Devang Patel
cba55d6c8d Update stale comment. 
llvm-svn: 146220
 2011-12-09 01:18:48 +00:00
Eli Friedman
8f3db3867c Fix a couple of logic bugs in TargetLowering::SimplifyDemandedBits. PR11514. 
llvm-svn: 146219
 2011-12-09 01:16:26 +00:00
Michael J. Spencer
fd9b0302a7 unittests/SupportTests: Fix test. pop modifies the current entry, thus the 
dontlookhere check must be after it.

llvm-svn: 146217
 2011-12-09 01:14:41 +00:00
Michael J. Spencer
4239ea1e2e unittests/SupportTests: Add some outs()'s to debug the issues on some bots. 
I have run these tests under many configurations on the exact same OS as
the failures, and I can't reproduce them :(.

llvm-svn: 146214
 2011-12-09 00:45:09 +00:00
Devang Patel
a56a1ac691 Revert r146184. I am seeing performance regression cause by this patch in one test case. 
llvm-svn: 146205
 2011-12-08 23:52:00 +00:00
Jim Grosbach
5f3c519248 ARM convenience aliases for VSQRT. 
llvm-svn: 146201
 2011-12-08 22:51:25 +00:00
Michael J. Spencer
d85f1f84f3 Support/FileSystem: Implement recursive_directory_iterator and make 
directory_iterator preserve InputIterator semantics on copy.

llvm-svn: 146200
 2011-12-08 22:50:09 +00:00
Nick Lewycky
d2c1661e9f Fix infinite loop in DSE when deleting a free in a reachable loop that's also 
trivially infinite.

llvm-svn: 146197
 2011-12-08 22:36:35 +00:00
Evan Cheng
ad8debd736 Add 256-bit variant vmovss and vmovsd patterns. rdar://10538417 
llvm-svn: 146196
 2011-12-08 22:30:45 +00:00
Eli Friedman
2e78501430 Remove reference to dead GEPSplitterPass. PR11506. 
llvm-svn: 146195
 2011-12-08 22:28:17 +00:00
Jim Grosbach
62873cae5f ARM 64-bit VEXT assembly uses a .64 suffix, not .32, amazingly enough. 
llvm-svn: 146194
 2011-12-08 22:19:04 +00:00
Owen Anderson
285891eccf Enhance both TargetLibraryInfo and SelectionDAGBuilder so that the latter can use the former to prevent the formation of libm SDNode's when -fno-builtin is passed. 
llvm-svn: 146193
 2011-12-08 22:15:21 +00:00
Jim Grosbach
a33fa8aa88 ARM VSHR implied destination operand form aliases. 
llvm-svn: 146192
 2011-12-08 22:06:06 +00:00
Evan Cheng
d8a73b8918 Add various missing AVX patterns which was causing crashes. Sadly, the generated 
code looks pretty bad compared to SSE.

rdar://10538793

llvm-svn: 146191
 2011-12-08 22:05:28 +00:00
Jim Grosbach
af9cc198cf Tidy up a bit. 
llvm-svn: 146190
 2011-12-08 22:04:40 +00:00
Devang Patel
9680ebaff4 Refactor. No intentional functionality change. 
llvm-svn: 146187
 2011-12-08 21:48:01 +00:00
Chad Rosier
d0a0415340 Add rather verbose stats for fast-isel failures. 
llvm-svn: 146186
 2011-12-08 21:37:10 +00:00
Jim Grosbach
01485b7e6e ARM asm parser, just issue a warning for a duplicate reg in a list. 
For better 'gas' compatibility.

llvm-svn: 146185
 2011-12-08 21:34:20 +00:00
Devang Patel
edfacfabb8 Filter "sink to" candidate blocks sooner. This avoids unnecessary computation to determine whether the block dominates all uses or not. 
llvm-svn: 146184
 2011-12-08 21:33:23 +00:00
Akira Hatanaka
6ba1394c6d Pass a GlobalAddress instead of an ExternalSymbol to LowerCallTo in 
MipsTargetLowering::LowerGlobalTLSAddress. This is necessary to have
call16(__tls_get_addr) emitted instead of got_disp(__tls_get_addr) when the
target is Mips64.

llvm-svn: 146183
 2011-12-08 21:05:38 +00:00
Jim Grosbach
78020c4642 ARM VSUB implied destination operand form aliases. 
llvm-svn: 146182
 2011-12-08 20:56:26 +00:00
Jim Grosbach
957be45ccf Tidy up a bit. 
llvm-svn: 146181
 2011-12-08 20:53:19 +00:00
Owen Anderson
b622630e01 Don't explicitly marked libm rounding ops as legal on SSE4.1/AVX. There don't seem to be patterns for these, so I don't know why they were marked legal in the first place. 
Fixes failures caused by r146171.

llvm-svn: 146180
 2011-12-08 20:51:38 +00:00
Jim Grosbach
a33af36947 ARM VQADD implied destination operand form aliases. 
llvm-svn: 146179
 2011-12-08 20:49:43 +00:00
Jim Grosbach
405e213008 ARM a few more VMUL implied destination operand form aliases. 
llvm-svn: 146177
 2011-12-08 20:42:35 +00:00
Akira Hatanaka
2204c910be Implement 64-bit support for thread local storage handling. 
- Modify lowering of global TLS address nodes.
- Modify isel of ThreadPointer.
- Wrap target global TLS address nodes that are operands of loads with WrapperPIC. 
- Remove Mips-specific DAG nodes TlsGd, TprelHi and TprelLo, which can be
  substituted with other existing nodes.

llvm-svn: 146175
 2011-12-08 20:34:32 +00:00
Owen Anderson
d003a613e7 Teach SelectionDAG to match more calls to libm functions onto existing SDNodes. Mark these nodes as illegal by default, unless the target declares otherwise. 
llvm-svn: 146171
 2011-12-08 19:32:14 +00:00
Jim Grosbach
f79eacae90 ARM assembler support for register name aliases. 
rdar://10550084

llvm-svn: 146170
 2011-12-08 19:27:38 +00:00
Evan Cheng
320b2be38c Make MachineInstr instruction property queries more flexible. This change all 
clients to decide whether to look inside bundled instructions and whether
the query should return true if any / all bundled instructions have the
queried property.

llvm-svn: 146168
 2011-12-08 19:23:10 +00:00
Evan Cheng
0e0e920975 Add test for r146163. 
llvm-svn: 146167
 2011-12-08 19:21:39 +00:00
Evan Cheng
93e29adc2f Many of the SSE patterns should not be selected when AVX is available. This led to the following code in X86Subtarget.cpp 
if (HasAVX)
    X86SSELevel = NoMMXSSE;

This is so patterns that are predicated on hasSSE3, etc. would not be selected when avx is available. Instead, the AVX variant is selected.
However, this breaks instructions which do not have AVX variants.

The right way to fix this is for the SSE but not-AVX patterns to predicate on something like hasSSE3() && !hasAVX().
Then we can take out the hack in X86Subtarget.cpp. Patterns which do not have AVX variants do not need to change.

However, we need to audit all the patterns before we make the change. This patch is workaround that fixes one specific case,
the prefetch instructions. rdar://10538297

llvm-svn: 146163
 2011-12-08 19:00:42 +00:00
Daniel Dunbar
c192ce505d Revert r146143, "Fix bug 9905: Failure in code selection for llvm intrinsics 
sqrt/exp (fix for FSQRT, FSIN, FCOS, FPOWI, FPOW, FLOG, FLOG2, FLOG10, FEXP,
FEXP2).", it is failing tests.

llvm-svn: 146157
 2011-12-08 17:32:18 +00:00
NAKAMURA Takumi
671c1da473 test/CodeGen/X86/vec_compare-2.ll: Add explicit -mtriple=i686-linux. 
llvm-svn: 146152
 2011-12-08 15:24:09 +00:00
Jan Sjödin
fb32802944 Src2 and src3 were accidentally swapped for the FMA4 rr patterns. Undo this and fix the encoding. 
llvm-svn: 146151
 2011-12-08 14:43:19 +00:00
Nadav Rotem
341b30a457 Fix a bug in the integer-promotion of bitcast operations on vector types. 
We must not issue a bitcast operation for integer-promotion of vector types, because the
location of the values in the vector may be different.

llvm-svn: 146150
 2011-12-08 13:10:01 +00:00
Stepan Dyatkovskiy
8fde5b6eb4 Fix bug 9905: Failure in code selection for llvm intrinsics sqrt/exp (fix for FSQRT, FSIN, FCOS, FPOWI, FPOW, FLOG, FLOG2, FLOG10, FEXP, FEXP2). 
llvm-svn: 146143
 2011-12-08 07:55:03 +00:00
Hal Finkel
fc4a5889c2 MTCTR needs to be glued to BCTR so that CTR is not marked dead in MTCTR (another find by -verify-machineinstrs) 
llvm-svn: 146137
 2011-12-08 04:36:44 +00:00
Pete Cooper
5e48c1e8e3 Reverting r145899 as it breaks clang self-hosting 
llvm-svn: 146136
 2011-12-08 03:24:10 +00:00
Jim Grosbach
e1fe053f6e ARM NEON two-operand aliases for VSHL(immediate). 
llvm-svn: 146125
 2011-12-08 01:30:04 +00:00
Jakob Stoklund Olesen
7b5f22051a Drop the HasInlineAsm flag. 
It is not used any more. We are tracking inline assembly misalignments
directly through the BBInfo.Unalign and KnownBits fields.

A simple conservative size estimate is not good enough since it can
cause alignment padding to be underestimated.

llvm-svn: 146124
 2011-12-08 01:22:39 +00:00