1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-01 16:33:37 +01:00
Commit Graph

78712 Commits

Author SHA1 Message Date
Stepan Dyatkovskiy
14cb78c6fb Fix for bug #11429: Wrong behaviour for switches. Small improvement for code size heuristics.
llvm-svn: 146578
2011-12-14 19:19:17 +00:00
Dan Gohman
e9572aa680 It turns out that clang does use pointer-to-function types to
point to ARC-managed pointers sometimes. This fixes rdar://10551239.

llvm-svn: 146577
2011-12-14 19:10:53 +00:00
Jakob Stoklund Olesen
bc1bb8d763 Fix speling and 80-col.
llvm-svn: 146575
2011-12-14 18:49:13 +00:00
Akira Hatanaka
3fca32d88e Add support for local dynamic TLS model in LowerGlobalTLSAddress. Direct object
emission is not supported yet, but a patch that adds the support should follow
soon.

llvm-svn: 146572
2011-12-14 18:26:41 +00:00
Jim Grosbach
7f0853a3f9 Fix copy/pasto that skipped the 'modify' step.
llvm-svn: 146571
2011-12-14 18:12:37 +00:00
Jim Grosbach
87066950b3 ARM/Thumb2 mov vs. mvn alias goes both ways.
llvm-svn: 146570
2011-12-14 17:56:51 +00:00
Chad Rosier
879f983406 VFP2 is required for FP loads. Noticed by inspection.
llvm-svn: 146569
2011-12-14 17:55:03 +00:00
Chad Rosier
4cb75ebb48 Tidy up.
llvm-svn: 146568
2011-12-14 17:32:02 +00:00
Jim Grosbach
54372eef76 ARM/Thumb2 'cmp rn, #imm' alias to cmn.
When 'cmp rn #imm' doesn't match due to the immediate not being representable,
but 'cmn rn, #-imm' does match, use the latter in place of the former, as
it's equivalent.

rdar://10552389

llvm-svn: 146567
2011-12-14 17:30:24 +00:00
Chad Rosier
c642144c4e Fix 80-column violation and extraneous brackets.
llvm-svn: 146566
2011-12-14 17:26:05 +00:00
Duncan Sands
1de7ae0e43 Vectors are not aggregate types (see isAggregateType).
llvm-svn: 146561
2011-12-14 15:44:20 +00:00
NAKAMURA Takumi
f9188630a4 llvm/lib/CodeGen: Fix cmake build since r146542.
llvm-svn: 146550
2011-12-14 03:50:53 +00:00
Eli Friedman
760c0f359a Fix a stupid typo in MemDepPrinter.
llvm-svn: 146549
2011-12-14 02:54:39 +00:00
Eli Friedman
eb387f51bc Add missing cases to SDNode::getOperationName(). Patch by Micah Villmow.
llvm-svn: 146548
2011-12-14 02:28:54 +00:00
Evan Cheng
3257bff430 Allow target to specify register output dependency. Still default to one.
llvm-svn: 146547
2011-12-14 02:28:53 +00:00
Bill Wendling
66a97b48f3 Revert r146481 to review possible miscompilations.
llvm-svn: 146546
2011-12-14 02:18:26 +00:00
Bill Wendling
0ee400172b Disable to review some failures.
llvm-svn: 146545
2011-12-14 02:16:54 +00:00
Jim Grosbach
628ae663ef ARM assembler support for the target-specific .req directive.
rdar://10549683

llvm-svn: 146543
2011-12-14 02:16:11 +00:00
Evan Cheng
68ba5536f3 - Add MachineInstrBundle.h and MachineInstrBundle.cpp. This includes a function
to finalize MI bundles (i.e. add BUNDLE instruction and computing register def
  and use lists of the BUNDLE instruction) and a pass to unpack bundles.
- Teach more of MachineBasic and MachineInstr methods to be bundle aware.
- Switch Thumb2 IT block to MI bundles and delete the hazard recognizer hack to
  prevent IT blocks from being broken apart.

llvm-svn: 146542
2011-12-14 02:11:42 +00:00
Chad Rosier
33f40b2c25 Add newline at EOF.
llvm-svn: 146538
2011-12-14 01:34:39 +00:00
Nick Lewycky
b5bf0582aa DW_AT_virtuality is also defined to be constant, not flag.
llvm-svn: 146534
2011-12-14 00:56:07 +00:00
Chad Rosier
cddacd5cf6 Per discussion on the list, remove BitcodeVerify pass to reimplement as a free function.
llvm-svn: 146531
2011-12-14 00:29:31 +00:00
Kostya Serebryany
7d3cbe255e [asan] remove .preinit_array from the compiler module (it breaks .so builds). This should be done in the run-time.
llvm-svn: 146527
2011-12-14 00:01:51 +00:00
Michael J. Spencer
02c5e58b03 llvm-nm: refactor in order to support reading files from stdin.
llvm-svn: 146524
2011-12-13 23:17:29 +00:00
Michael J. Spencer
5cf93fd736 Support/FileSystem: Add file_magic and move a vew clients over to it.
llvm-svn: 146523
2011-12-13 23:17:12 +00:00
Michael J. Spencer
52d5a254bc Support/Program: Make Change<stream>ToBinary return error_code.
llvm-svn: 146522
2011-12-13 23:16:49 +00:00
Michael J. Spencer
8d2c45200a Cleanup whitespace.
llvm-svn: 146521
2011-12-13 23:16:15 +00:00
Jim Grosbach
089ad574d8 Thumb2 assembler aliases for "mov(shifted register)"
rdar://10549767

llvm-svn: 146520
2011-12-13 22:45:11 +00:00
Jim Grosbach
bd33fc6efd ARM LDM/STM system instruction variants.
rdar://10550269

llvm-svn: 146519
2011-12-13 21:48:29 +00:00
Jim Grosbach
11f15ddaab Thumb2 pre/post indexed stores can be from any non-PC GPR.
rdar://10549786

llvm-svn: 146518
2011-12-13 21:10:25 +00:00
Jim Grosbach
7db50010cc Test for 146516
llvm-svn: 146517
2011-12-13 21:06:59 +00:00
Jim Grosbach
b2547b424c Thumb2 tweak for ccout handling in RSB parsing.
llvm-svn: 146516
2011-12-13 21:06:41 +00:00
Jim Grosbach
13d3509445 ARM thumb2 parsing of "rsb rd, rn, #0".
rdar://10549741

llvm-svn: 146515
2011-12-13 20:50:38 +00:00
Jim Grosbach
dfec87fe2f ARM NEON two-operand aliases for VQDMULH.
llvm-svn: 146514
2011-12-13 20:40:37 +00:00
Jim Grosbach
0ba5ba4535 ARM pre-UAL NEG mnemonic for convenience when porting old code.
llvm-svn: 146511
2011-12-13 20:23:22 +00:00
Jim Grosbach
1738a66371 ARM add some more pre-UAL VFP mnemonics for convenience when porting old code.
llvm-svn: 146508
2011-12-13 20:13:48 +00:00
Jim Grosbach
9e5ef02adb ARM add more 'gas' compatibility aliases for NEON instructions.
llvm-svn: 146507
2011-12-13 20:08:32 +00:00
Kostya Serebryany
4579e0c874 mention AddressSanitizer in 3.1 release notes
llvm-svn: 146505
2011-12-13 19:46:24 +00:00
Kostya Serebryany
8c4be7b06e [asan] report an error if blacklist file contains a malformed regex. fixes asan issue 17
llvm-svn: 146503
2011-12-13 19:34:53 +00:00
Chad Rosier
8af97606a9 [fast-isel] Unaligned loads of floats are not supported. Therefore, convert to a regular
load and then move the result from a GPR to a FPR.

llvm-svn: 146502
2011-12-13 19:22:14 +00:00
Chris Lattner
e407984265 Rip llvm 3.0 out of the release notes, making room for LLVM 3.1
llvm-svn: 146493
2011-12-13 17:55:30 +00:00
Chad Rosier
281f9442f3 [fast-isel] Remove SelectInsertValue() as fast-isel wasn't designed to handle
instructions that define aggregate types.

llvm-svn: 146492
2011-12-13 17:45:06 +00:00
Bill Wendling
bb813111b6 Avoid using the 'insertvalue' instruction here.
Fast ISel isn't able to handle 'insertvalue' and it causes a large slowdown
during -O0 compilation. We don't necessarily need to generate an aggregate of
the values here if they're just going to be extracted directly afterwards.
<rdar://problem/10530851>

llvm-svn: 146481
2011-12-13 09:22:43 +00:00
Nick Lewycky
ce20cf5c5c DW_AT_accessibility is "constant" class, not form class, so it may not use
DW_FORM_flag. Use DW_FORM_data1 for one byte.

llvm-svn: 146475
2011-12-13 05:09:11 +00:00
Akira Hatanaka
23f439aca1 Add test/MC/Mips/dg.exp.
llvm-svn: 146472
2011-12-13 04:12:49 +00:00
Akira Hatanaka
a9290d5ab9 Move direct object emitter test to directory test/MC/Mips. Rename it to
elf-relsym.ll.

llvm-svn: 146470
2011-12-13 03:50:34 +00:00
Akira Hatanaka
1c41fb2bb2 Expand .cprestore directive to multiple instructions if the offset does not fit
in a 16-bit field.

llvm-svn: 146469
2011-12-13 03:09:05 +00:00
Akira Hatanaka
28140f744a Relocation against a symbol, instead of against section. We had some extreme
test cases where there were a lot of relocations applied relative to a large
rodata section. Gas would create a symbol for each of these whereas we would
be relative to the beginning of the rodata section. This change mimics what
gas does.

Patch by Jack Carter.

llvm-svn: 146468
2011-12-13 02:27:40 +00:00
Chandler Carruth
0c3a49b88e Don't default the *cached* list of targets to build to an explicit list
of the targets we know about. Because this is cached, rebuilds won't
detect when new targets show up. It's also a bit simpler to just say
"all". If users want to restrict the target set, they can still do so,
and then the cache will preserve what they have explicitly set this
field to.

llvm-svn: 146467
2011-12-13 02:19:11 +00:00
Chandler Carruth
e0484f6b37 Initial CodeGen support for CTTZ/CTLZ where a zero input produces an
undefined result. This adds new ISD nodes for the new semantics,
selecting them when the LLVM intrinsic indicates that the undef behavior
is desired. The new nodes expand trivially to the old nodes, so targets
don't actually need to do anything to support these new nodes besides
indicating that they should be expanded. I've done this for all the
operand types that I could figure out for all the targets. Owners of
various targets, please review and let me know if any of these are
incorrect.

Note that the expand behavior is *conservatively correct*, and exactly
matches LLVM's current behavior with these operations. Ideally this
patch will not change behavior in any way. For example the regtest suite
finds the exact same instruction sequences coming out of the code
generator. That's why there are no new tests here -- all of this is
being exercised by the existing test suite.

Thanks to Duncan Sands for reviewing the various bits of this patch and
helping me get the wrinkles ironed out with expanding for each target.
Also thanks to Chris for clarifying through all the discussions that
this is indeed the approach he was looking for. That said, there are
likely still rough spots. Further review much appreciated.

llvm-svn: 146466
2011-12-13 01:56:10 +00:00