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Commit Graph

199141 Commits

Author SHA1 Message Date
Fady Ghanim
14e4558751 [OpenMP][OMPBuilder] Adding privatization related createXXXX to OMPBuilder 2020-06-27 01:54:41 -04:00
Fangrui Song
db9e62be62 [BasicAA] Rename -disable-basicaa to -disable-basic-aa to be consistent with the canonical name "basic-aa" 2020-06-26 20:55:44 -07:00
Fangrui Song
ae62035cf0 [BasicAA] Rename deprecated -basicaa to -basic-aa
Follow-up to D82607
Revert an accidental change (empty.ll) of D82683
2020-06-26 20:41:37 -07:00
Arthur Eubanks
fc1584be52 [NewPM][BasicAA] basicaa -> basic-aa in Transforms/{New,}GVN
Summary: Following https://reviews.llvm.org/D82607.

Reviewers: ychen

Subscribers: asbirlea, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D82688
2020-06-26 20:28:18 -07:00
Arthur Eubanks
0e1409e029 [NewPM][BasicAA] basicaa -> basic-aa in Transforms/DeadStoreElimination
Summary: Following https://reviews.llvm.org/D82607.

Reviewers: ychen

Subscribers: george.burgess.iv, asbirlea, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D82689
2020-06-26 20:13:37 -07:00
Nico Weber
2d39538671 Revert "Disable a JSONTest.Integers test with all MSVCs, PR46470"
This reverts commit 63bcf89125fdfe8a41b0125454b006b49abb0184.
Turns out the more targeted disablement in the previous change
was good enough.
2020-06-26 22:30:24 -04:00
Alexander Shaposhnikov
1b6db69257 [llvm-install-name-tool] Add support for -rpath option
This diff implements -rpath option for llvm-install-name-tool
which replaces the rpath value in the specified Mach-O binary.

Patch by Sameer Arora!

Test plan: make check-all

Differential revision: https://reviews.llvm.org/D82051
2020-06-26 17:23:03 -07:00
Vedant Kumar
a8ceafb85b [InstCombine] Drop debug loc in TryToSinkInstruction (reland)
Summary:
The advice in HowToUpdateDebugInfo.rst is to "... preserve the debug
location of an instruction if the instruction either remains in its
basic block, or if its basic block is folded into a predecessor that
branches unconditionally".

TryToSinkInstruction doesn't seem to satisfy the criteria as it's
sinking an instruction to some successor block. Preserving the debug loc
can make single-stepping appear to go backwards, or make a breakpoint
hit on that location happen "too late" (since single-stepping from that
breakpoint can cause the function to return unexpectedly).

So, drop the debug location.

This was reverted in ee3620643dfc because it removed source locations
from inlinable calls, breaking a verifier rule. I've added an exception
for calls because the alternative (setting a line 0 location) is not
better. I tested the updated patch by completing a stage2 RelWithDebInfo
build.

Reviewers: aprantl, davide

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D82487
2020-06-26 17:18:15 -07:00
Nico Weber
74b82e9a7e Disable a JSONTest.Integers test with all MSVCs, PR46470 2020-06-26 20:02:04 -04:00
Nico Weber
79ca9c7eae Disable a JSONTest.Integers test with newer MSVCs, PR46470 2020-06-26 19:57:52 -04:00
Puyan Lotfi
af1edd8d68 [NFCi] Fixing build failures on Windows due to std::tie used w/o proper include.
From https://reviews.llvm.org/D81236 /
55fe7b79bb

std::tie is used without including <tuple>. This patch includes <tuple>
so that some downstream Windows bots succesfully build.
2020-06-26 16:30:25 -07:00
Arthur Eubanks
619da1955e Fix full-store-partial-alias.ll
Accidentally renamed -disable-basicaa -> -disable-basic-aa
2020-06-26 15:46:47 -07:00
Matt Arsenault
e686e7788e LLParser: Accept align(N) as new syntax for parameter attribute
Every other value parameter attribute uses parentheses, so accept this
as the preferred modern syntax. Updating everything to use the new
syntax is left for a future change.
2020-06-26 18:10:21 -04:00
Matt Arsenault
24fd7356d5 AMDGPU/GlobalISel: Fix some legalization of < dword vector stores
This avoids many instances of failing to legalize a vector truncstore
of <4 x s8> to 2 bytes. We don't perfectly handle every truncstore
yet, largely because the given set of legalization actions can't
actually differentiate between changing the result type and changing
the memory type.
2020-06-26 18:07:39 -04:00
Vedant Kumar
478502f993 Revert "[InstCombine] Drop debug loc in TryToSinkInstruction"
This reverts commit 903cf140d0118cf0d3f0f6f8967c6a20d9c5be6b.

This might be causing verifier failures on the bots, such as: "inlinable
function call in a function with debug info must have a !dbg location"
--

http://lab.llvm.org:8011/builders/sanitizer-ppc64be-linux/builds/16976/steps/bootstrap%20clang/logs/stdio
2020-06-26 14:59:40 -07:00
Arthur Eubanks
892e0e61d0 [NewPM][BasicAA] basicaa -> basic-aa in Transforms/SLPVectorizer
Following https://reviews.llvm.org/D82607.

Reviewed By: ychen

Differential Revision: https://reviews.llvm.org/D82681
2020-06-26 14:58:41 -07:00
Arthur Eubanks
7a90a95ac2 [NewPM][BasicAA] basicaa -> basic-aa in Analysis/BasicAA
Following https://reviews.llvm.org/D82607.

Reviewed By: ychen

Differential Revision: https://reviews.llvm.org/D82683
2020-06-26 14:58:01 -07:00
Yuanfang Chen
fe432a7db2 [MemorySSA] Update comment in PassBuilder
Is teaching the LoopFullUnrollPass to preserve MemorySSA very hard or
just impossible?

Reviewed By: asbirlea

Differential Revision: https://reviews.llvm.org/D82618
2020-06-26 14:55:31 -07:00
Vedant Kumar
cc99a11efb [debugify] Demote an error about empty locations to a warning
In https://reviews.llvm.org/D81198, we outlined a number of scenarios
where dropping debug locations is appropriate. Stop issuing an error
when this happens.
2020-06-26 14:55:02 -07:00
Matt Arsenault
c0c2638b8d GlobalISel: Don't fail translate on weak cmpxchg
The translation of cmpxchg added by
9481399c0fd2c198c81b92636c0dcff7d4c41df2 specifically skipped weak
cmpxchg due to not understanding the meaning. Weak cmpxchg was added
in 420a216817def01816186910a2e35885c9201951. As explained in the
commit message, the weak mode is implicit in how
ATOMIC_CMP_SWAP_WITH_SUCCESS is lowered. If it's expanded to a regular
ATOMIC_CMP_SWAP, it's replaced with a strong cmpxchg.

This handling seems weird to me, but this was already following the
DAG behavior. I would expect the strong IR instruction to not have the
boolean output. Failing that, I might expect the IRTranslator to emit
ATOMIC_CMP_SWAP and a constant for the boolean.
2020-06-26 17:52:18 -04:00
Tony
61b6382a7a [AMDGPU] Define DWARF encoding for condition code registers
Summary:
- Define DWARF register numbers for vector and scalar condition codes.
- Document intended purpose of reserved DWARF register numbers.

Reviewers: yaxunl, kzhuravl, arsenm, rampitec, b-sumner

Subscribers: jvesely, wdng, nhaehnle, aprantl, dstuttard, tpr, kerbowa, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D82519
2020-06-26 17:53:55 -04:00
Francesco Petrogalli
142ed95012 [sve][acle] Recommit https://reviews.llvm.org/D82501
The original patch was reverted in
ff5ccf258e
as it was missing the C tests that got accidentally missing.

This patch is a NFC of https://reviews.llvm.org/D82501, together with
the SVE ACLE tests for the C intrinsics of svreinterpret for brain
float types.
2020-06-26 20:45:29 +00:00
Amy Huang
85900aef27 Extend or truncate __ptr32/__ptr64 pointers when dereferenced.
Summary:
A while ago I implemented the functionality to lower Microsoft __ptr32
and __ptr64 pointers, which are stored as 32-bit and 64-bit pointer
and are extended/truncated to the appropriate pointer size when
dereferenced.
This patch adds an addrspacecast to cast from the __ptr32/__ptr64
pointer to a default address space when dereferencing.

Bug: https://bugs.llvm.org/show_bug.cgi?id=42359

Reviewers: hans, arsenm, RKSimon

Subscribers: wdng, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D81517
2020-06-26 13:33:54 -07:00
Vedant Kumar
a0bb794c89 [InstCombine] Drop debug loc in TryToSinkInstruction
Summary:
The advice in HowToUpdateDebugInfo.rst is to "... preserve the debug
location of an instruction if the instruction either remains in its
basic block, or if its basic block is folded into a predecessor that
branches unconditionally".

TryToSinkInstruction doesn't seem to satisfy the criteria as it's
sinking an instruction to some successor block. Preserving the debug loc
can make single-stepping appear to go backwards, or make a breakpoint
hit on that location happen "too late" (since single-stepping from that
breakpoint can cause the function to return unexpectedly).

So, drop the debug location.

Reviewers: aprantl, davide

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D82487
2020-06-26 13:23:24 -07:00
Francesco Petrogalli
6655379f18 Revert "[sve][acle] Add reinterpret intrinsics for brain float."
This reverts commit a15722c5ce4759c12960fe434ee6bd8aac70bb16.

The commmit has to be reverted because I accidentally submit
https://reviews.llvm.org/D82501 without the C tests that were added in
an early version of the patch.
2020-06-26 20:19:49 +00:00
Florian Hahn
558e62b1e8 [VPlan] Add & use VPValue for VPWidenGEPRecipe operands (NFC).
This patch adds VPValue version of the GEP's operands to
VPWidenGEPRecipe and uses them during code-generation.

Reviewers: Ayal, gilr, rengolin

Reviewed By: gilr

Differential Revision: https://reviews.llvm.org/D80220
2020-06-26 20:59:17 +01:00
Paul Walker
2467d01420 [SVE] Code generation for fixed length vector adds.
Summary:
Teach LowerToPredicatedOp to lower fixed length vector operations.

Add AArch64ISD nodes and isel patterns for predicated integer
and floating point adds.

Together this enables SVE code generation for fixed length vector adds.

Reviewers: rengolin, efriedma

Subscribers: tschuett, kristof.beyls, hiraditya, rkruppe, psnobl, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D82483
2020-06-26 19:54:41 +00:00
Roman Lebedev
1167cf8023 [CostModel] Avoid traditional ConstantExpr crashy pitfails
I'm not sure if this is a regression from D81448 + D81643,
which moved at least the code cast from elsewhere,
or somehow no one triggered that before.
But now we can reach it with a non-instruction..

It is not straight-forward to write cost-model tests for constantexprs,
`-cost-model -analyze -cost-kind=` does not appear to look at them,
or maybe i'm doing it wrong.

I've encountered that via a SimplifyCFG crash,
so reduced (currently-crashing) test is added.
There are likely other instances.

For now, simply restore previous status quo of
not crashing and returning TTI::TCC_Basic.
2020-06-26 22:48:10 +03:00
Matt Arsenault
5127ccf75b AMDGPU: Add llvm.amdgcn.sqrt intrinsic
I spread the GlobalISel test into the regular one, which I've been
avoiding so far.
2020-06-26 15:07:07 -04:00
David Tenty
339a41084d [NFCI] Cleanup range checks in Register/MCRegister
Summary:
by removing casts from unsigned to int that which may be implementation
defined according to C++14 (and thus trip up the XL compiler on AIX) by
just using unsigned comparisons/masks and refactor out the range
constants to cleanup things a bit while we are at it.

Reviewers: hubert.reinterpretcast, arsenm

Reviewed By: hubert.reinterpretcast

Subscribers: wdng, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D82197
2020-06-26 14:55:55 -04:00
Sanjay Patel
2fca4fc03f [DAGCombiner] rename variables for readability; NFC
PR46406 shows a pattern where we can do better, so try to clean this up
before adding more code.
2020-06-26 14:22:11 -04:00
Sanjay Patel
5dcf739606 [AArch64] add vector test for merged condition branching; NFC 2020-06-26 14:22:11 -04:00
Amy Kwan
04ae1ab1c3 [PowerPC] Add support for llvm.ppc.dcbt, llvm.ppc.dcbtst, llvm.ppc.isync intrinsics
This patch adds LLVM intrinsics for the dcbt (Data Cache Block Touch),
dcbtst (Data Cache Block Touch for Store) and isync (Instruction
Synchronize) instructions.

The intrinsic for dcbt and dcbst in this patch are named llvm.ppc.dcbt.with.hint
and llvm.ppc.dcbtst.with.hint respectively as there already exists an intrinsic
for llvm.ppc.dcbt and llvm.ppc.dcbtst. However, the original variants of the
intrinsics do not accept the TH immediate field, whereas these variants do.

Differential Revision: https://reviews.llvm.org/D79633
2020-06-26 13:02:18 -05:00
Rong Xu
14ba3c75bf [PGO] Add a functionality to always instrument the func entry BB
Add an option to always instrument function entry BB (default off)
Add an option to do atomically updates on the first counter in each
instrumented function.

Differential Revision: https://reviews.llvm.org/D82123
2020-06-26 10:43:23 -07:00
Philip Reames
23dcf5ab2d Migrate last batch of tests to gc-live bundle format
For context of anyone following along, we've not completed the migration of statepoint to the operand bundle form.  The only remaining piece is to actually version the statepoint intrinsic to remove the old inline operand sets.  That will follow when I have some time; delay is useful here to allow downstream migrations.
2020-06-26 10:28:27 -07:00
Nico Weber
786f34e738 Revert "[clang driver] Move default module cache from system temporary directory"
This reverts commit bb26838ceffb5feaa18186f55f7525a08084899e.
Breaks Support.CacheDirectoryNoEnv, Support.CacheDirectoryWithEnv
in SupportTests (part of check-llvm) on macOS.
2020-06-26 13:25:45 -04:00
Arthur Eubanks
2658ebda83 [NewPM][LoopUnroll] Rename unroll* to loop-unroll*
The legacy pass is called "loop-unroll", but in the new PM it's called "unroll".
Also applied to unroll-and-jam and unroll-full.

Fixes various check-llvm tests when NPM is turned on.

Reviewed By: Whitney, dmgreen

Differential Revision: https://reviews.llvm.org/D82590
2020-06-26 09:28:32 -07:00
Kit Barton
bb26f5df42 [PPC][NFC] Add Subtarget and replace all uses of PPCSubTarget with Subtarget.
Summary:
In preparation for GlobalISel, PPCSubTarget needs to be renamed to Subtarget as there places in GlobalISel that assume the presence of the variable Subtarget.
This patch introduces the variable Subtarget, and replaces all existing uses of PPCSubTarget with Subtarget. A subsequent patch will remove the definiton of
PPCSubTarget, once any downstream users have the opportunity to rename any uses they have.

Reviewers: hfinkel, nemanjai, jhibbits, #powerpc, echristo, lkail

Reviewed By: #powerpc, echristo, lkail

Subscribers: echristo, lkail, wuzish, nemanjai, hiraditya, jfb, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D81623
2020-06-26 11:23:38 -05:00
sstefan1
9111261e00 [OpenMPOpt][NFC] Change ICV macros for initial value
This fixes build breaks when system headers are difining FALSE.
2020-06-26 15:34:43 +00:00
Francesco Petrogalli
fb4e03c951 [sve][acle] Add reinterpret intrinsics for brain float.
Reviewers: kmclaughlin, efriedma, ctetreau, sdesmalen, david-arm

Subscribers: tschuett, hiraditya, rkruppe, psnobl, cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D82501
2020-06-26 15:20:58 +00:00
Vy Nguyen
052f666a48 [llvm-exegesis] Let Counter returns up to 16 entries
LBR contains (up to) 16 entries for last x branches and the X86LBRCounter (from D77422) should be able to return all those.
    Currently, it just returns the latest entry, which could lead to mis-leading measurements.
    This patch aslo changes the LatencyBenchmarkRunner to accommodate multi-value readings.

         https://reviews.llvm.org/D81050
2020-06-26 10:57:20 -04:00
Guillaume Chatelet
61be63afc4 [Alignment][NFC] Migrate TTI::isLegalToVectorize{Load,Store}Chain to Align
This is patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790

Differential Revision: https://reviews.llvm.org/D82653
2020-06-26 14:14:27 +00:00
Matt Arsenault
5d95ec786c AMDGPU/GlobalISel: Fix legacy clover kernel argument ABI
This had an extra attempt to align the pointer, which only did
anything with a base kernel argument offset which only clover used to
use.
2020-06-26 10:03:05 -04:00
Matt Arsenault
487f0631b0 AMDGPU/GlobalISel: Add baseline checks for legacy clover kernel ABI
I'm not sure we actually need to support this now, since I think
clover always explicitly uses amdgcn-mesa-mesa3d now, not the
ill-defined amdgcn-- behavior.
2020-06-26 10:03:05 -04:00
Matt Arsenault
e98f5892d2 AMDGPU/GlobalISel: Uncomment some fixed tests 2020-06-26 10:03:05 -04:00
Kerry McLaughlin
8b3ff6c213 [AArch64][SVE] Remove asserts from AArch64ISelLowering for bfloat16 types
Remove the asserts in performLDNT1Combine & performST[NT]1Combine
to ensure we get a failure where the type is a bfloat16 and
hasBF16() is false, regardless of whether asserts are enabled.
2020-06-26 14:51:27 +01:00
serge-sans-paille
d14affcd91 Fix pass return status for loop extractor
As loop extractor has a dependency on another pass (namely BreakCriticalEdges)
that may update the IR, use the getAnalysis version introduced in
55fe7b79bb7fab49af3720840224c0720bdb03c6 to carry that change.

Add an assert in getAnalysisID to make sure no other changed status is missed -
according to validation this was the only one.

Related to https://reviews.llvm.org/D80916

Differential Revision: https://reviews.llvm.org/D81236
2020-06-26 15:49:27 +02:00
Simon Pilgrim
f5fa275b44 Revert rGf0bab7875e78e01c149d12302dcc4b6d4c43e25c - "Triple.h - reduce Twine.h include to forward declarations. NFC."
This causes ICEs on the clang-ppc64be buildbots and I've limited ability to triage the problem.
2020-06-26 14:46:40 +01:00
Simon Pilgrim
08eb1e1f85 Add explicit Twine.h include to try and fix ICE on clang-ppc64be-linux 2020-06-26 14:14:09 +01:00
Simon Tatham
24333be966 Fix implicit include dependencies on SmallVector.h.
Both `AArch64TargetParser.h` and `ARMTargetParser.h` refer to
`SmallVectorImpl` without directly including the header that defines
it, which works fine until nothing else happens to include it anyway.
2020-06-26 13:49:17 +01:00