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Author SHA1 Message Date
Evan Cheng
16696f0ad8 Inverted logic. 
llvm-svn: 35619
 2007-04-03 06:44:25 +00:00
Evan Cheng
bad40843ec Bad bad bug. findRegisterUseOperand() returns -1 if a use if not found. 
llvm-svn: 35618
 2007-04-03 06:43:29 +00:00
Bill Wendling
a2eabd50c0 Changed to new MMX_ recipes. 
llvm-svn: 35617
 2007-04-03 06:18:31 +00:00
Bill Wendling
ca2124e5a9 Add FEMMS and ADDQ. Renamed MMX recipes to prepend the MMX_ to them. 
llvm-svn: 35616
 2007-04-03 06:00:37 +00:00
Chris Lattner
4302c8bcdb split some code out into a helper function 
llvm-svn: 35615
 2007-04-03 05:11:24 +00:00
Chris Lattner
23d58bde29 Split a whole ton of code out of visitICmpInst into visitICmpInstWithInstAndIntCst. 
llvm-svn: 35614
 2007-04-03 04:46:52 +00:00
Chris Lattner
b5e5784b28 add missing operator 
llvm-svn: 35613
 2007-04-03 04:25:46 +00:00
Chris Lattner
9b66a372c8 Fix PR1253 and xor2.ll:test[01] 
llvm-svn: 35612
 2007-04-03 01:47:41 +00:00
Chris Lattner
2083adbfb8 new testcase for PR1253 
llvm-svn: 35611
 2007-04-03 01:45:32 +00:00
Chris Lattner
96c4c71f2c add a helper function to constantint. 
llvm-svn: 35610
 2007-04-03 01:41:34 +00:00
Chris Lattner
4d702a890c Arm supports negative strides as well, add them. This lets us compile: 
CodeGen/ARM/arm-negative-stride.ll to:

LBB1_2: @bb
        str r1, [r3, -r0, lsl #2]
        add r0, r0, #1
        cmp r0, r2
        bne LBB1_2      @bb

llvm-svn: 35609
 2007-04-03 00:13:57 +00:00
Chris Lattner
caf2381689 new testcase, where we should use a negative stride 
llvm-svn: 35608
 2007-04-03 00:13:16 +00:00
Chris Lattner
3df2382275 allow -1 strides to reuse "1" strides. 
llvm-svn: 35607
 2007-04-02 22:51:58 +00:00
Chris Lattner
03edb8b08e Add a regtest for cases we now recognize as rotates, thanks to Scott Michel's 
recent dagcombine patch

llvm-svn: 35606
 2007-04-02 22:08:54 +00:00
Scott Michel
d6b3d3d6ab 1. Insert custom lowering hooks for ISD::ROTR and ISD::ROTL. 
2. Help DAGCombiner recognize zero/sign/any-extended versions of ROTR and ROTL
patterns. This was motivated by the X86/rotate.ll testcase, which should now
generate code for other platforms (and soon-to-come platforms.) Rewrote code
slightly to make it easier to read.

llvm-svn: 35605
 2007-04-02 21:36:32 +00:00
Chris Lattner
d4258ba56c fix this testcase so it passes 
llvm-svn: 35604
 2007-04-02 20:46:28 +00:00
Chris Lattner
3d0eeb2046 fix this testcase on ppc hosts 
llvm-svn: 35603
 2007-04-02 20:39:48 +00:00
Dale Johannesen
e1c3dc7c78 fix off by 1 error in displacement computation 
llvm-svn: 35602
 2007-04-02 20:31:06 +00:00
Chris Lattner
726d461daf fix the CodeGen/ARM/2007-03-13-InstrSched.ll regression: allow IV's with scales 
to be folded into non-store instructions.

llvm-svn: 35601
 2007-04-02 18:51:18 +00:00
Evan Cheng
d0366b0024 Ugh. Copy coalescer does not update register numbers. 
llvm-svn: 35600
 2007-04-02 18:49:18 +00:00
Evan Cheng
b114ed90de New test case. 
llvm-svn: 35599
 2007-04-02 18:47:13 +00:00
Chris Lattner
ff9caac83e add support for the 'w' inline asm register class. 
llvm-svn: 35598
 2007-04-02 17:24:08 +00:00
Devang Patel
f36404f6d9 Update example notes to clarify system linker's role. 
llvm-svn: 35597
 2007-04-02 16:54:12 +00:00
Reid Spencer
81c42ca3f6 Regenerate. 
llvm-svn: 35596
 2007-04-02 15:41:39 +00:00
Reid Spencer
21c4f78885 Check for .svn directories too to determine if a debug build is appropriate. 
llvm-svn: 35595
 2007-04-02 15:40:39 +00:00
Zhou Sheng
98c161c290 1. Make use of APInt operation instead of using ConstantExpr::getXXX. 
2. Use cheaper APInt methods.

llvm-svn: 35594
 2007-04-02 13:45:30 +00:00
Zhou Sheng
47311533a7 Use uint32_t for bitwidth instead of unsigned. 
llvm-svn: 35593
 2007-04-02 08:20:41 +00:00
Chris Lattner
d7c96e25e4 Pass the type of the store access, not the type of the store, into the 
target hook.  This allows us to codegen a loop as:

LBB1_1: @cond_next
        mov r2, #0
        str r2, [r0, +r3, lsl #2]
        add r3, r3, #1
        cmn r3, #1
        bne LBB1_1      @cond_next

instead of:

LBB1_1: @cond_next
        mov r2, #0
        str r2, [r0], #+4
        add r3, r3, #1
        cmn r3, #1
        bne LBB1_1      @cond_next

This looks the same, but has one fewer induction variable (and therefore,
one fewer register) live in the loop.

llvm-svn: 35592
 2007-04-02 06:34:44 +00:00
Chris Lattner
c597fc9196 new testcase. 
llvm-svn: 35591
 2007-04-02 06:33:10 +00:00
Chris Lattner
dbce9ef4b8 Fix a bug which caused us to never be able to use signed comparisons for 
equality comparisons of a constant.  This allows us to codegen the 'sintzero'
loop in PR1288 as:

LBB1_1: ;cond_next
        li r4, 0
        addi r2, r2, 1
        stw r4, 0(r3)
        addi r3, r3, 4
        cmpwi cr0, r2, -1
        bne cr0, LBB1_1 ;cond_next

instead of:

LBB1_1: ;cond_next
        addi r2, r2, 1
        li r4, 0
        xoris r5, r2, 65535
        stw r4, 0(r3)
        addi r3, r3, 4
        cmplwi cr0, r5, 65535
        bne cr0, LBB1_1 ;cond_next

This implements CodeGen/PowerPC/compare-simm.ll, and also cuts 74
instructions out of kc++.

llvm-svn: 35590
 2007-04-02 05:59:42 +00:00
Chris Lattner
acb971cbc3 new testcase 
llvm-svn: 35589
 2007-04-02 05:57:59 +00:00
Chris Lattner
aaf29d3b5e Wrap long line 
llvm-svn: 35588
 2007-04-02 05:48:58 +00:00
Chris Lattner
7208dd1001 use more obvious function name. 
llvm-svn: 35587
 2007-04-02 05:42:22 +00:00
Chris Lattner
6668db1331 Treat xor of signbit like an add. 
llvm-svn: 35586
 2007-04-02 05:41:38 +00:00
Chris Lattner
3ff8b2cf06 add a helper function. 
llvm-svn: 35585
 2007-04-02 05:41:00 +00:00
Chris Lattner
35ece02bea simplify (x+c)^signbit as (x+c+signbit), pointed out by PR1288. This implements 
test/Transforms/InstCombine/xor.ll:test28

llvm-svn: 35584
 2007-04-02 05:36:22 +00:00
Chris Lattner
095caddb5e creative way to add one. 
llvm-svn: 35583
 2007-04-02 05:35:08 +00:00
Chris Lattner
c873153cbd my patch fixed the fixme. 
llvm-svn: 35582
 2007-04-02 05:08:54 +00:00
Reid Spencer
09cacde5c5 Fix illegal assembly syntax. 
llvm-svn: 35581
 2007-04-02 03:24:47 +00:00
Reid Spencer
50844453dd bwsap -> bswap 
llvm-svn: 35580
 2007-04-02 02:25:19 +00:00
Reid Spencer
fa84b75ad8 Regenerate 
llvm-svn: 35579
 2007-04-02 02:08:35 +00:00
Reid Spencer
ad1ee4e65a Upgrade the bit count intrinsics to have an i32 result. 
llvm-svn: 35578
 2007-04-02 02:08:05 +00:00
Reid Spencer
ff0b24925c Add a test case to make sure that constant folding of the bit counting 
intrinsics works.

llvm-svn: 35577
 2007-04-02 01:45:31 +00:00
Chris Lattner
d59b6b3d90 reduce use of std::set 
llvm-svn: 35576
 2007-04-02 01:44:59 +00:00
Chris Lattner
2f94a80322 Various passes before isel split edges and do other CFG-restructuring changes. 
isel has its own particular features that it wants in the CFG, in order to
reduce the number of times a constant is computed, etc.  Make sure that we
clean up the CFG before doing any other things for isel.  Doing so can
dramatically reduce the number of split edges and reduce the number of
places that constants get computed.  For example, this shrinks
CodeGen/Generic/phi-immediate-factoring.ll from 44 to 37 instructions on X86,
and from 21 to 17 MBB's in the output.  This is primarily a code size win,
not a performance win.

This implements CodeGen/Generic/phi-immediate-factoring.ll and PR1296.

llvm-svn: 35575
 2007-04-02 01:35:34 +00:00
Chris Lattner
e431a9d714 new testcase for PR1296 
llvm-svn: 35574
 2007-04-02 01:32:59 +00:00
Lauro Ramos Venancio
7e21418680 - Divides the comparisons in two types: comparisons that only use N and Z 
flags (ARMISD::CMPNZ) and comparisons that use all flags (ARMISD::CMP).
- Defines the instructions: TST, TEQ (ARM) and TST (Thumb).

llvm-svn: 35573
 2007-04-02 01:30:03 +00:00
Chris Lattner
b59fc9767b add range version of insert() 
llvm-svn: 35572
 2007-04-02 01:21:19 +00:00
Reid Spencer
6f0e15627f Regenerate 
llvm-svn: 35571
 2007-04-02 01:14:00 +00:00
Reid Spencer
92f0ca2c15 Don't upgrade functions that look like a bswap intrinsic but aren't. 
llvm-svn: 35570
 2007-04-02 01:13:36 +00:00