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Commit Graph

9707 Commits

Author SHA1 Message Date
Dale Johannesen
329e01b91b Remove non-DebugLoc versions of BuildMI from IA64, Mips.
llvm-svn: 64438
2009-02-13 02:34:39 +00:00
Dale Johannesen
560b03bbcd Remove non-DebugLoc versions of BuildMI from X86.
There were some that might even matter in X86FastISel.

llvm-svn: 64437
2009-02-13 02:33:27 +00:00
Dale Johannesen
0336a2cfd0 missed file
llvm-svn: 64436
2009-02-13 02:32:04 +00:00
Dale Johannesen
bf9e91b0b9 Remove non-DebugLoc versions of buildMI from Sparc.
llvm-svn: 64435
2009-02-13 02:31:35 +00:00
Dale Johannesen
a0069695df Remove non-DebugLoc versions of BuildMI from Alpha and Cell.
llvm-svn: 64433
2009-02-13 02:30:42 +00:00
Dale Johannesen
9c596981ed Remove refs to non-DebugLoc version of BuildMI from XCore, PIC16.
llvm-svn: 64432
2009-02-13 02:29:03 +00:00
Dale Johannesen
428a8fcc3d Remove refs to non-DebugLoc version of BuildMI from PowerPC.
llvm-svn: 64431
2009-02-13 02:27:39 +00:00
Dale Johannesen
986cfc3338 and one more file
llvm-svn: 64430
2009-02-13 02:26:21 +00:00
Dale Johannesen
a91dca7b45 Remove refs to non-DebugLoc versions of BuildMI from ARM.
llvm-svn: 64429
2009-02-13 02:25:56 +00:00
Bill Wendling
40e4b271af Revert this. It was breaking stuff.
llvm-svn: 64428
2009-02-13 02:16:35 +00:00
Bill Wendling
83b6edd760 Turn off the old way of handling debug information in the code generator. Use
the new way, where all of the information is passed on SDNodes and machine
instructions.

llvm-svn: 64427
2009-02-13 02:01:04 +00:00
Dale Johannesen
df5d8dfbcb Check in missing file.
llvm-svn: 64410
2009-02-12 23:24:44 +00:00
Dale Johannesen
5a21722625 Eliminate a couple of non-DebugLoc BuildMI variants.
Modify callers.

llvm-svn: 64409
2009-02-12 23:08:38 +00:00
Dale Johannesen
47321cf01f Arrange to print constants that match "n" and "i" constraints
in inline asm as signed (what gcc does).  Add partial support
for x86-specific "e" and "Z" constraints, with appropriate
signedness for printing.

llvm-svn: 64400
2009-02-12 20:58:09 +00:00
Chris Lattner
c1488eea4b fix PR3538 for ARM.
llvm-svn: 64384
2009-02-12 17:38:23 +00:00
Chris Lattner
aeec838015 fix PR3538 for PPC
llvm-svn: 64383
2009-02-12 17:37:15 +00:00
Chris Lattner
1174b80823 fix the X86 backend to just drop llvm.declare nodes for VLAs instead of
leaving them in the DAG and then getting selection errors.  This is a 
fix for PR3538.

llvm-svn: 64382
2009-02-12 17:33:11 +00:00
Bill Wendling
d31cb3d5aa Move debug loc info along when the spiller creates new instructions.
llvm-svn: 64342
2009-02-12 00:02:55 +00:00
Bill Wendling
49baa5465c Propagate DebugLoc info for spiller call-backs.
llvm-svn: 64329
2009-02-11 21:51:19 +00:00
Dan Gohman
2decb4495d Don't try to set an EFLAGS operand to dead if no instruction was created.
This fixes a bug introduced by r61215.

llvm-svn: 64316
2009-02-11 19:50:24 +00:00
Evan Cheng
cdb35e3f0f Handle llvm.x86.sse2.maskmov.dqu in 64-bit.
llvm-svn: 64240
2009-02-10 22:06:28 +00:00
Evan Cheng
a1b9cf3143 80 col violations.
llvm-svn: 64237
2009-02-10 21:39:44 +00:00
Sanjiv Gupta
abf1d4e9db Function temporaries can not overlap with retval or args.See the comment in source code to know the reason. Anything having .auto. in its name is local to a function in nature irrespective of the linkage specified. print static local variables in module level IDATA section.
llvm-svn: 64199
2009-02-10 04:20:26 +00:00
Evan Cheng
3b84024598 Implement FpSET_ST1_*.
llvm-svn: 64186
2009-02-09 23:32:07 +00:00
Dan Gohman
548d7c9145 Use doxygen comment syntax.
llvm-svn: 64150
2009-02-09 18:12:09 +00:00
Evan Cheng
9dc1507838 Turns out AnalyzeBranch can modify the mbb being analyzed. This is a nasty
suprise to some callers, e.g. register coalescer. For now, add an parameter
that tells AnalyzeBranch whether it's safe to modify the mbb. A better
solution is out there, but I don't have time to deal with it right now.

llvm-svn: 64124
2009-02-09 07:14:22 +00:00
Chris Lattner
a50a554333 add a note.
llvm-svn: 64093
2009-02-08 20:44:19 +00:00
Dale Johannesen
b22cb23f6f Use getDebugLoc forwarder instead of getNode()->getDebugLoc.
No functional change.

llvm-svn: 64026
2009-02-07 19:59:05 +00:00
Dan Gohman
4105a38248 Constify TargetInstrInfo::EmitInstrWithCustomInserter, allowing
ScheduleDAG's TLI member to use const.

llvm-svn: 64018
2009-02-07 16:15:20 +00:00
Dale Johannesen
a068079e5f Needs this file too.
llvm-svn: 63993
2009-02-07 00:56:46 +00:00
Dale Johannesen
a259483aae Get rid of the last non-DebugLoc versions of getNode!
Many targets build placeholder nodes for special operands, e.g.
GlobalBaseReg on X86 and PPC for the PIC base.  There's no
sensible way to associate debug info with these.  I've left
them built with getNode calls with explicit DebugLoc::getUnknownLoc operands. 
I'm not too happy about this but don't see a good improvement;
I considered adding a getPseudoOperand or something, but it
seems to me that'll just make it harder to read.

llvm-svn: 63992
2009-02-07 00:55:49 +00:00
Dan Gohman
8437b9efa1 Refactor some repeated logic into a separate function.
llvm-svn: 63989
2009-02-07 00:43:41 +00:00
Dan Gohman
8aeae15ebd Make a comment a doxygen comment.
llvm-svn: 63988
2009-02-07 00:42:54 +00:00
Dale Johannesen
1580ab6b7f Remove more non-DebugLoc getNode variants. Use
getCALLSEQ_{END,START} to permit passing no DebugLoc
there.  UNDEF doesn't logically have DebugLoc; add
getUNDEF to encapsulate this.

llvm-svn: 63978
2009-02-06 23:05:02 +00:00
Dale Johannesen
c405486235 Remove more non-DebugLoc versions of getNode.
llvm-svn: 63969
2009-02-06 21:50:26 +00:00
Bill Wendling
2c7f47d1d4 Record debug location information in the Dwarf writer.
A simple test program shows that debugging works. :-)

llvm-svn: 63968
2009-02-06 21:45:08 +00:00
Dan Gohman
a2f300f26d Use .size and .type on ELF systems; this helps tools that map
addresses to symbols.

llvm-svn: 63962
2009-02-06 21:15:52 +00:00
Dale Johannesen
7099fa18a4 Eliminate remaining non-DebugLoc version of getTargetNode.
llvm-svn: 63951
2009-02-06 19:16:40 +00:00
Sanjiv Gupta
90fd43f44d Print globl directive for variables with external linkage (global variables).
llvm-svn: 63943
2009-02-06 18:24:59 +00:00
Evan Cheng
e00df1d39c Move getPointerRegClass from TargetInstrInfo to TargetRegisterInfo.
llvm-svn: 63938
2009-02-06 17:43:24 +00:00
Evan Cheng
381b2df5ff Add TargetInstrInfo::isSafeToMoveRegisterClassDefs. It returns true if it's safe to move an instruction which defines a value in the register class. Replace pre-splitting specific IgnoreRegisterClassBarriers with this new hook.
llvm-svn: 63936
2009-02-06 17:17:30 +00:00
Dale Johannesen
cda84103ff get rid of some non-DebugLoc getTargetNode variants.
llvm-svn: 63909
2009-02-06 02:08:06 +00:00
Dale Johannesen
e95c76b65e Get rid of one more non-DebugLoc getNode and
its corresponding getTargetNode.  Lots of
caller changes.

llvm-svn: 63904
2009-02-06 01:31:28 +00:00
Dale Johannesen
c96091a672 Remove a non-DebugLoc version of getNode.
llvm-svn: 63889
2009-02-05 22:07:54 +00:00
Evan Cheng
87def37f67 A few more isAsCheapAsAMove.
llvm-svn: 63852
2009-02-05 08:42:55 +00:00
Dale Johannesen
fa28929927 Reapply 63765. Patches for clang and llvm-gcc to follow.
llvm-svn: 63812
2009-02-05 01:49:45 +00:00
Dale Johannesen
c901d013fb Get rid of 3 non-DebugLoc getNode variants.
llvm-svn: 63808
2009-02-05 01:01:16 +00:00
Dale Johannesen
c2896f9310 Remove non-DebugLoc versions of getMergeValues, ZeroExtendInReg.
llvm-svn: 63800
2009-02-05 00:20:09 +00:00
Dale Johannesen
d27bc65e74 Remove non-DebugLoc forms of CopyToReg and CopyFromReg.
Adjust callers.

llvm-svn: 63789
2009-02-04 23:02:30 +00:00
Dale Johannesen
f6e1822ccd Reverting 63765. This broke the build of both clang
and llvm-gcc.

llvm-svn: 63786
2009-02-04 22:47:25 +00:00
Dale Johannesen
15a801f11d Remove non-DebugLoc versions of getLoad and getStore.
Adjust the many callers of those versions.

llvm-svn: 63767
2009-02-04 20:06:27 +00:00
Nate Begeman
66f10b55ed New feature: add support for target intrinsics being defined in the
target directories themselves.  This also means that VMCore no longer
needs to know about every target's list of intrinsics.  Future work
will include converting the PowerPC target to this interface as an
example implementation.

llvm-svn: 63765
2009-02-04 19:47:21 +00:00
Chris Lattner
feb6b56242 Bill implemented this.
llvm-svn: 63752
2009-02-04 19:09:07 +00:00
Chris Lattner
eae4653469 add a note, this is why we're faster at SciMark-MonteCarlo with
SSE disabled.

llvm-svn: 63751
2009-02-04 19:08:01 +00:00
Dan Gohman
1cd89d625c Minor code cleanups; no functionality change.
llvm-svn: 63740
2009-02-04 17:28:58 +00:00
Dale Johannesen
19fc835580 Remove non-DebugLoc forms of the exotic forms
of Lod and Sto; patch uses.

llvm-svn: 63716
2009-02-04 02:34:38 +00:00
Dale Johannesen
52d1d8d5a0 Remove some more non-DebugLoc versions of construction
functions, with callers adjusted to fit.

llvm-svn: 63705
2009-02-04 01:48:28 +00:00
Dale Johannesen
2c4af04551 Remove a few non-DebugLoc versions of node creation
functions.

llvm-svn: 63703
2009-02-04 01:17:06 +00:00
Mon P Wang
430525dc4f Fixes a case where we generate an incorrect mask for pshfhw in the presence
of undefs and incorrectly determining if we have punpckldq.

llvm-svn: 63702
2009-02-04 01:16:59 +00:00
Dale Johannesen
fa244d6e2d Patch up omissions in DebugLoc propagation.
llvm-svn: 63693
2009-02-04 00:33:20 +00:00
Dale Johannesen
f9b2746030 Need this file too.
llvm-svn: 63674
2009-02-03 22:26:34 +00:00
Dale Johannesen
b7f2857776 Add some DL propagation to places that didn't
have it yet.  More coming.

llvm-svn: 63673
2009-02-03 22:26:09 +00:00
Dale Johannesen
45009f127b DebugLoc propgation
llvm-svn: 63664
2009-02-03 21:48:12 +00:00
Dale Johannesen
358418bb3d DebugLoc propagation. done with file.
llvm-svn: 63656
2009-02-03 20:21:25 +00:00
Dale Johannesen
6c8c315519 DebugLoc propagation. 2/3 through file.
llvm-svn: 63650
2009-02-03 19:33:06 +00:00
Dan Gohman
7d19e6cd6d Tevert part of the x86 subtarget logic changes: when -march=x86-64
is given, override the subtarget settings and enable 64-bit support.
This restores the earlier behavior, and fixes regressions on
Non-64-bit-capable x86-32 hosts.

This isn't necessarily the best approach, but the most obvious
alternative is to require -mcpu=x86-64 or -mattr=+64bit to be used
with -march=x86-64 when the host doesn't have 64-bit support. This
makes things little more consistent, but it's less convenient, and
it has the practical drawback of requiring lots of test changes, so
I opted for the above approach for now.

llvm-svn: 63642
2009-02-03 18:53:21 +00:00
Bill Wendling
5b177df8e9 Create DebugLoc information in FastISel. Several temporary methods were
created. Specifically, those BuildMIs which use
"DebugLoc::getUnknownLoc()". I'll remove them soon.

llvm-svn: 63584
2009-02-03 00:55:04 +00:00
Dan Gohman
2170150035 Change Feature64Bit to not imply FeatureSSE2. All x86-64 hardware has
SSE2, however it's possible to disable SSE2, and the subtarget support
code thinks that if 64-bit implies SSE2 and SSE2 is disabled then
64-bit should also be disabled. Instead, just mark all the 64-bit
subtargets as explicitly supporting SSE2.

Also, move the code that makes -march=x86-64 enable 64-bit support by
default to only apply when there is no explicit subtarget. If you
need to specify a subtarget and you want 64-bit code, you'll need to
select a subtarget that supports 64-bit code.

llvm-svn: 63575
2009-02-03 00:04:43 +00:00
Torok Edwin
2bc41a36ba Only force SSE level if it is not correct.
Add an assert to check HasX86_64 status.

llvm-svn: 63552
2009-02-02 21:57:34 +00:00
Torok Edwin
c1017185a5 remove #if 0 code on Bill's request.
llvm-svn: 63542
2009-02-02 20:23:02 +00:00
Sanjiv Gupta
c47a19b23e Made the common case of default address space directive as non-virtual for performance reasons. Provide a single virtual interface for directives of all sizes in non-default address spaces.
llvm-svn: 63521
2009-02-02 16:53:06 +00:00
Evan Cheng
16c8f917fb ADD / SUB / SMUL / UMUL with overflow second result top bits must be zero.
llvm-svn: 63509
2009-02-02 09:15:04 +00:00
Evan Cheng
e8dfbb5884 Add comment.
llvm-svn: 63506
2009-02-02 08:19:07 +00:00
Evan Cheng
483bbd1643 Teach LowerBRCOND to recognize (xor (setcc x), 1). The xor inverts the condition. It's normally transformed by the dag combiner, unless the condition is set by a arithmetic op with overflow.
llvm-svn: 63505
2009-02-02 08:07:36 +00:00
Torok Edwin
b4c9a6097f Implement -mno-sse: if SSE is disabled on x86-64, don't store XMM on stack for
var-args, and don't allow FP return values

llvm-svn: 63495
2009-02-01 18:15:56 +00:00
Duncan Sands
cac6cf74f9 Fix PR3453 and probably a bunch of other potential
crashes or wrong code with codegen of large integers:
eliminate the legacy getIntegerVTBitMask and
getIntegerVTSignBit methods, which returned their
value as a uint64_t, so couldn't handle huge types.

llvm-svn: 63494
2009-02-01 18:06:53 +00:00
Dale Johannesen
39738b1ff8 Make LowerCallTo and LowerArguments take a DebugLoc
argument.  Adjust all callers and overloaded versions.

llvm-svn: 63444
2009-01-30 23:10:59 +00:00
Bill Wendling
67737da99b Get rid of the non-DebugLoc-ified getNOT() method.
llvm-svn: 63442
2009-01-30 23:03:19 +00:00
Sanjiv Gupta
11d082d56e Fixed the comment. No functionality change.
llvm-svn: 63387
2009-01-30 09:01:44 +00:00
Sanjiv Gupta
b4cf873468 Use sublw for comparison with literals instead of subwf.
llvm-svn: 63382
2009-01-30 07:55:25 +00:00
Mon P Wang
5db99442e4 When PerformBuildVectorCombine, avoid creating a X86ISD::VZEXT_LOAD of
an illegal type.

llvm-svn: 63380
2009-01-30 07:07:40 +00:00
Sanjiv Gupta
e442452ade Enable emitting of constant values in non-default address space as well. The APIs emitting constants now take an additional parameter signifying the address space in which to emit. The APIs like getData8BitsDirective() etc are made virtual enabling targets to be able to define appropirate directivers for various sizes and address spaces.
llvm-svn: 63377
2009-01-30 04:25:10 +00:00
Dan Gohman
9d120d6d8f Make x86's BT instruction matching more thorough, and add some
dagcombines that help it match in several more cases. Add
several more cases to test/CodeGen/X86/bt.ll. This doesn't
yet include matching for BT with an immediate operand, it
just covers more register+register cases.

llvm-svn: 63266
2009-01-29 01:59:02 +00:00
Mon P Wang
8abb07a527 Fixed lowering of v816 shuffles.
llvm-svn: 63252
2009-01-28 23:11:14 +00:00
Duncan Sands
aee16d4916 Rename getAnalysisToUpdate to getAnalysisIfAvailable.
llvm-svn: 63198
2009-01-28 13:14:17 +00:00
Evan Cheng
2a965124b7 The memory alignment requirement on some of the mov{h|l}p{d|s} patterns are 16-byte. That is overly strict. These instructions read / write f64 memory locations without alignment requirement.
llvm-svn: 63195
2009-01-28 08:35:02 +00:00
Mon P Wang
e1c886f775 Add shuffle splat pattern for x86 sse shifts.
llvm-svn: 63193
2009-01-28 08:12:05 +00:00
Evan Cheng
31f8d3639f Suppress a compile time warning.
llvm-svn: 63161
2009-01-28 00:53:34 +00:00
Anton Korobeynikov
7e63f1aae6 Treat [1 x i8] zeroinitializer as a C string, placing such stuff into
mergeable string section. I don't see any bad impact of such decision
(rather then placing it into mergeable const section, as it was before),
but at least Darwin linker won't complain anymore.

The problem in LLVM is that we don't have special type for string constants
(like gcc does). Even more, we have two separate types: ConstatArray for non-null
strings and ConstantAggregateZero for null stuff.... It's a bit weird :)

llvm-svn: 63142
2009-01-27 22:29:24 +00:00
Dan Gohman
c017343459 Reformat the allocation-order arrays to a more conventional style.
llvm-svn: 63121
2009-01-27 19:25:38 +00:00
Dan Gohman
f7e8bf0511 Respect the DisableRedZone flag on PowerPC.
llvm-svn: 63119
2009-01-27 19:19:28 +00:00
Dan Gohman
7d80f8688e Simplify findNonImmUse; return the result using the return value
instead of via a by-reference argument. No functionality change.

llvm-svn: 63118
2009-01-27 19:04:30 +00:00
Evan Cheng
a05436f739 Implement multiple with overflow by 2 with an add instruction.
llvm-svn: 63090
2009-01-27 03:30:42 +00:00
Dan Gohman
2e0343e321 Eliminate unnecessary operands-list traversals.
llvm-svn: 63088
2009-01-27 02:37:43 +00:00
Dan Gohman
f3c2ac3497 Enable the red zone on x86-64 by default.
llvm-svn: 63078
2009-01-27 00:58:47 +00:00
Dan Gohman
4ad174b236 Fix the Red Zone calculation for functions with frame pointers.
Don't use the Red Zone when dynamic stack realignment is needed.
This could be implemented, but most x86-64 ABIs don't require
dynamic stack realignment so it isn't urgent.

llvm-svn: 63074
2009-01-27 00:40:06 +00:00
Scott Michel
e00d746487 CellSPU:
- Update DWARF debugging support.

llvm-svn: 63059
2009-01-26 22:33:37 +00:00
Scott Michel
56fa9ba0b6 Make the Dwarf macro information section optional; CellSPU's assembler
doesn't support it. The default is set to 'true', so this should not
impact any other target backends.

llvm-svn: 63058
2009-01-26 22:32:51 +00:00
Dan Gohman
3a51d8e847 Implement Red Zone utilization on x86-64. This is currently
disabled by default; I'll enable it when I hook it up with
the llvm-gcc flag which controls it.

llvm-svn: 63056
2009-01-26 22:22:31 +00:00
Evan Cheng
ec03e0cd3b Enhance logic in X86DAGToDAGISel::PreprocessForRMW which move load inside callseq_start to allow it to be folded into a call. It was not considering the cases where a token factor is between the load and the callseq_start.
llvm-svn: 63022
2009-01-26 18:43:34 +00:00
Dan Gohman
4abaebae0c Take the next steps in making SDUse more consistent with LLVM Use, and
tidy up SDUse and related code.
 - Replace the operator= member functions with a set method, like
   LLVM Use has, and variants setInitial and setNode, which take
   care up updating use lists, like LLVM Use's does. This simplifies
   code that calls these functions.
 - getSDValue() is renamed to get(), as in LLVM Use, though most
   places can either use the implicit conversion to SDValue or the
   convenience functions instead.
 - Fix some more node vs. value terminology issues.

Also, eliminate the one remaining use of SDOperandPtr, and
SDOperandPtr itself.

llvm-svn: 62995
2009-01-26 04:35:06 +00:00
Scott Michel
af51520775 Untabify code.
llvm-svn: 62991
2009-01-26 03:37:41 +00:00
Scott Michel
da9360e77e CellSPU:
- Rename fcmp.ll test to fcmp32.ll, start adding new double tests to fcmp64.ll
- Fix select_bits.ll test
- Capitulate to the DAGCombiner and move i64 constant loads to instruction
  selection (SPUISelDAGtoDAG.cpp).

  <rant>DAGCombiner will insert all kinds of 64-bit optimizations after
  operation legalization occurs and now we have to do most of the work that
  instruction selection should be doing twice (once to determine if v2i64
  build_vector can be handled by SelectCode(), which then runs all of the
  predicates a second time to select the necessary instructions.) But,
  CellSPU is a good citizen.</rant>

llvm-svn: 62990
2009-01-26 03:31:40 +00:00
Nate Begeman
48639fe6dc Fix a typo
llvm-svn: 62989
2009-01-26 03:15:54 +00:00
Nate Begeman
d2f708eca5 De-identifying per sabre review
llvm-svn: 62988
2009-01-26 03:15:31 +00:00
Nate Begeman
92efc4f0ce Map address space 256 to gs; similar mappings could be supported for the
other x86 segments.  address space 0 is stack/default, 1-255 are reserved for
client use.

llvm-svn: 62980
2009-01-26 01:24:32 +00:00
Nate Begeman
81d70f3f54 Support pattern matching various x86 sse shifts.
llvm-svn: 62979
2009-01-26 00:52:55 +00:00
Chris Lattner
e7bf6037e2 silence a warning when assertions are disabled.
llvm-svn: 62976
2009-01-25 23:08:00 +00:00
Torok Edwin
6f715ebe85 should have removed the + when manually applying a patch!
llvm-svn: 62973
2009-01-25 20:29:34 +00:00
Torok Edwin
3f54410405 revert this patch for now, because Codegen does still want to generate SSE code,
for example in the case of va-args. XFAIL associated tests.

llvm-svn: 62972
2009-01-25 20:21:24 +00:00
Torok Edwin
49b1d3e3cc If user explicitly asks not to use SSE, don't force it. This fixes LLVM part of PR3402.
llvm-svn: 62967
2009-01-25 17:58:56 +00:00
Evan Cheng
71ca3e2bdb Private linkage support for PPC / Darwin.
llvm-svn: 62955
2009-01-25 06:32:01 +00:00
Nate Begeman
48f3fe9199 Fix an indent and a typo.
llvm-svn: 62940
2009-01-24 22:12:48 +00:00
Torok Edwin
6dd79be128 add note about possible GEP improvement with fields of size 0.
llvm-svn: 62925
2009-01-24 19:30:25 +00:00
Chris Lattner
97b6f6a674 hopefully address PR3379 by making the P modifier work in x86 inline asm.
llvm-svn: 62887
2009-01-23 22:33:40 +00:00
Bob Wilson
186046e657 Add SelectionDAG::getNOT method to construct bitwise NOT operations,
corresponding to the "not" and "vnot" PatFrags.  Use the new method
in some places where it seems appropriate.

llvm-svn: 62768
2009-01-22 17:39:32 +00:00
Evan Cheng
c971801ae1 Eliminate a couple of fields from TargetRegisterClass: SubRegClasses and SuperRegClasses. These are not necessary. Also eliminate getSubRegisterRegClass and getSuperRegisterRegClass. These are slow and their results can change if register file names change. Just use TargetLowering::getRegClassFor() to get the right TargetRegisterClass instead.
llvm-svn: 62762
2009-01-22 09:10:11 +00:00
Chris Lattner
fcf56e7fbe add a note
llvm-svn: 62760
2009-01-22 07:16:03 +00:00
Dan Gohman
29b575c6cd Recognize inline asm for bswap on x86-64 GLIBC. This allows it
to be supported in the JIT.

llvm-svn: 62730
2009-01-21 23:40:54 +00:00
Evan Cheng
43d680b0d8 Also favors NOT64r.
llvm-svn: 62710
2009-01-21 19:45:31 +00:00
Chris Lattner
2b6b947b4f fix warning in release-asserts mode and spelling of assert.
llvm-svn: 62699
2009-01-21 18:38:18 +00:00
Dan Gohman
704f0d5879 Fix a recent regression. ClrOpcode is not set for i8; for i8, if
we want to clear %ah to zero before a division, just use a
zero-extending mov to %al. This fixes PR3366.

llvm-svn: 62691
2009-01-21 14:50:16 +00:00
Sanjiv Gupta
ebef67f13c Fixed build warnings. Restoring changes done in 62600, they were lost in 62655.
llvm-svn: 62681
2009-01-21 09:02:46 +00:00
Duncan Sands
392dc77fc6 Cleanup whitespace and comments, and tweak some
prototypes, in operand type legalization.  No
functionality change.

llvm-svn: 62680
2009-01-21 09:00:29 +00:00
Sanjiv Gupta
37fdb5ca11 Implement LowerOperationWrapper for legalizer.
Also a few signed comparison fixes.

llvm-svn: 62665
2009-01-21 05:44:05 +00:00
Scott Michel
c80e71ac35 CellSPU:
- Ensure that (operation) legalization emits proper FDIV libcall when needed.
- Fix various bugs encountered during llvm-spu-gcc build, along with various
  cleanups.
- Start supporting double precision comparisons for remaining libgcc2 build.
  Discovered interesting DAGCombiner feature, which is currently solved via
  custom lowering (64-bit constants are not legal on CellSPU, but DAGCombiner
  insists on inserting one anyway.)
- Update README.

llvm-svn: 62664
2009-01-21 04:58:48 +00:00
Evan Cheng
0ed6a9d7e0 Favors generating "not" over "xor -1". For example.
unsigned test(unsigned a) {
  return ~a;
}
llvm used to generate:
movl    $4294967295, %eax
xorl    4(%esp), %eax

Now it generates:
movl      4(%esp), %eax
notl      %eax

It's 3 bytes shorter.

llvm-svn: 62661
2009-01-21 02:09:05 +00:00
Evan Cheng
b3c82db63d Change TargetInstrInfo::isMoveInstr to return source and destination sub-register indices as well.
llvm-svn: 62600
2009-01-20 19:12:24 +00:00
Dan Gohman
7663e08915 Add a README entry noticed while investigating PR3216.
llvm-svn: 62558
2009-01-20 01:07:33 +00:00
Evan Cheng
06cfade044 DIVREM isel deficiency: If sign bit is known zero, zero out DX/EDX/RDX instead of sign extending the low part (in AX/EAX/RAX) into it.
llvm-svn: 62519
2009-01-19 19:06:11 +00:00
Evan Cheng
3c00875658 Fix 80 col violations.
llvm-svn: 62518
2009-01-19 18:57:29 +00:00
Evan Cheng
2f50b49f22 Handle ISD::DECLARE with PIC relocation model.
llvm-svn: 62516
2009-01-19 18:31:51 +00:00
Evan Cheng
a14fd26a8b Minor tweak to LowerUINT_TO_FP_i32. Bias (after scalar_to_vector) has two uses so we should make it the second source operand of ISD::OR so 2-address pass won't have to be smart about commuting.
%reg1024<def> = MOVSDrm %reg0, 1, %reg0, <cp#0>, Mem:LD(8,8) [ConstantPool + 0]
%reg1025<def> = MOVSD2PDrr %reg1024
%reg1026<def> = MOVDI2PDIrm <fi#-1>, 1, %reg0, 0, Mem:LD(4,16) [FixedStack-1 + 0]
%reg1027<def> = ORPSrr %reg1025<kill>, %reg1026<kill>
%reg1028<def> = MOVPD2SDrr %reg1027<kill>
%reg1029<def> = SUBSDrr %reg1028<kill>, %reg1024<kill>
%reg1030<def> = CVTSD2SSrr %reg1029<kill>
MOVSSmr <fi#0>, 1, %reg0, 0, %reg1030<kill>, Mem:ST(4,4) [FixedStack0 + 0]
%reg1031<def> = LD_Fp32m80 <fi#0>, 1, %reg0, 0, Mem:LD(4,16) [FixedStack0 + 0]
RET %reg1031<kill>, %ST0<imp-use,kill>

The reason 2-addr pass isn't smart enough to commute the ORPSrr is because it can't look pass the MOVSD2PDrr instruction.

llvm-svn: 62505
2009-01-19 08:19:57 +00:00
Evan Cheng
53e83a2eb9 Now not UINT_TO_FP is legal (it's marked custom), dag combiner won't
optimize it to a SINT_TO_FP when the sign bit is known zero. X86 isel should perform the optimization itself.

llvm-svn: 62504
2009-01-19 08:08:22 +00:00
Bill Wendling
ce30a8cab9 Extend thi
llvm-svn: 62415
2009-01-17 07:40:19 +00:00
Evan Cheng
182d9c4c9f Fix MatchAddress bug that's preventing negative displacement from being folded in 64-bit mode.
llvm-svn: 62413
2009-01-17 07:09:27 +00:00
Bill Wendling
ddd55bdfec Temporarily revert my last change. It is causing a bootstrap failure.
llvm-svn: 62405
2009-01-17 04:23:51 +00:00
Bill Wendling
d18c38c0f2 Implement a special algorithm for converting uint_to_fp for i32 values on
X86. This code:

void f() {
  uint32_t x;
  float y = (float)x;
}

used to be:

     movl     %eax, -8(%ebp)
     movl     [2^52 double], -4(%ebp)
     movsd    -8(%ebp), %xmm0
     subsd    [2^52 double], %xmm0
     cvtsd2ss %xmm0, %xmm0

Is now:

   movsd        [2^52 double], %xmm0
   movsd        %xmm0, %xmm1
   movd         %ecx, %xmm2
   orps         %xmm2, %xmm1
   subsd        %xmm0, %xmm1
   cvtsd2ss     %xmm1, %xmm0

This is faster on X86. Note that there's an extra load of %xmm0 into %xmm1. That
will be fixed in a later coalescer fix.

llvm-svn: 62404
2009-01-17 03:56:04 +00:00
Oscar Fuentes
ee36d9ce83 CMake: Add lib/Target/IA64/IA64Subtarget.cpp
llvm-svn: 62394
2009-01-17 01:50:32 +00:00
Evan Cheng
d7cc550900 Fix PPC ISD::Declare isel and eliminate the need for PPCTargetLowering::LowerGlobalAddress to check if isVerifiedDebugInfoDesc() is true. Given the recent changes, it would falsely return true for a lot of GlobalAddressSDNode's.
llvm-svn: 62373
2009-01-16 22:57:32 +00:00
Dan Gohman
cb207179b1 Give IA64 a TargetSubtarget subclass, so that it can
implement getSubtargetImpl.

llvm-svn: 62369
2009-01-16 22:49:36 +00:00
Bill Wendling
c9e856fbfd Add support for non-zero __builtin_return_address values on X86.
llvm-svn: 62338
2009-01-16 19:25:27 +00:00
Evan Cheng
c58653bd6e ARMCompilationCallback should not save / restore vfp registers if vfp is not available.
llvm-svn: 62299
2009-01-16 02:16:37 +00:00
Dan Gohman
c5b1dbdb4e Initial hazard recognizer support in post-pass scheduling. This includes
a new toy hazard recognizier heuristic which attempts to direct the
scheduler to avoid clumping large groups of loads or stores too densely.

llvm-svn: 62291
2009-01-16 01:33:36 +00:00
Dan Gohman
3e0dcbbd15 Generalize the HazardRecognizer interface so that it can be used
to support MachineInstr-based scheduling in addition to
SDNode-based scheduling.

llvm-svn: 62284
2009-01-15 22:18:12 +00:00
Rafael Espindola
46b374f55b Fix Alpha test and support for private linkage.
llvm-svn: 62282
2009-01-15 21:51:46 +00:00
Mon P Wang
4cfe965df2 Expand insert/extract of a <4 x i32> with a variable index.
llvm-svn: 62281
2009-01-15 21:10:20 +00:00
Rafael Espindola
0aba6c9435 Add the private linkage.
llvm-svn: 62279
2009-01-15 20:18:42 +00:00
Dan Gohman
6fcee67989 Move a few containers out of ScheduleDAGInstrs::BuildSchedGraph
and into the ScheduleDAGInstrs class, so that they don't get
destructed and re-constructed for each block. This fixes a
compile-time hot spot in the post-pass scheduler.

To help facilitate this, tidy and do some minor reorganization
in the scheduler constructor functions.

llvm-svn: 62275
2009-01-15 19:20:50 +00:00
Dan Gohman
0b06dcbf4b Add load-folding table entries for BT*ri8 instructions.
llvm-svn: 62267
2009-01-15 17:57:09 +00:00