RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-26 22:42:46 +02:00
Code Issues Projects Releases Wiki Activity
43,034 Commits 4 Branches 5 Tags 704 MiB
1b795803dd
Commit Graph

2239 Commits

Author SHA1 Message Date
Dan Gohman
8e3c88c4e9 Use PassManagerBase instead of FunctionPassManager for functions 
that merely add passes. This allows them to be used with either
FunctionPassManager or PassManager, or even with a custom new
kind of pass manager.

llvm-svn: 48256
 2008-03-11 22:29:46 +00:00
Dan Gohman
85bfbe2293 Generalize ExpandIntToFP to handle the case where the operand is legal 
and it's the result that requires expansion. This code is a little confusing
because the TargetLoweringInfo tables for [US]INT_TO_FP use the operand type
(the integer type) rather than the result type. 

llvm-svn: 48206
 2008-03-11 01:59:03 +00:00
Dale Johannesen
3278acdaaa Disable prolog code that aligns the stack when a 
local object of >16 byte alignment exists.  It does not
work and getting it to work is not trivial, as explained
in the comment.  This fixes all the remaining ppc32
failures in the struct-layout-1 part of the gcc testsuite.

(gcc does not support this either, and the only way to
get such an object is with __attribute__((aligned)) or
generic vectors; it can't be done in a standard-conforming
program, or with Altivec.  So I think disabling it is OK.)

llvm-svn: 48188
 2008-03-10 22:59:46 +00:00
Bill Wendling
80bc045af5 Change the "enable/disable" mechanism so that we can enable PPC register 
scavenging for 32-bit and 64-bit separately.

llvm-svn: 48186
 2008-03-10 22:49:16 +00:00
Evan Cheng
7d9e5a7680 Default ISD::PREFETCH to expand. 
llvm-svn: 48169
 2008-03-10 19:38:10 +00:00
Chris Lattner
52be2c645e fix 80 col violations. 
llvm-svn: 48166
 2008-03-10 18:55:53 +00:00
Nicolas Geoffray
a904844534 Stylistic modifications. No functionality changes. 
llvm-svn: 48158
 2008-03-10 17:46:45 +00:00
Scott Michel
bb8e8fca47 Give TargetLowering::getSetCCResultType() a parameter so that ISD::SETCC's 
return ValueType can depend its operands' ValueType.

This is a cosmetic change, no functionality impacted.

llvm-svn: 48145
 2008-03-10 15:42:14 +00:00
Nicolas Geoffray
e3381f0f1f Add description of individual bits in CR. This fix PR1765. 
llvm-svn: 48143
 2008-03-10 14:12:10 +00:00
Dale Johannesen
e6b0009792 Increase ISD::ParamFlags to 64 bits. Increase the ByValSize 
field to 32 bits, thus enabling correct handling of ByVal
structs bigger than 0x1ffff.  Abstract interface a bit.
Fixes gcc.c-torture/execute/pr23135.c and 
gcc.c-torture/execute/pr28982b.c in gcc testsuite (were ICE'ing
on ppc32, quietly producing wrong code on x86-32.)

llvm-svn: 48122
 2008-03-10 02:17:22 +00:00
Chris Lattner
4a5abdbe3f Darwin PPC64 indirect call target goes in X12, not R12. This fixes these 
two regression tests:
test/CodeGen/PowerPC/2007-10-21-LocalRegAllocAssert.ll
test/CodeGen/PowerPC/2007-10-21-LocalRegAllocAssert2.ll

llvm-svn: 48120
 2008-03-09 20:49:33 +00:00
Dale Johannesen
55d6e1a5aa More ppc32 byval handling (bug fixes). Things 
are looking pretty good now.

llvm-svn: 48043
 2008-03-08 01:41:42 +00:00
Evan Cheng
dba1dfe962 Implement x86 support for @llvm.prefetch. It corresponds to prefetcht{0|1|2} and prefetchnta instructions. 
llvm-svn: 48042
 2008-03-08 00:58:38 +00:00
Dan Gohman
afeac8050d Add support for calls with i128 return values on ppc64. 
llvm-svn: 48041
 2008-03-08 00:19:12 +00:00
Bill Wendling
948c50e2be PPC64 passes arguments of integral type in i64 registers, not i32. Reflect this 
by promoting smaller integral values (i32 at this point) to i64, then truncating
to get the wanted size.

llvm-svn: 48030
 2008-03-07 20:49:02 +00:00
Dan Gohman
5bf464e1e6 Add support for lowering 128-bit shifts on ppc64. 
llvm-svn: 48029
 2008-03-07 20:36:53 +00:00
Dale Johannesen
3e6bacf7be Next bits of PPC byval handling. Basically functional 
but there are bugs.

llvm-svn: 48028
 2008-03-07 20:27:40 +00:00
Chris Lattner
08ec4919ea Add support for ppc64 shifts with 7-bit (oversized) shift amount (e.g. PPCshl). 
llvm-svn: 48027
 2008-03-07 20:18:24 +00:00
Chris Lattner
2f13ccc181 Replace SDT_PPCShiftOp in favor of SDTIntBinOps. This allows it to work 
with 32 or 64-bit operands/results.

llvm-svn: 48026
 2008-03-07 20:13:51 +00:00
Dale Johannesen
6bcc9808db Next bit of PPC ByVal handling; call-site code seems 
correct now.

llvm-svn: 47978
 2008-03-05 23:31:27 +00:00
Bill Wendling
37f5b4586a Removed spurious EnablePPCRS check. 
llvm-svn: 47918
 2008-03-04 23:27:33 +00:00
Dale Johannesen
86867d323e Move PPC lowering functions into PPCTargetLowering 
class (cosmetic).  First piece of byval implementation;
this doesn't work yet.  No functional change.

llvm-svn: 47917
 2008-03-04 23:17:14 +00:00
Bill Wendling
dc9de245cb Use a command-line option to turn register scavenging on/off for PPC. 
llvm-svn: 47915
 2008-03-04 23:13:51 +00:00
Bill Wendling
8d64999daf This is the initial check-in for adding register scavenging to PPC. (Currently, 
PPC-64 doesn't work.) This also lowers the spilling of the CR registers so that
it uses a register other than the default R0 register (the scavenger scrounges
for one). A significant part of this patch fixes how kill information is
handled.

llvm-svn: 47863
 2008-03-03 22:19:16 +00:00
Chris Lattner
f2a9b32eec add a note 
llvm-svn: 47830
 2008-03-02 19:27:34 +00:00
Chris Lattner
4c67781884 Evan implemented this. 
llvm-svn: 47827
 2008-03-02 17:56:29 +00:00
Anton Korobeynikov
875da2420a Use enumeration for preffered EH dwarf encoding reason 
llvm-svn: 47770
 2008-02-29 22:09:08 +00:00
Dale Johannesen
310201ba32 Interface of getByValTypeAlignment differed between 
generic & x86 versions; change generic to follow x86
and improve comments.  Add PPC version (not right
for non-Darwin.)

llvm-svn: 47734
 2008-02-28 22:31:51 +00:00
Evan Cheng
f8b1257d2e Add a quick and dirty "loop aligner pass". x86 uses it to align its loops to 16-byte boundaries. 
llvm-svn: 47703
 2008-02-28 00:43:03 +00:00
Anton Korobeynikov
f8d5799001 EHPreferredDataFormat hook for PPC targets. Looks like Darwin 
uses the same encoding everywhere. Linux FIXME'ed.

llvm-svn: 47701
 2008-02-27 23:49:15 +00:00
Dan Gohman
5d96a06b0b Don't hard-code the mask size to be 32, which is incorrect on ppc64 
and was causing aborts with the new APInt changes. This may also be
fixing an obscure ppc64 bug.

llvm-svn: 47692
 2008-02-27 21:12:32 +00:00
Bill Wendling
2cae66e28b Final de-tabification. 
llvm-svn: 47663
 2008-02-27 06:33:05 +00:00
Dan Gohman
938e74654b Convert the last remaining users of the non-APInt form of 
ComputeMaskedBits to use the APInt form, and remove the
non-APInt form.

llvm-svn: 47654
 2008-02-27 01:23:58 +00:00
Bill Wendling
8fb166bf6c Rename PrintableName to Name. 
llvm-svn: 47629
 2008-02-26 21:47:57 +00:00
Bill Wendling
50f5c4be14 Change "Name" to "AsmName" in the target register info. Gee, a refactoring tool 
would have been a Godsend here!

llvm-svn: 47625
 2008-02-26 21:11:01 +00:00
Bill Wendling
a369a6add8 Some platforms use the same name for 32-bit and 64-bit registers (like 
%r3 on PPC) in their ASM files. However, it's hard for humans to read
during debugging. Adding a new field to the register data that lets you
specify a different name to be printed than the one that goes into the
ASM file -- %x3 instead of %r3, for instance.

llvm-svn: 47534
 2008-02-24 00:56:13 +00:00
Anton Korobeynikov
4f6e612973 Remove bunch of gcc 4.3-related warnings from Target 
llvm-svn: 47369
 2008-02-20 11:22:39 +00:00
Andrew Lenharth
da54523742 I cannot find a libgcc function for this builtin. Therefor expanding it to a noop (which is how it use to be treated). If someone who knows the x86 backend better than me could tell me how to get a lock prefix on an instruction, that would be nice to complete x86 support. 
llvm-svn: 47213
 2008-02-16 14:46:26 +00:00
Chris Lattner
d55c26a77d Handle \n's in value names for more targets. The asm printers 
really really really need refactoring :(

llvm-svn: 47171
 2008-02-15 19:04:54 +00:00
Dale Johannesen
b9e1a37497 Cosmetics. 
llvm-svn: 47168
 2008-02-15 18:40:53 +00:00
Dale Johannesen
de53aaec39 Remove warning about 64-bit code on processor 
that doesn't support it.  Per Chris.

llvm-svn: 47162
 2008-02-15 18:09:51 +00:00
Dale Johannesen
6cb8a628a2 Rewrite tblgen handling of subtarget features so 
it follows the order of the enum, not alphabetical.
The motivation is to make -mattr=+ssse3,+sse41
select SSE41 as it ought to.  Added "ignored"
enum values of 0 to PPC and SPU to avoid compiler
warnings.

llvm-svn: 47143
 2008-02-14 23:35:16 +00:00
Nate Begeman
1ef1013b6c Change how FP immediates are handled. 
1) ConstantFP is now expand by default
2) ConstantFP is not turned into TargetConstantFP during Legalize
   if it is legal.

This allows ConstantFP to be handled like Constant, allowing for 
targets that can encode FP immediates as MachineOperands.

As a bonus, fix up Itanium FP constants, which now correctly match,
and match more constants!  Hooray.

llvm-svn: 47121
 2008-02-14 08:57:00 +00:00
Dan Gohman
99b38405e3 Simplify some logic in ComputeMaskedBits. And change ComputeMaskedBits 
to pass the mask APInt by value, not by reference. 

llvm-svn: 47096
 2008-02-13 22:28:48 +00:00
Nicolas Geoffray
72fa78e195 Enable exception handling int JIT 
llvm-svn: 47079
 2008-02-13 18:39:37 +00:00
Chris Lattner
80b3a56774 Fix the PPC JIT regressions by encoding zeroreg as 0 for BLR. 
llvm-svn: 47067
 2008-02-13 17:24:14 +00:00
Chris Lattner
57f2088225 don't try to avoid inserting loads when lowering FORMAL_ARGUMENTS. 
DAGCombine is now quite good at zapifying them.

llvm-svn: 47053
 2008-02-13 07:35:30 +00:00
Nate Begeman
5f18794295 readme updates 
llvm-svn: 47051
 2008-02-13 07:06:12 +00:00
Nate Begeman
1867c6c264 Make register scavenging happy by not using a reg (CR0) that isn't defined 
llvm-svn: 47045
 2008-02-13 02:58:33 +00:00
Evan Cheng
4b37f5ff05 commuteInstr() can now commute non-ssa machine instrs. 
llvm-svn: 47043
 2008-02-13 02:46:49 +00:00
Dan Gohman
09023887f8 Convert SelectionDAG::ComputeMaskedBits to use APInt instead of uint64_t. 
Add an overload that supports the uint64_t interface for use by clients
that haven't been updated yet.

llvm-svn: 47039
 2008-02-13 00:35:47 +00:00
Evan Cheng
b05b05aba5 Revert r46916 PPCTargetAsmInfo.cpp. 
llvm-svn: 47020
 2008-02-12 19:25:12 +00:00
Nate Begeman
9e8b2ffd52 additional missing feature 
llvm-svn: 46948
 2008-02-11 04:16:09 +00:00
Dan Gohman
cabaec582f Rename MRegisterInfo to TargetRegisterInfo. 
llvm-svn: 46930
 2008-02-10 18:45:23 +00:00
Nick Lewycky
b072c0b3ed Match GCC's behaviour for these sections. 
llvm-svn: 46916
 2008-02-10 00:03:54 +00:00
Evan Cheng
90f03a0b88 It's not always safe to fold movsd into xorpd, etc. Check the alignment of the load address first to make sure it's 16 byte aligned. 
llvm-svn: 46893
 2008-02-08 21:20:40 +00:00
Dan Gohman
eb7c8e4f6b Follow Chris' suggestion; change the PseudoSourceValue accessors 
to return pointers instead of references, since this is always what
is needed.

llvm-svn: 46857
 2008-02-07 18:41:25 +00:00
Dan Gohman
f00842e086 Re-apply the memory operand changes, with a fix for the static 
initializer problem, a minor tweak to the way the
DAGISelEmitter finds load/store nodes, and a renaming of the
new PseudoSourceValue objects.

llvm-svn: 46827
 2008-02-06 22:27:42 +00:00
Nate Begeman
9f4245c16a Ident mnemonics appropriately 
llvm-svn: 46746
 2008-02-05 08:49:09 +00:00
Evan Cheng
1c67dcaae7 Dwarf requires variable entries to be in the source order. Right now, since we are recording variable information at isel time this means parameters would appear in the reverse order. The short term fix is to issue recordVariable() at asm printing time instead. 
llvm-svn: 46724
 2008-02-04 23:06:48 +00:00
Evan Cheng
f61d1115af Get rid of the annoying blank lines before labels. 
llvm-svn: 46667
 2008-02-02 08:39:46 +00:00
Evan Cheng
dd8d07749a Unbreak ppc debug support. 
llvm-svn: 46665
 2008-02-02 05:06:29 +00:00
Evan Cheng
c57ec111f2 SDIsel processes llvm.dbg.declare by recording the variable debug information descriptor and its corresponding stack frame index in MachineModuleInfo. This only works if the local variable is "homed" in the stack frame. It does not work for byval parameter, etc. 
Added ISD::DECLARE node type to represent llvm.dbg.declare intrinsic. Now the intrinsic calls are lowered into a SDNode and lives on through out the codegen passes.
For now, since all the debugging information recording is done at isel time, when a ISD::DECLARE node is selected, it has the side effect of also recording the variable. This is a short term solution that should be fixed in time.

llvm-svn: 46659
 2008-02-02 04:07:54 +00:00
Evan Cheng
d6222fc11d Remove the nasty LABEL hack with a much less evil one. Now llvm.dbg.func.start implies a stoppoint is set. SelectionDAGISel records a new source line but does not create a ISD::LABEL node for this special stoppoint. Asm printer will magically print this label. This ensures nothing is emitted before. 
llvm-svn: 46635
 2008-02-01 09:10:45 +00:00
Evan Cheng
2a533e6894 Revert 46556 and 46585. Dan please fix the PseudoSourceValue problem and re-commit. 
llvm-svn: 46623
 2008-01-31 21:00:00 +00:00
Evan Cheng
705212577d Add an extra operand to LABEL nodes which distinguishes between debug, EH, or misc labels. This fixes the EH breakage. However I am not convinced this is *the* solution. 
llvm-svn: 46609
 2008-01-31 09:59:15 +00:00
Evan Cheng
f9d2cf4cae Makes the same change in ppc backend: avoid inserting prologue before debug labels. 
llvm-svn: 46596
 2008-01-31 03:33:38 +00:00
Dan Gohman
3993809a0c Rename ISD::FLT_ROUNDS to ISD::FLT_ROUNDS_ to avoid conflicting 
with the real FLT_ROUNDS (defined in <float.h>).

llvm-svn: 46587
 2008-01-31 00:41:03 +00:00
Dan Gohman
4326d513ab Create a new class, MemOperand, for describing memory references 
in the backend. Introduce a new SDNode type, MemOperandSDNode, for
holding a MemOperand in the SelectionDAG IR, and add a MemOperand
list to MachineInstr, and code to manage them. Remove the offset
field from SrcValueSDNode; uses of SrcValueSDNode that were using
it are all all using MemOperandSDNode now.

Also, begin updating some getLoad and getStore calls to use the
PseudoSourceValue objects.

Most of this was written by Florian Brander, some
reorganization and updating to TOT by me.

llvm-svn: 46585
 2008-01-31 00:25:39 +00:00
Evan Cheng
918b9c9335 Even though InsertAtEndOfBasicBlock is an ugly hack it still deserves a proper name. Rename it to EmitInstrWithCustomInserter since it does not necessarily insert 
instruction at the end.

llvm-svn: 46562
 2008-01-30 18:18:23 +00:00
Dan Gohman
13d1327796 Factor the addressing mode and the load/store VT out of LoadSDNode 
and StoreSDNode into their common base class LSBaseSDNode. Member
functions getLoadedVT and getStoredVT are replaced with the common
getMemoryVT to simplify code that will handle both loads and stores.

llvm-svn: 46538
 2008-01-30 00:15:11 +00:00
Bill Wendling
7b83688c73 If there's no instructions being emitted on X86 for a function, emit a 
nop. Emit the nop directly for PPC.

llvm-svn: 46398
 2008-01-26 09:03:52 +00:00
Bill Wendling
1c92468074 If there are no machine instructions emitted for a function, then insert 
a "nop" instruction so that we don't have the function's label associated
with something that it's not supposed to be associated with.

llvm-svn: 46394
 2008-01-26 06:51:24 +00:00
Chris Lattner
00ead854ef JITEmitter.cpp was trying to sync the icache for function stubs, but 
was actually passing a completely incorrect size to sys_icache_invalidate.
Instead of having the JITEmitter do this (which doesn't have the correct 
size), just make the target sync its own stubs.

llvm-svn: 46354
 2008-01-25 16:41:09 +00:00
Duncan Sands
aff4eef6df The last pieces needed for loading arbitrary 
precision integers.  This won't actually work
(and most of the code is dead) unless the new
legalization machinery is turned on.  While
there, I rationalized the handling of i1, and
removed some bogus (and unused) sextload patterns.
For i1, this could result in microscopically
better code for some architectures (not X86).
It might also result in worse code if annotating
with AssertZExt nodes turns out to be more harmful
than helpful.

llvm-svn: 46280
 2008-01-23 20:39:46 +00:00
Dale Johannesen
a54401ee30 Honor explicit section information on Darwin. 
llvm-svn: 46267
 2008-01-23 00:58:14 +00:00
Dale Johannesen
7807e86260 Implement flt_rounds for PowerPC. 
llvm-svn: 46174
 2008-01-18 19:55:37 +00:00
Chris Lattner
b3be660985 get symbolic information for ppc ldbl nodes. 
llvm-svn: 46165
 2008-01-18 18:51:16 +00:00
Chris Lattner
febc7ea9bf Fix a latent bug exposed by my truncstore patch. We compiled stfiwx-2.ll to: 
_test:
	fctiwz f0, f1
	stfiwx f0, 0, r4
	blr 

instead of:

_test:
	fctiwz f0, f1
	stfd f0, -8(r1)
	nop
	nop
	lwz r2, -4(r1)
	stb r2, 0(r4)
	blr 

The former is not correct (stores 4 bytes, not 1).

llvm-svn: 46161
 2008-01-18 16:54:56 +00:00
Dale Johannesen
08c757e707 Revert the part of 45848 that treated weak globals 
as weak globals rather than commons.  While not wrong,
this change tickled a latent bug in Darwin's strip,
so revert it for now as a workaround.

llvm-svn: 46144
 2008-01-17 23:04:07 +00:00
Chris Lattner
41717f6989 This commit changes: 
1. Legalize now always promotes truncstore of i1 to i8. 
2. Remove patterns and gunk related to truncstore i1 from targets.
3. Rename the StoreXAction stuff to TruncStoreAction in TLI.
4. Make the TLI TruncStoreAction table a 2d table to handle from/to conversions.
5. Mark a wide variety of invalid truncstores as such in various targets, e.g.
   X86 currently doesn't support truncstore of any of its integer types.
6. Add legalize support for truncstores with invalid value input types.
7. Add a dag combine transform to turn store(truncate) into truncstore when
   safe.

The later allows us to compile CodeGen/X86/storetrunc-fp.ll to:

_foo:
	fldt	20(%esp)
	fldt	4(%esp)
	faddp	%st(1)
	movl	36(%esp), %eax
	fstps	(%eax)
	ret

instead of:

_foo:
	subl	$4, %esp
	fldt	24(%esp)
	fldt	8(%esp)
	faddp	%st(1)
	fstps	(%esp)
	movl	40(%esp), %eax
	movss	(%esp), %xmm0
	movss	%xmm0, (%eax)
	addl	$4, %esp
	ret

llvm-svn: 46140
 2008-01-17 19:59:44 +00:00
Chris Lattner
d033200a8f * Introduce a new SelectionDAG::getIntPtrConstant method 
and switch various codegen pieces and the X86 backend over
  to using it.

* Add some comments to SelectionDAGNodes.h

* Introduce a second argument to FP_ROUND, which indicates
  whether the FP_ROUND changes the value of its input. If
  not it is safe to xform things like fp_extend(fp_round(x)) -> x.

llvm-svn: 46125
 2008-01-17 07:00:52 +00:00
Dale Johannesen
319c7bb405 Fix and enable EH for x86-64 Darwin. Adds 
ShortenEHDataFor64Bits as a not-very-accurate
abstraction to cover all the changes in DwarfWriter.
Some cosmetic changes to Darwin assembly code for
gcc testsuite compatibility.

llvm-svn: 46029
 2008-01-15 23:24:56 +00:00
Chris Lattner
dac9c1bcfe If someone wants to implement ppc TRAP, they can go for it :) 
llvm-svn: 46019
 2008-01-15 22:15:02 +00:00
Chris Lattner
6846e346a8 rename SDTRet -> SDTNone. 
Move definition of 'trap' sdnode up from x86 instrinfo to targetselectiondag.td.

llvm-svn: 46017
 2008-01-15 22:02:54 +00:00
Chris Lattner
0293fca6d8 rename MachineInstr::setInstrDescriptor -> setDesc 
llvm-svn: 45871
 2008-01-11 18:10:50 +00:00
Dale Johannesen
31afe330e4 Weak things initialized to 0 don't go in bss on Darwin. 
Cosmetic changes to spacing to match gcc (some dejagnu
tests actually care).

llvm-svn: 45848
 2008-01-11 00:54:37 +00:00
Duncan Sands
2c89976416 Output sinl for a long double FSIN node, not sin. 
Likewise fix up a bunch of other libcalls.  While
there I remove NEG_F32 and NEG_F64 since they are
not used anywhere.  This fixes 9 Ada ACATS failures.

llvm-svn: 45833
 2008-01-10 10:28:30 +00:00
Chris Lattner
6ad01a9965 remove explicit sets of 'neverHasSideEffects' that can now be 
inferred from the instr patterns.

llvm-svn: 45824
 2008-01-10 05:45:39 +00:00
Chris Lattner
9b4f2b2316 get def use info more correct. 
llvm-svn: 45821
 2008-01-10 05:12:37 +00:00
Dale Johannesen
fdd4b3846f Emit unused EH frames for weak definitions on Darwin, 
because assembler/linker can't cope with weak absolutes.
PR 1880.

llvm-svn: 45811
 2008-01-10 02:03:30 +00:00
Duncan Sands
6f28b87039 Use size_t to store Pos, avoid truncating value 
on 64-bit builds.  Analysis and original patch
by Török Edwin.  Code audit found another place
with the same problem, also fixed here.

llvm-svn: 45746
 2008-01-08 10:06:15 +00:00
Chris Lattner
cafc567fb7 Finally implement correct ordered comparisons for PPC, even though 
the code generated is not wonderful.  This turns a miscompilation into
a code quality bug (noted in the ppc readme).  This fixes PR642, which
is over 2 years old (!).  Nate, please review this.

llvm-svn: 45742
 2008-01-08 06:46:30 +00:00
Chris Lattner
f83aae613c rename TargetInstrDescriptor -> TargetInstrDesc. 
Make MachineInstr::getDesc return a reference instead
of a pointer, since it can never be null.

llvm-svn: 45695
 2008-01-07 07:27:27 +00:00
Chris Lattner
e83299018e use predicate. 
llvm-svn: 45691
 2008-01-07 06:37:29 +00:00
Chris Lattner
4421b821f5 no need to explicitly clear these fields. 
llvm-svn: 45683
 2008-01-07 04:55:09 +00:00
Chris Lattner
9d38dfa4a5 Move a bunch more accessors from TargetInstrInfo to TargetInstrDescriptor 
llvm-svn: 45680
 2008-01-07 03:13:06 +00:00
Chris Lattner
55343065e3 remove MachineOpCode typedef. 
llvm-svn: 45679
 2008-01-07 02:48:55 +00:00
Chris Lattner
f7f96d818f Rename MachineInstr::getInstrDescriptor -> getDesc(), which reflects 
that it is cheap and efficient to get.

Move a variety of predicates from TargetInstrInfo into 
TargetInstrDescriptor, which makes it much easier to query a predicate
when you don't have TII around.  Now you can use MI->getDesc()->isBranch()
instead of going through TII, and this is much more efficient anyway. Not
all of the predicates have been moved over yet.

Update old code that used MI->getInstrDescriptor()->Flags to use the
new predicates in many places.

llvm-svn: 45674
 2008-01-07 01:56:04 +00:00
Owen Anderson
f19692b2f6 Move even more functionality from MRegisterInfo into TargetInstrInfo. 
Some day I'll get it all moved over...

llvm-svn: 45672
 2008-01-07 01:35:02 +00:00
Chris Lattner
14310afe42 rename isLoad -> isSimpleLoad due to evan's desire to have such a predicate. 
llvm-svn: 45667
 2008-01-06 23:38:27 +00:00
Chris Lattner
5489888580 rename isStore -> mayStore to more accurately reflect what it captures. 
llvm-svn: 45656
 2008-01-06 08:36:04 +00:00
Chris Lattner
8b4b75c771 Change the 'isStore' inferrer to look for 'SDNPMayStore' 
instead of "ISD::STORE".  This allows us to mark target-specific dag
nodes as storing (such as ppc byteswap stores).  This allows us to remove
more explicit isStore flags from the .td files.

Finally, add a warning for when a .td file contains an explicit 
isStore and tblgen is able to infer it.

llvm-svn: 45654
 2008-01-06 06:44:58 +00:00
Chris Lattner
9f8735181f remove some isStore flags that are now inferred automatically. 
llvm-svn: 45652
 2008-01-06 05:53:26 +00:00
Evan Cheng
627a9455a6 Correct order of parameters. 
llvm-svn: 45562
 2008-01-04 02:22:21 +00:00
Evan Cheng
fb2bc4fc95 Change MachineRelocation::DoesntNeedFnStub to NeedStub. This fields will be used 
for non-function GV relocations that require function address stubs (e.g. Mac OS X in non-static mode).

llvm-svn: 45527
 2008-01-03 02:56:28 +00:00
Chris Lattner
abd12447f8 leopard and above support alignment for common symbols. 
llvm-svn: 45493
 2008-01-02 19:35:16 +00:00
Owen Anderson
e6856128ab Move some more instruction creation methods from RegisterInfo into InstrInfo. 
llvm-svn: 45484
 2008-01-01 21:11:32 +00:00
Chris Lattner
04a35e9a8c Fix a bug in my previous patch: refer to the impl not the pure virtual version. It's unclear why gcc would ever compile this... 
llvm-svn: 45476
 2008-01-01 01:05:34 +00:00
Chris Lattner
1285ec2ae7 Fix a problem where lib/Target/TargetInstrInfo.h would include and use 
a header file from libcodegen.  This violates a layering order: codegen
depends on target, not the other way around.  The fix to this is to 
split TII into two classes, TII and TargetInstrInfoImpl, which defines
stuff that depends on libcodegen.  It is defined in libcodegen, where 
the base is not.

llvm-svn: 45475
 2008-01-01 01:03:04 +00:00
Owen Anderson
ae7e2c1e03 Move copyRegToReg from MRegisterInfo to TargetInstrInfo. This is part of the 
Machine-level API cleanup instigated by Chris.

llvm-svn: 45470
 2007-12-31 06:32:00 +00:00
Chris Lattner
96167aa93c Rename SSARegMap -> MachineRegisterInfo in keeping with the idea 
that "machine" classes are used to represent the current state of
the code being compiled.  Given this expanded name, we can start 
moving other stuff into it.  For now, move the UsedPhysRegs and
LiveIn/LoveOuts vectors from MachineFunction into it.

Update all the clients to match.

This also reduces some needless #includes, such as MachineModuleInfo
from MachineFunction.

llvm-svn: 45467
 2007-12-31 04:13:23 +00:00
Chris Lattner
9e5cc35593 Add new shorter predicates for testing machine operands for various types: 
e.g. MO.isMBB() instead of MO.isMachineBasicBlock().  I don't plan on 
switching everything over, so new clients should just start using the 
shorter names.

Remove old long accessors, switching everything over to use the short
accessor: getMachineBasicBlock() -> getMBB(), 
getConstantPoolIndex() -> getIndex(), setMachineBasicBlock -> setMBB(), etc.

llvm-svn: 45464
 2007-12-30 23:10:15 +00:00
Chris Lattner
7504adbd72 More cleanups for MachineOperand: 
- Eliminate the static "print" method for operands, moving it
    into MachineOperand::print.
  - Change various set* methods for register flags to take a bool
    for the value to set it to.  Remove unset* methods.
  - Group methods more logically by operand flavor in MachineOperand.h

llvm-svn: 45461
 2007-12-30 21:56:09 +00:00
Chris Lattner
12477d46b4 Use MachineOperand::getImm instead of MachineOperand::getImmedValue. Likewise setImmedValue -> setImm 
llvm-svn: 45453
 2007-12-30 20:49:49 +00:00
Chris Lattner
ad9a6ccb83 Remove attribution from file headers, per discussion on llvmdev. 
llvm-svn: 45418
 2007-12-29 20:36:04 +00:00
Chris Lattner
8193d4af33 remove attribution from lib Makefiles. 
llvm-svn: 45415
 2007-12-29 20:09:26 +00:00
Nicolas Geoffray
1996d8b1f4 Fix unintented change from last commit 
llvm-svn: 45282
 2007-12-21 12:22:29 +00:00
Nicolas Geoffray
18ab237446 Enable EH for linux/ppc32 targets 
llvm-svn: 45281
 2007-12-21 12:19:44 +00:00
Dale Johannesen
f93ea63eaa Enable EH on PPC Darwin. This basically works; there 
are a couple of issues that show up with the optimizer,
but I don't think they're really EH problems.
(llvm-gcc testsuite users note:  By default the testsuite
uses the unwinding code that's built as part of your local
llvm-gcc, which does not work.  You need to trick it into
using the installed system unwinding code to get useful
results.)

llvm-svn: 45221
 2007-12-19 21:54:36 +00:00
Bill Wendling
ce9eae6687 Mark the "isRemat" instruction as never having side effects. 
llvm-svn: 45190
 2007-12-19 06:07:48 +00:00
Evan Cheng
64a1febf9a Implicit def instructions, e.g. X86::IMPLICIT_DEF_GR32, are always re-materializable and they should not be spilled. 
llvm-svn: 44960
 2007-12-12 23:12:09 +00:00
Chris Lattner
e93a775a4d Fix a significant code quality regression I introduced on PPC64 quite 
a while ago.  We now produce:

_foo:
	mflr r0
	std r0, 16(r1)
	ld r2, 16(r1)
	std r2, 0(r3)
	ld r0, 16(r1)
	mtlr r0
	blr 

instead of:

_foo:
	mflr r0
	std r0, 16(r1)
	lis r0, 0
	ori r0, r0, 16
	ldx r2, r1, r0
	std r2, 0(r3)
	ld r0, 16(r1)
	mtlr r0
	blr 

for:

void foo(void **X) {
  *X = __builtin_return_address(0);
}

on ppc64.

llvm-svn: 44701
 2007-12-08 07:04:58 +00:00
Chris Lattner
e16166b78d implement __builtin_return_addr(0) on ppc. 
llvm-svn: 44700
 2007-12-08 06:59:59 +00:00
Chris Lattner
1024cda0bd refactor some code to avoid overloading the name 'usesLR' in 
different places to mean different things.  Document what the
one in PPCFunctionInfo means and when it is valid.

llvm-svn: 44699
 2007-12-08 06:39:11 +00:00
Evan Cheng
6bfc0cadf3 Fix a compilation warning. 
llvm-svn: 44691
 2007-12-08 01:00:21 +00:00
Bill Wendling
c08dedb060 Initial commit of the machine code LICM pass. It successfully hoists this: 
_foo:
        li r2, 0
LBB1_1: ; bb
        li r5, 0
        stw r5, 0(r3)
        addi r2, r2, 1
        addi r3, r3, 4
        cmplw cr0, r2, r4
        bne cr0, LBB1_1 ; bb
LBB1_2: ; return
        blr 

to:

_foo:
        li r2, 0
        li r5, 0
LBB1_1: ; bb
        stw r5, 0(r3)
        addi r2, r2, 1
        addi r3, r3, 4
        cmplw cr0, r2, r4
        bne cr0, LBB1_1 ; bb
LBB1_2: ; return
        blr

ZOMG!! :-)

Moar to come...

llvm-svn: 44687
 2007-12-07 21:42:31 +00:00
Evan Cheng
27986f1ac7 Added canFoldMemoryOperand for PPC. 
llvm-svn: 44623
 2007-12-05 18:41:29 +00:00
Evan Cheng
8464a0bf00 Add a argument to storeRegToStackSlot and storeRegToAddr to specify whether 
the stored register is killed.

llvm-svn: 44600
 2007-12-05 03:14:33 +00:00
Evan Cheng
58b387dfb0 Remove redundant foldMemoryOperand variants and other code clean up. 
llvm-svn: 44517
 2007-12-02 08:30:39 +00:00
Evan Cheng
79e8b92dc3 Allow some reloads to be folded in multi-use cases. Specifically testl r, r -> cmpl [mem], 0. 
llvm-svn: 44479
 2007-12-01 02:07:52 +00:00
Chris Lattner
e59a7ee26a Implement ExpandOperationResult for ppc i64 fp->int, which fixes 
CodeGen/Generic/fp_to_int.ll among others.  Its unclear why this 
just started failing...

llvm-svn: 44407
 2007-11-28 18:44:47 +00:00
Chris Lattner
5e0cabc90e Fix a crash on invalid code due to memcpy lowering. 
llvm-svn: 44378
 2007-11-27 22:14:42 +00:00
Dale Johannesen
8c3541787f Fix .eh table linkage issues on Darwin. Some EH support 
for Darwin PPC, but it's not fully working yet.

llvm-svn: 44258
 2007-11-20 23:24:42 +00:00
Dan Gohman
27ac53cc23 Remove meaningless qualifiers from return types, avoiding compiler warnings. 
llvm-svn: 44240
 2007-11-19 20:46:23 +00:00
Dale Johannesen
70ca3c1f03 Revert previous; these files aren't ready to go in yet. 
llvm-svn: 44057
 2007-11-13 19:16:02 +00:00
Dale Johannesen
5fd9e7a615 Add parameter to getDwarfRegNum to permit targets 
to use different mappings for EH and debug info;
no functional change yet.
Fix warning in X86CodeEmitter.

llvm-svn: 44056
 2007-11-13 19:13:01 +00:00
Bill Wendling
934fcd87e7 Unifacalize the CALLSEQ{START,END} stuff. 
llvm-svn: 44045
 2007-11-13 09:19:02 +00:00
Bill Wendling
cc75435ebf Unify CALLSEQ_{START,END}. They take 4 parameters: the chain, two stack 
adjustment fields, and an optional flag. If there is a "dynamic_stackalloc" in
the code, make sure that it's bracketed by CALLSEQ_START and CALLSEQ_END. If
not, then there is the potential for the stack to be changed while the stack's
being used by another instruction (like a call).

This can only result in tears...

llvm-svn: 44037
 2007-11-13 00:44:25 +00:00
Anton Korobeynikov
c58fa8584b Completely forgot, that we have some debug information emission on PPC. This should fix 
some regressions on ppc nightly tests.

llvm-svn: 44029
 2007-11-12 23:36:13 +00:00
Owen Anderson
aba398a5ce Add a flag for indirect branch instructions. 
Target maintainers: please check that the instructions for your target are correctly marked.

llvm-svn: 44012
 2007-11-12 07:39:39 +00:00
Anton Korobeynikov
8e8473c783 Use TableGen to emit information for dwarf register numbers. 
This makes DwarfRegNum to accept list of numbers instead.
Added three different "flavours", but only slightly tested on x86-32/linux.
Please check another subtargets if possible,

llvm-svn: 43997
 2007-11-11 19:50:10 +00:00
Duncan Sands
d1bdbd010b Eliminate the remaining uses of getTypeSize. This 
should only effect x86 when using long double.  Now
12/16 bytes are output for long double globals (the
exact amount depends on the alignment).  This brings
globals in line with the rest of LLVM: the space
reserved for an object is now always the ABI size.
One tricky point is that only 10 bytes should be
output for long double if it is a field in a packed
struct, which is the reason for the additional
argument to EmitGlobalConstant.

llvm-svn: 43688
 2007-11-05 00:04:43 +00:00
Nick Lewycky
36047b0b5b Fix crash before main on ppc/linux with static constructors. PR1771 
llvm-svn: 43676
 2007-11-04 17:32:10 +00:00
Dale Johannesen
94241a8d3a Disable a couple more things for ppcf128. 
llvm-svn: 43267
 2007-10-23 23:20:14 +00:00
Evan Cheng
0590c75f18 Temporary solution: added a different set of BCTRL_Macho / BCTRL_ELF with right callee-saved defs set for ppc64. 
llvm-svn: 43248
 2007-10-23 06:42:42 +00:00
Evan Cheng
85eb733eff Use ptr type in the immediate field of a BxA instruction so we don't end up selecting 32-bit call instruction for ppc64. 
llvm-svn: 43228
 2007-10-22 19:46:19 +00:00
Chris Lattner
4354f2db6a comment fixes 
llvm-svn: 43168
 2007-10-19 04:08:28 +00:00
Dale Johannesen
b23b0bfa8f More ppcf128 issues (maybe the last)? 
llvm-svn: 43160
 2007-10-19 00:59:18 +00:00
Evan Cheng
0449186690 - Added getOpcodeAfterMemoryUnfold(). It doesn't unfold an instruction, but only returns the opcode of the instruction post unfolding. 
- Fix some copy+paste bugs.

llvm-svn: 43153
 2007-10-18 22:40:57 +00:00
Evan Cheng
c852780685 Use SmallVectorImpl instead of SmallVector with hardcoded size in MRegister public interface. 
llvm-svn: 43150
 2007-10-18 21:29:24 +00:00
Chris Lattner
45d9c7aa07 Fix a bug handling frame references in ppc inline asm when the frame offset 
doesn't fit into 16 bits.

llvm-svn: 43032
 2007-10-16 18:00:18 +00:00
Chris Lattner
c641c8c6ec Change LowerFP_TO_SINT to create the specific code it needs instead of 
unconditionally creating an i64 bitcast.  With the future legalizer
design, operation legalization can't introduce new nodes with illegal
types.

This fixes the rest of olden on ppc32.

llvm-svn: 43005
 2007-10-15 20:14:52 +00:00
Evan Cheng
33df6a6bed Revert 42908 for now. 
llvm-svn: 42960
 2007-10-14 05:57:21 +00:00
Dale Johannesen
6c89945eb8 Fix type mismatch error in PPC Altivec (only causes 
a problem when asserts are on).  From vecLib.

llvm-svn: 42959
 2007-10-14 01:58:32 +00:00
Dan Gohman
a75e4a62e6 Change the names used for internal labels to use the current 
function symbol name instead of a codegen-assigned function
number.

Thanks Evan! :-)

llvm-svn: 42908
 2007-10-12 14:53:36 +00:00
Dan Gohman
171fb68ae0 Mark vector pow, ctpop, cttz, and ctlz as Expand on PowerPC. 
llvm-svn: 42904
 2007-10-12 14:08:57 +00:00
Dan Gohman
edc841fb53 Set ISD::FPOW to Expand. 
llvm-svn: 42881
 2007-10-11 23:21:31 +00:00
Dale Johannesen
76458ddf1e Next PPC long double bits: ppcf128->i32 conversion. 
Surprisingly complicated.
Adds getTargetNode for 2 outputs, no inputs (missing).

llvm-svn: 42822
 2007-10-10 01:01:31 +00:00
Dan Gohman
ae3b47b06f When we start enabling SMUL_LOHI/UMUL_LOHI or SDIVREM/UDIVREM in 
target-indepenent lowering, don't use them on PowerPC.

llvm-svn: 42755
 2007-10-08 17:28:24 +00:00
Dale Johannesen
9b7ac95116 Next powerpc long double bits. Comparisons work, 
although not well, and shortening FP converts.

llvm-svn: 42672
 2007-10-06 01:24:11 +00:00
Dale Johannesen
c7b51b678d First round of ppc long double. call/return and 
basic arithmetic works.
Rename RTLIB long double functions to distinguish
different flavors of long double; the lib functions
have different names, alas.

llvm-svn: 42644
 2007-10-05 20:04:43 +00:00
Evan Cheng
f536e2f41e - Added a few target hooks to generate load / store instructions from / to any 
address (not just from / to frameindexes).
- Added target hooks to unfold load / store instructions / SDNodes into separate
load, data processing, store instructions / SDNodes.

llvm-svn: 42621
 2007-10-05 01:32:41 +00:00
Dan Gohman
30ba45b569 Use empty() member functions when that's what's being tested for instead 
of comparing begin() and end().

llvm-svn: 42585
 2007-10-03 19:26:29 +00:00
Dan Gohman
50747737a5 TargetAsmInfo::getAddressSize() was incorrect for x86-64 and 64-bit targets 
other than PPC64. Instead of fixing it, just remove it and fix all the
places that use it to use TargetData::getPointerSize() instead, as there
aren't very many. Most of the references were in DwarfWriter.cpp.

llvm-svn: 42419
 2007-09-27 23:12:31 +00:00
Evan Cheng
5f9e291240 Allow copyRegToReg to emit cross register classes copies. 
Tested with "make check"!

llvm-svn: 42346
 2007-09-26 06:25:56 +00:00
Dan Gohman
99e8e1ff08 More explicit keywords. 
llvm-svn: 42316
 2007-09-25 20:27:06 +00:00
Evan Cheng
d675ed5400 Honor user-defined section specification of a global, ignores whether its initializer is null. 
llvm-svn: 42182
 2007-09-21 00:41:19 +00:00
Devang Patel
a6a6e699a1 Do not override user specified section. 
llvm-svn: 42179
 2007-09-20 23:07:37 +00:00
Dan Gohman
fb60c0dfed Remove isReg, isImm, and isMBB, and change all their users to use 
isRegister, isImmediate, and isMachineBasicBlock, which are equivalent,
and more popular.

llvm-svn: 41958
 2007-09-14 20:33:02 +00:00
Evan Cheng
3aafca793b Fix comments. 
llvm-svn: 41947
 2007-09-14 01:57:02 +00:00
Bill Wendling
89ced2f9b1 Enable indirect encoding for the personality function 
llvm-svn: 41873
 2007-09-11 23:55:40 +00:00
Evan Cheng
b43255bc68 Remove (somewhat confusing) Imp<> helper, use let Defs = [], Uses = [] instead. 
llvm-svn: 41863
 2007-09-11 19:55:27 +00:00
Duncan Sands
c358890f73 Fold the adjust_trampoline intrinsic into 
init_trampoline.  There is now only one
trampoline intrinsic.

llvm-svn: 41841
 2007-09-11 14:10:23 +00:00
Chris Lattner
d4602cc0e7 Add some notes about better flag handling. 
llvm-svn: 41808
 2007-09-10 21:43:18 +00:00
Bill Wendling
04a6163921 Add missing index versions of instructions to the map. 
llvm-svn: 41776
 2007-09-07 22:01:02 +00:00
Owen Anderson
4b71e55287 Add lengthof and endof templates that hide a lot of sizeof computations. 
Patch by Sterling Stein!

llvm-svn: 41758
 2007-09-07 04:06:50 +00:00
Bill Wendling
46d5fb4e5d LVXL and STVXL are also a load and store resp. 
llvm-svn: 41733
 2007-09-05 23:47:12 +00:00
Bill Wendling
13549db795 Add the 64-bit versions of the DS* Altivec instructions. 
llvm-svn: 41717
 2007-09-05 04:05:20 +00:00
Evan Cheng
02c6081f2d Fix for PR1613: added 64-bit rotate left PPC instructions and patterns. 
llvm-svn: 41711
 2007-09-04 20:20:29 +00:00
Dale Johannesen
81d6ecb886 Enhance APFloat to retain bits of NaNs (fixes oggenc). 
Use APFloat interfaces for more references, mostly
of ConstantFPSDNode.

llvm-svn: 41632
 2007-08-31 04:03:46 +00:00
Evan Cheng
58ea935f6f Add a variant of foldMemoryOperand to fold any load / store, not just load / store from / to stack slots. 
llvm-svn: 41597
 2007-08-30 05:52:20 +00:00
Bill Wendling
c65cf7849d Use i64 on a PPC64 machine 
llvm-svn: 41590
 2007-08-30 00:59:19 +00:00
Chris Lattner
1e089aac3a rename isOperandValidForConstraint to LowerAsmOperandForConstraint, 
changing the interface to allow for future changes.

llvm-svn: 41384
 2007-08-25 00:47:38 +00:00
Chris Lattner
d361c3e1ce Disable EH generation until PPC works 100%. 
llvm-svn: 41360
 2007-08-24 16:00:15 +00:00
Chris Lattner
0c048bb115 new example 
llvm-svn: 41318
 2007-08-23 15:16:03 +00:00
Dale Johannesen
6c8f73eac6 Fix arguments for some Altivec instructions. From SWB. 
llvm-svn: 40957
 2007-08-09 00:49:19 +00:00
Dale Johannesen
0ea7df37c4 Fix spelling of mtvscr and mfvscr. 
llvm-svn: 40908
 2007-08-07 23:08:00 +00:00
Dale Johannesen
4b91728849 long double patch 2 of N. Handle it in TargetData. 
(I've tried to get the info right for all targets,
but I'm not expert on all of them - check yours.)

llvm-svn: 40792
 2007-08-03 20:20:50 +00:00
Dan Gohman
352de5aeb9 More explicit keywords. 
llvm-svn: 40757
 2007-08-02 21:21:54 +00:00
Evan Cheng
b050c17b31 Some out operands were incorrectly specified as input operands. 
llvm-svn: 40697
 2007-08-01 23:07:38 +00:00
Evan Cheng
ff50061170 Vector fneg must be expanded into fsub -0.0, X. 
llvm-svn: 40586
 2007-07-30 07:51:22 +00:00
Duncan Sands
e8bb2c6d32 Support for trampolines, except for X86 codegen which is 
still under discussion.

llvm-svn: 40549
 2007-07-27 12:58:54 +00:00
Dan Gohman
0fc4e0cf47 Don't ignore the return value of AsmPrinter::doInitialization and 
AsmPrinter::doFinalization.

llvm-svn: 40487
 2007-07-25 19:33:14 +00:00
Nick Lewycky
608fe6cf68 Fix debug info and globals filled with zeros. 
llvm-svn: 40483
 2007-07-25 03:48:45 +00:00
Evan Cheng
53cb03b583 No more noResults. 
llvm-svn: 40132
 2007-07-21 00:34:19 +00:00
Evan Cheng
cdb4e7949f Added -print-emitted-asm to print out JIT generated asm to cerr. 
llvm-svn: 40123
 2007-07-20 21:56:13 +00:00
Evan Cheng
f8d66a1eec Oops. These stores actually produce results. 
llvm-svn: 40074
 2007-07-20 00:20:46 +00:00
Evan Cheng
8312ed6f77 Change instruction description to split OperandList into OutOperandList and 
InOperandList. This gives one piece of important information: # of results
produced by an instruction.
An example of the change:
def ADD32rr  : I<0x01, MRMDestReg, (ops GR32:$dst, GR32:$src1, GR32:$src2),
                 "add{l} {$src2, $dst|$dst, $src2}",
                 [(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;
=>
def ADD32rr  : I<0x01, MRMDestReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2),
                 "add{l} {$src2, $dst|$dst, $src2}",
                 [(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;

llvm-svn: 40033
 2007-07-19 01:14:50 +00:00
Anton Korobeynikov
5635277c36 Long live the exception handling! 
This patch fills the last necessary bits to enable exceptions
handling in LLVM. Currently only on x86-32/linux.

In fact, this patch adds necessary intrinsics (and their lowering) which
represent really weird target-specific gcc builtins used inside unwinder.

After corresponding llvm-gcc patch will land (easy) exceptions should be
more or less workable. However, exceptions handling support should not be 
thought as 'finished': I expect many small and not so small glitches
everywhere.

llvm-svn: 39855
 2007-07-14 14:06:15 +00:00
Dale Johannesen
469ed8e17e Skeleton of post-RA scheduler; doesn't do anything yet. 
Change name of -sched option and DEBUG_TYPE to
pre-RA-sched; adjust testcases.

llvm-svn: 39816
 2007-07-13 17:13:54 +00:00
Lauro Ramos Venancio
18fc770fd0 Assert when TLS is not implemented. 
llvm-svn: 39737
 2007-07-11 17:19:51 +00:00
Dan Gohman
81cfdc2f19 Change getCopyToParts and getCopyFromParts to always use target-endian 
register ordering, for both physical and virtual registers. Update the PPC
target lowering for calls to expect registers for the call result to
already be in target order.

llvm-svn: 38471
 2007-07-09 20:59:04 +00:00
Chris Lattner
4810c53b05 The various "getModuleMatchQuality" implementations should return 
zero if they see a target triple they don't understand.

llvm-svn: 38463
 2007-07-09 17:25:29 +00:00
Evan Cheng
3b1b3eba6a Do away with ImmutablePredicateOperand. 
llvm-svn: 37961
 2007-07-06 23:22:46 +00:00
Gabor Greif
5f705671e4 Here is the bulk of the sanitizing. 
Almost all occurrences of "bytecode" in the sources have been eliminated.

llvm-svn: 37913
 2007-07-05 17:07:56 +00:00
Evan Cheng
9b7432c311 PPC conditional branch predicate does not change after isel. 
llvm-svn: 37893
 2007-07-05 07:09:50 +00:00
John Criswell
57e5ed4b5a Convert .cvsignore files 
llvm-svn: 37801
 2007-06-29 16:35:07 +00:00
Evan Cheng
13b846b1ad Prevent PPC::BCC first operand, the PRED number, from being isel'd into a LI instruction. 
llvm-svn: 37790
 2007-06-29 01:25:06 +00:00
Dan Gohman
a62327ea40 Move ComputeMaskedBits, MaskedValueIsZero, and ComputeNumSignBits from 
TargetLowering to SelectionDAG so that they have more convenient
access to the current DAG, in preparation for the ValueType routines
being changed from standalone functions to members of SelectionDAG for
the pre-legalize vector type changes.

llvm-svn: 37704
 2007-06-22 14:59:07 +00:00
Chris Lattner
81e8a18e7c describe an argument, hide it. 
llvm-svn: 37650
 2007-06-19 05:46:06 +00:00
Chris Lattner
e13fac05d7 If a function is vararg, never pass inreg arguments in registers. Thanks to 
Anton for half of this patch.

llvm-svn: 37641
 2007-06-19 00:13:10 +00:00
Dan Gohman
2fd7d26df8 Rename MVT::getVectorBaseType to MVT::getVectorElementType. 
llvm-svn: 37579
 2007-06-14 22:58:02 +00:00
Dale Johannesen
7e3253f115 Handle blocks with 2 unconditional branches in AnalyzeBranch. 
llvm-svn: 37571
 2007-06-13 17:59:52 +00:00
Evan Cheng
1a6c0341fd Add a utility routine to check for unpredicated terminator instruction. 
llvm-svn: 37528
 2007-06-08 21:59:56 +00:00
Nicolas Geoffray
fff14eecb5 Implementation of compilation callback in PPC ELF32 
llvm-svn: 37340
 2007-05-29 16:33:18 +00:00
Dale Johannesen
738f94210c name change requested by review of previous patch 
llvm-svn: 37289
 2007-05-22 18:31:04 +00:00
Dale Johannesen
fe0fe14411 Make tail merging the default, except on powerPC. There was no prior art 
for a target-dependent default with a command-line override; this way
should be generally usable.

llvm-svn: 37285
 2007-05-22 17:14:46 +00:00
Evan Cheng
3f386274c0 BlockHasNoFallThrough() now returns true if block ends with a return instruction. 
llvm-svn: 37266
 2007-05-21 18:44:17 +00:00
Dan Gohman
875f6bde73 Apply this patch: 
http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20070514/049845.html

llvm-svn: 37240
 2007-05-18 23:21:46 +00:00
Evan Cheng
234aab208a RemoveBranch() and InsertBranch() now returns number of instructions deleted / inserted. 
llvm-svn: 37192
 2007-05-18 00:05:48 +00:00
Chris Lattner
a18b7d76b3 add support for 128-bit add/sub on ppc64 
llvm-svn: 37158
 2007-05-17 06:52:46 +00:00
Chris Lattner
4861b958f1 fix some subtle inline asm selection issues 
llvm-svn: 37067
 2007-05-15 01:31:05 +00:00
Evan Cheng
4dd52e052f PredicateOperand can be used as a normal operand for isel. 
llvm-svn: 36947
 2007-05-08 21:06:08 +00:00
Evan Cheng
6a0b99b9f8 R0 is a sub-register of X0, etc. 
llvm-svn: 36939
 2007-05-08 17:03:51 +00:00
Chris Lattner
e980180c9d revert accidental commit 
llvm-svn: 36668
 2007-05-03 16:40:25 +00:00
Chris Lattner
4dd59a2bfb add support for printing offset of global 
llvm-svn: 36667
 2007-05-03 16:39:48 +00:00
Devang Patel
cd45427a87 Drop 'const' 
llvm-svn: 36662
 2007-05-03 01:11:54 +00:00
Devang Patel
8ee9065162 Use 'static const char' instead of 'static const int'. 
Due to darwin gcc bug, one version of darwin linker coalesces
static const int, which defauts PassID based pass identification.

llvm-svn: 36652
 2007-05-02 21:39:20 +00:00
Devang Patel
38a66bc82e Do not use typeinfo to identify pass in pass manager. 
llvm-svn: 36632
 2007-05-01 21:15:47 +00:00
Evan Cheng
e47ec4d104 eliminateFrameIndex() change. 
llvm-svn: 36626
 2007-05-01 09:13:03 +00:00
Nate Begeman
767ee95d29 llvm bug #1350, parts 1, 2, and 3. 
llvm-svn: 36618
 2007-05-01 05:57:02 +00:00
Evan Cheng
7f44e880dc Match MachineFunction::UsedPhysRegs changes. 
llvm-svn: 36452
 2007-04-25 22:13:27 +00:00
Evan Cheng
de9468373e Relex assertions to account for additional implicit def / use operands. 
llvm-svn: 36430
 2007-04-25 07:12:14 +00:00
Chris Lattner
583fd8343e Fix PR1351 and CodeGen/PowerPC/2007-04-24-InlineAsm-I-Modifier.ll 
llvm-svn: 36410
 2007-04-24 22:51:03 +00:00
Chris Lattner
b4ef9c8be3 Fix a bug in PPCTargetLowering::isLegalAddressingMode, scales other than 0/1/2 
are always unsupported.

llvm-svn: 35835
 2007-04-09 22:10:05 +00:00
Reid Spencer
a72beea861 Squelch a warning about mismatch between sign of constant and sign of return 
type.

llvm-svn: 35674
 2007-04-04 22:07:24 +00:00
Nicolas Geoffray
681a87d9e8 Starting implementation of the ELF32 ABI specification of varargs handling. 
LowerVASTART emits the right code if the subtarget is ELF32, the other intrinsics
(VAARG, VACOPY and VAEND) are not yet implemented.

llvm-svn: 35625
 2007-04-03 13:59:52 +00:00
Nicolas Geoffray
5897c064a6 The PPC64 ELF ABI is "intended to use the same structure layout and calling convention rules 
as the 64-bit PowerOpen ABI" (Reference http://www.linux-foundation.org/spec/ELF/ppc64/).
Change all ELF tests to ELF32.

llvm-svn: 35624
 2007-04-03 12:35:28 +00:00
Nicolas Geoffray
45c3620d12 Addition to the previous commit for getCalleeSavedRegClasses: 
"The ELF ABI specifies F1-F8 registers as argument registers for double, not
F1-F10. This affects only ELF, not MachO."

llvm-svn: 35623
 2007-04-03 10:57:49 +00:00
Nicolas Geoffray
b7c0895529 The ELF ABI specifies F1-F8 registers as argument registers for double, not 
F1-F10. This affects only ELF, not MachO.

llvm-svn: 35622
 2007-04-03 10:27:07 +00:00
Chris Lattner
dbce9ef4b8 Fix a bug which caused us to never be able to use signed comparisons for 
equality comparisons of a constant.  This allows us to codegen the 'sintzero'
loop in PR1288 as:

LBB1_1: ;cond_next
        li r4, 0
        addi r2, r2, 1
        stw r4, 0(r3)
        addi r3, r3, 4
        cmpwi cr0, r2, -1
        bne cr0, LBB1_1 ;cond_next

instead of:

LBB1_1: ;cond_next
        addi r2, r2, 1
        li r4, 0
        xoris r5, r2, 65535
        stw r4, 0(r3)
        addi r3, r3, 4
        cmplwi cr0, r5, 65535
        bne cr0, LBB1_1 ;cond_next

This implements CodeGen/PowerPC/compare-simm.ll, and also cuts 74
instructions out of kc++.

llvm-svn: 35590
 2007-04-02 05:59:42 +00:00
Chris Lattner
cea5e599ed add a note 
llvm-svn: 35530
 2007-03-31 07:06:25 +00:00
Chris Lattner
c0405a348d implement the new addressing mode description hook. 
llvm-svn: 35521
 2007-03-30 23:15:24 +00:00
Lauro Ramos Venancio
99fca527d3 "The C standards do say that "char" may either be a "signed char" or "unsigned 
char" and it is up to the compilers implementation or the platform which is
followed."
http://www.arm.linux.org.uk/docs/faqs/signedchar.php

llvm-svn: 35382
 2007-03-27 16:33:08 +00:00
Chris Lattner
ee90a087a6 add a note 
llvm-svn: 35334
 2007-03-25 05:10:46 +00:00
Chris Lattner
6d8bbccee0 add a note 
llvm-svn: 35330
 2007-03-25 04:46:28 +00:00
Chris Lattner
31c6763051 Fix CodeGen/PowerPC/2007-03-24-cntlzd.ll 
llvm-svn: 35329
 2007-03-25 04:44:03 +00:00
Chris Lattner
b19069959d switch TargetLowering::getConstraintType to take the entire constraint, 
not just the first letter.  No functionality change.

llvm-svn: 35322
 2007-03-25 02:14:49 +00:00
Nicolas Geoffray
205541ef78 Protect R31's frame offset from being used by callee-saved registers, when R31 
is the frame pointer.

llvm-svn: 35233
 2007-03-21 16:44:14 +00:00