Chris Lattner
4e0a78ea30
Add and 8/16-bit adds, add all integer subtracts, add saturating subtract
...
intrinsics.
llvm-svn: 27142
2006-03-26 02:39:02 +00:00
Chris Lattner
d8f528f04f
Split the PPC and X86 intrinsics out to their own files.
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llvm-svn: 27141
2006-03-26 02:37:19 +00:00
Chris Lattner
83cad7bff6
Add saturating subtracts, non-predicate compares, and some other random
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intrinsics.
llvm-svn: 27140
2006-03-26 02:34:07 +00:00
Chris Lattner
d33ef7a1bc
implement the vsldoi intrinsic.
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llvm-svn: 27139
2006-03-26 00:41:48 +00:00
Chris Lattner
9ecf506a2f
add int_ppc_altivec_vsldoi intrinsic
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llvm-svn: 27138
2006-03-26 00:25:43 +00:00
Chris Lattner
4eb9c18314
Correct the vandc testcase
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llvm-svn: 27137
2006-03-25 23:12:47 +00:00
Chris Lattner
7d557e00f3
fix the pattern for vandc, it's NOT vnand
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llvm-svn: 27136
2006-03-25 23:10:40 +00:00
Chris Lattner
88a0c65463
add patterns for VANDC/VNOR, implementing
...
CodeGen/PowerPC/eqv-andc-orc-nor.ll:VNOR/VANDC
llvm-svn: 27135
2006-03-25 23:05:29 +00:00
Chris Lattner
50e6d5cdae
new testcases
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llvm-svn: 27134
2006-03-25 23:04:34 +00:00
Chris Lattner
8b6f0daaae
Add some comments.
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llvm-svn: 27133
2006-03-25 23:00:56 +00:00
Chris Lattner
f83db1efe6
add a vnot helper node for matching 'not' on vectors
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llvm-svn: 27132
2006-03-25 23:00:08 +00:00
Chris Lattner
f9c8e9646d
Fix a bug in ISD::isBuildVectorAllOnesInteger that caused it to always return
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false
llvm-svn: 27131
2006-03-25 22:59:28 +00:00
Chris Lattner
d89668e503
Implement the ISD::isBuildVectorAllOnesInteger predicate
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llvm-svn: 27130
2006-03-25 22:57:01 +00:00
Chris Lattner
91fe1d4b55
Add a predicate
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llvm-svn: 27129
2006-03-25 22:56:35 +00:00
Chris Lattner
62185c0496
Don't call SimplifyDemandedBits on vectors
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llvm-svn: 27128
2006-03-25 22:19:00 +00:00
Chris Lattner
f80b39f9b1
Add some logical operations
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llvm-svn: 27127
2006-03-25 22:16:05 +00:00
Chris Lattner
ed2f2220da
Add a missing check which cause an invalid .td file to crash tblgen
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llvm-svn: 27126
2006-03-25 22:12:44 +00:00
Chris Lattner
bc48efc7fa
Don't crash on packed logical ops
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llvm-svn: 27125
2006-03-25 21:58:26 +00:00
Chris Lattner
a458878f87
Teach BinaryOperator::createNot to work with packed integer types
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llvm-svn: 27124
2006-03-25 21:54:21 +00:00
Jim Laskey
576323f04f
Unused function - easier to throw away than fix.
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llvm-svn: 27123
2006-03-25 18:42:45 +00:00
Jim Laskey
5a27f03274
Cast instruction not inserted into basic block.
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llvm-svn: 27122
2006-03-25 18:40:47 +00:00
Evan Cheng
842650daa7
Add a BUILD_VECTOR with unpack and interleave testcase.
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llvm-svn: 27121
2006-03-25 09:48:14 +00:00
Evan Cheng
875c895b0f
Added missing (any_extend (load ...)) patterns.
...
llvm-svn: 27120
2006-03-25 09:45:48 +00:00
Evan Cheng
e5807f6b47
Build arbitrary vector with more than 2 distinct scalar elements with a
...
series of unpack and interleave ops.
llvm-svn: 27119
2006-03-25 09:37:23 +00:00
Chris Lattner
d2823658b4
implement a bunch of intrinsics
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llvm-svn: 27118
2006-03-25 08:01:02 +00:00
Chris Lattner
cb5f9269a9
Move all Altivec stuff out into a new PPCInstrAltivec.td file.
...
Add a bunch of patterns for different datatypes, e.g. bit_convert, undef and
zero vector support.
llvm-svn: 27117
2006-03-25 07:51:43 +00:00
Chris Lattner
57064915a6
Add some basic patterns for other datatypes
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llvm-svn: 27116
2006-03-25 07:39:07 +00:00
Chris Lattner
7f5fba9c67
add all supported formats to the vector register file
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llvm-svn: 27115
2006-03-25 07:36:56 +00:00
Chris Lattner
06a3ec70c9
remove extraneous lets
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llvm-svn: 27114
2006-03-25 07:30:34 +00:00
Chris Lattner
e767292e67
Add a bunch of simple altivec intrinsics
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llvm-svn: 27113
2006-03-25 07:27:18 +00:00
Chris Lattner
2fa3a6c436
Add support for __builtin_altivec_vnmsubfp /vmaddfp
...
llvm-svn: 27112
2006-03-25 07:05:55 +00:00
Chris Lattner
33f07e82dc
Add support for __builtin_altivec_vnmsubfp
...
llvm-svn: 27111
2006-03-25 07:05:35 +00:00
Chris Lattner
e7a3b00d6a
When failing selection for an intrinsic, print this:
...
Cannot yet select: intrinsic %llvm.ppc.altivec.lvx
instead of this:
Cannot yet select: 0x9b047e0: v4i32,ch = INTRINSIC 0x9b04540:1, 0x9b04710, 0x9b04790, 0x9b04540
llvm-svn: 27110
2006-03-25 06:47:53 +00:00
Chris Lattner
e199d55073
#include Intrinsics.h into all dag isels
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llvm-svn: 27109
2006-03-25 06:47:10 +00:00
Chris Lattner
b014b3c7ab
Implement Intrinsic::getName
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llvm-svn: 27108
2006-03-25 06:32:47 +00:00
Chris Lattner
2ed67c5d0f
Add a programatic interface to intrinsic names.
...
llvm-svn: 27107
2006-03-25 06:32:07 +00:00
Chris Lattner
0899b16b2d
Codegen things like:
...
<int -1, int -1, int -1, int -1>
and
<int 65537, int 65537, int 65537, int 65537>
Using things like:
vspltisb v0, -1
and:
vspltish v0, 1
instead of using constant pool loads.
This implements CodeGen/PowerPC/vec_splat.ll:splat_imm_i{32|16}.
llvm-svn: 27106
2006-03-25 06:12:06 +00:00
Chris Lattner
3ce06174c5
New tests for vsplti*
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llvm-svn: 27105
2006-03-25 06:11:56 +00:00
Evan Cheng
ff65ba0857
X86 SSE1 cacheability support ops intrinsics
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llvm-svn: 27104
2006-03-25 06:05:45 +00:00
Evan Cheng
8601147e68
Added SSE cachebility ops
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llvm-svn: 27103
2006-03-25 06:03:26 +00:00
Evan Cheng
cad90504fe
Instruction encoding bug
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llvm-svn: 27102
2006-03-25 06:00:03 +00:00
Evan Cheng
892e20720f
Added a scalar to vector with zero extension testcase
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llvm-svn: 27101
2006-03-25 05:58:52 +00:00
Chris Lattner
b0e8c6dd7f
Add new intrinsic node definitions for tblgen use
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llvm-svn: 27100
2006-03-25 02:29:35 +00:00
Evan Cheng
ad4f96ae46
X86 SSE1 SIMD store intrinsics.
...
llvm-svn: 27099
2006-03-25 02:02:51 +00:00
Evan Cheng
35a181d293
X86 SSE1 SIMD load intrinsics (movhps, movlps, and movups).
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llvm-svn: 27098
2006-03-25 01:58:54 +00:00
Evan Cheng
b58801303a
X86 SSE1 conversion operations intrinsics.
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llvm-svn: 27097
2006-03-25 01:35:17 +00:00
Evan Cheng
234090b386
Added 128-bit packed integer subtraction.
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llvm-svn: 27096
2006-03-25 01:33:37 +00:00
Evan Cheng
b280b34497
Added CVTTPS2PI.
...
llvm-svn: 27095
2006-03-25 01:31:59 +00:00
Evan Cheng
041c9c534b
Added CVTSS2SI.
...
llvm-svn: 27094
2006-03-25 01:00:18 +00:00
Evan Cheng
35bbc93d35
X86 SSE1 comparison intrinsics.
...
llvm-svn: 27093
2006-03-25 00:32:32 +00:00