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Commit Graph

160157 Commits

Author SHA1 Message Date
Sanjay Patel
1f92362a35 [InstCombine] (bool X) * Y --> X ? Y : 0
This is both a functional improvement for vectors and an
efficiency improvement for scalars. The existing code below
the new folds does the same thing for scalars, but in an 
indirect and expensive way.

llvm-svn: 325048
2018-02-13 20:41:22 +00:00
Reid Kleckner
c5216dadb8 [LLD] Implement /guard:[no]longjmp
Summary:
This protects calls to longjmp from transferring control to arbitrary
program points. Instead, longjmp calls are limited to the set of
registered setjmp return addresses.

This also implements /guard:nolongjmp to allow users to link in object
files that call setjmp that weren't compiled with /guard:cf. In this
case, the linker will approximate the set of address taken functions,
but it will leave longjmp unprotected.

I used the following program to test, compiling it with different -guard
flags:
  $ cl -c t.c -guard:cf
  $ lld-link t.obj -guard:cf

  #include <setjmp.h>
  #include <stdio.h>
  jmp_buf buf;
  void g() {
    printf("before longjmp\n");
    fflush(stdout);
    longjmp(buf, 1);
  }
  void f() {
    if (setjmp(buf)) {
      printf("setjmp returned non-zero\n");
      return;
    }
    g();
  }
  int main() {
    f();
    printf("hello world\n");
  }

In particular, the program aborts when the code is compiled *without*
-guard:cf and linked with -guard:cf. That indicates that longjmps are
protected.

Reviewers: ruiu, inglorion, amccarth

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D43217

llvm-svn: 325047
2018-02-13 20:32:53 +00:00
Aditya Nandakumar
fdb604ca7c [GISel]: Add Pattern Matcher for G_FMUL.
https://reviews.llvm.org/D43206

llvm-svn: 325044
2018-02-13 20:09:13 +00:00
Aditya Nandakumar
2444dedb25 [GISel]: Make Pattern matcher for FADD commutative
llvm-svn: 325043
2018-02-13 20:09:11 +00:00
Stanislav Mekhanoshin
f1be30ca6b [AMDGPU] Cleanup in memory legalizer tests. NFC.
llvm-svn: 325042
2018-02-13 20:03:32 +00:00
Adrian Prantl
e07824ace6 Document the shortcomings of DwarfExpression::addMachineReg().
Also make a drive-by-fix of a bug in the subregister scan code that
only triggers with an incomplete or otherwise very irregular machine
description.

rdar://problem/37404493

This re-applies r324972 with an early exit in the case of a complete
failure to make this commit NFC again as intended.

llvm-svn: 325041
2018-02-13 19:54:00 +00:00
Sanjay Patel
50e5d39035 [InstCombine] fix test comment and add vector test; NFC
llvm-svn: 325039
2018-02-13 18:48:27 +00:00
Sanjay Patel
f556f5dbb5 [InstCombine, InstSimplify] (re)move tests, regenerate checks; NFC
The InstCombine integer mul test file had tests that belong in InstSimplify 
(including fmul tests). Move things to where they belong and auto-generate
complete checks for everything.

llvm-svn: 325037
2018-02-13 18:22:53 +00:00
Vedant Kumar
9e0cea2637 [Debugify] Avoid verifier failure on non-definition subprograms
If a function doesn't have an exact definition, don't apply debugify
metadata as it triggers a DIVerifier failure.

The issue is that it's invalid to have DILocations inside a DISubprogram
which isn't a definition ("scope points into the type hierarchy!").

llvm-svn: 325036
2018-02-13 18:15:27 +00:00
Vedant Kumar
b3b12b2293 [DeadStoreElimination] Salvage debug info from dead insts
According to `llvm-dwarfdump --statistics` this salvages 43 additional
unique source variables in a stage2 build of clang. It increases the
size of the .debug_loc section by 0.002% (or 2864 bytes).

Differential Revision: https://reviews.llvm.org/D43220

llvm-svn: 325035
2018-02-13 18:15:26 +00:00
Hans Wennborg
bc2ca698f0 Revert r324903 "[AArch64] Refactor identification of SIMD immediates"
It caused "Cannot select: t33: f64 = AArch64ISD::FMOV Constant:i32<0>"
in Chromium builds. See PR36369.

> Get rid of icky goto loops and make the code easier to maintain (NFC).
>
> Differential revision: https://reviews.llvm.org/D42723

llvm-svn: 325034
2018-02-13 18:14:38 +00:00
Francis Visoiu Mistrih
d2cca3c3d8 [CodeGen] Print bundled instructions using the MIR syntax in -debug output
Old syntax:

BUNDLE implicit-def %r0, implicit-def %r1, implicit %r2
* %r0 = SOME_OP %r2
* %r1 = ANOTHER_OP internal %r0

New syntax:

BUNDLE implicit-def %r0, implicit-def %r1, implicit %r2 {
  %r0 = SOME_OP %r2
  %r1 = ANOTHER_OP internal %r0
}

llvm-svn: 325032
2018-02-13 18:08:26 +00:00
Yaxun Liu
c6e831c09d [AMDGPU] Change constant addr space to 4
Differential Revision: https://reviews.llvm.org/D43170

llvm-svn: 325030
2018-02-13 18:00:25 +00:00
Craig Topper
3f5aaeaf08 [DAGCombiner] Add one use check to fold (not (and x, y)) -> (or (not x), (not y))
Summary:
If the and has an additional use we shouldn't invert it. That creates an additional instruction.

While there add a one use check to the transform above that looked similar.

Reviewers: spatel, RKSimon

Reviewed By: RKSimon

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D43225

llvm-svn: 325019
2018-02-13 16:25:27 +00:00
Craig Topper
3990a6fdd4 [X86] Add combine to shrink 64-bit ands when one input is an any_extend and the other input guarantees upper 32 bits are 0.
Summary: This gets the shift case from PR35792.

Reviewers: spatel, RKSimon

Reviewed By: RKSimon

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D43222

llvm-svn: 325018
2018-02-13 16:25:25 +00:00
Krzysztof Parzyszek
6707e3ee79 [Hexagon] Simplify some code, NFC
llvm-svn: 325014
2018-02-13 15:35:07 +00:00
Krzysztof Parzyszek
d47af7d410 [Hexagon] Remove unnecessary check
llvm-svn: 325013
2018-02-13 15:34:29 +00:00
Sjoerd Meijer
db5ee9a2c0 [ARM] Allow half types in ConstantPool
Change ARMConstantIslandPass to:
- accept f16 literals as litpool entries,
- if the litpool needs to be inserted in the middle of a big block, then we
  need to 4-byte align the next instruction in ARM mode.

Differential Revision: https://reviews.llvm.org/D42784

llvm-svn: 325012
2018-02-13 15:34:09 +00:00
Sanjay Patel
ec0afdb0d7 [DAG] fix type of undef returned by getNode()
The bug has been lying dormant, but apparently was never exposed, until
after rL324941 because we didn't return the correct result 
for shifts with undef operands.

llvm-svn: 325010
2018-02-13 14:55:07 +00:00
Florian Hahn
16c6e1004c Revert r325001: [CallSiteSplitting] Support splitting of blocks with instrs before call.
Due to memsan not being happy with the array of ValueToValue maps.

llvm-svn: 325009
2018-02-13 14:48:39 +00:00
Ivan A. Kosarev
a5e04a8948 [IR] Fix creating mutable versions of TBAA access tags
Due to a typo in D41565, mutable TBAA tags created with
createMutableTBAAAccessTag() lose their base types. This patch
fixes that typo and updates tests respectively.

Differential Revision: https://reviews.llvm.org/D42364

llvm-svn: 325008
2018-02-13 14:44:25 +00:00
Florian Hahn
617a86b09e [CallSiteSplitting] Clear ValueToValue maps.
llvm-svn: 325006
2018-02-13 14:17:00 +00:00
Florian Hahn
10ce1d4b03 [CallSiteSplitting] Dereference pointer earlier.
This should make the sanitizers happy.

llvm-svn: 325004
2018-02-13 13:51:51 +00:00
Simon Pilgrim
ffe07d27cb [InstCombine] Simplify getLogBase2 case for scalar/splats. NFCI.
llvm-svn: 325003
2018-02-13 13:16:26 +00:00
Florian Hahn
8156315329 [CallSiteSplitting] Fix new-pm test, as TargetIRAnalysis is run earlier now
llvm-svn: 325002
2018-02-13 12:22:32 +00:00
Florian Hahn
f7c5e4104c [CallSiteSplitting] Support splitting of blocks with instrs before call.
For basic blocks with instructions between the beginning of the block
and a call we have to duplicate the instructions before the call in all
split blocks and add PHI nodes for uses of the duplicated instructions
after the call.

Currently, the threshold for the number of instructions before a call
is quite low, to keep the impact on binary size low.

Reviewers: junbuml, mcrosier, davidxl, davide

Reviewed By: junbuml

Differential Revision: https://reviews.llvm.org/D41860

llvm-svn: 325001
2018-02-13 12:00:48 +00:00
Andre Vieira
c6aad1560b [ARM] Don't print "Requires NEON" error message for M-profile
Differential Revision: https://reviews.llvm.org/D43125

llvm-svn: 325000
2018-02-13 11:46:38 +00:00
Alexander Ivchenko
d5c239c13b [X86] Rename function main->foo in CodeGen/X86/pr35316.ll. NFC
Using "void main" might be confusing for some cases.

llvm-svn: 324997
2018-02-13 10:58:19 +00:00
Sjoerd Meijer
f319ff54ec [Thumb] Handle addressing mode AddrMode5FP16
This addressing mode wasn't checked, so we were running in an assert.

Differential Revision: https://reviews.llvm.org/D43179

llvm-svn: 324996
2018-02-13 10:29:03 +00:00
Florian Hahn
81e5cacd37 [LoopInterchange] Check number of latch successors before accessing them.
In cases where the OuterMostLoopLatchBI only has a single successor,
accessing the second successor will fail.

This fixes a failure when building the test-suite with loop-interchange
enabled.

Reviewers: mcrosier, karthikthecool, davide

Reviewed by: karthikthecool

Differential Revision: https://reviews.llvm.org/D42906

llvm-svn: 324994
2018-02-13 10:02:52 +00:00
Craig Topper
614a35f79a [X86] Add a test case showing blcic matching being broken by an and mask applied to the input. NFC
Playing around with other BMI/TBM instructions after PR35792 and saw this.

llvm-svn: 324987
2018-02-13 07:28:28 +00:00
Craig Topper
3f95f223b3 [X86] Add a blsr test case with a shift from PR35792. NFC
The blsr pattern here is missed because the add is shrunk, but the and is not. This leaves an any_extend between them.

llvm-svn: 324986
2018-02-13 05:33:39 +00:00
Craig Topper
198308e988 [X86] Teach EVEX->VEX pass to turn VRNDSCALE into VROUND when bits 7:4 of the immediate are 0 and the regular EVEX->VEX checks pass.
Bits 7:4 control the scale part of the operation. If the scale is 0 the behavior is equivalent to VROUND.

Fixes PR36246

llvm-svn: 324985
2018-02-13 04:19:26 +00:00
Craig Topper
5628bc2958 [X86] Autogenerate complete checks. NFC
llvm-svn: 324984
2018-02-13 04:19:23 +00:00
Vedant Kumar
59ee967268 [Utils] Salvage debug info from all no-op casts
We already try to salvage debug values from no-op bitcasts and inttoptr
instructions: we should handle ptrtoint instructions as well.

This saves an additional 24,444 debug values in a stage2 build of clang,
and (according to llvm-dwarfdump --statistics) provides an additional
289 unique source variables.

llvm-svn: 324982
2018-02-13 03:34:23 +00:00
David Blaikie
3390c41055 Revert "Rewrite the cached map used for locating the most precise DIE among inlined subroutines for a given address."
Seeing some inlining missing in internal uses of symbolizer. I'll work
on a reproduction, tests, improvements & recommit as soon as possible.

(Chandler would like it to be known that this improvement did make
check-llvm 4x faster... - so there's certainly some fairly good
motivation to push on fixing/figuring this out & getting it back in)

This reverts commit r321345.

llvm-svn: 324981
2018-02-13 01:52:30 +00:00
Craig Topper
08dead3212 [X86] Use getTypeAction in most places that were checking ExperimentalVectorWideningLegalization.
This will allow more flexibility in what types we legalize via widening or not. This should help with a couple lines in D41062.

llvm-svn: 324980
2018-02-13 01:49:58 +00:00
Craig Topper
353ec1fe96 [X86] Remove duplicate CHECK-LABEL line the update script didn't delete when I converted the test.
llvm-svn: 324979
2018-02-13 01:36:27 +00:00
Adrian Prantl
0c3d7f245c Revert "Document the shortcomings of DwarfExpression::addMachineReg()."
This reverts commit r324972. This commit broke a bot, so perhaps it is
testable after all?

llvm-svn: 324977
2018-02-13 01:17:35 +00:00
Vedant Kumar
8f021554ab [Utils] Salvage debug info of DCE'ed mul/sdiv/srem instructions
Here are the number of additional debug values salvaged in a stage2
build of clang:

  63 SALVAGE: MUL
  1250 SALVAGE: SDIV

(No values were salvaged from `srem` instructions in this experiment,
but it's a simple case to handle so we might as well.)

llvm-svn: 324976
2018-02-13 01:09:52 +00:00
Vedant Kumar
9397301dae [Utils] Salvage debug info of DCE'ed shl/lhsr/ashr instructions
Here are the number of additional debug values salvaged in a stage2
build of clang:

  1912 SALVAGE: ASHR
   405 SALVAGE: LSHR
   249 SALVAGE: SHL

llvm-svn: 324975
2018-02-13 01:09:49 +00:00
Vedant Kumar
2847f38775 [Utils] Salvage the debug info of DCE'ed 'sub' instructions
This salvages 14 debug values in a stage2 build of clang.

llvm-svn: 324974
2018-02-13 01:09:47 +00:00
Vedant Kumar
cda75a7d36 [Utils] Salvage the debug info of DCE'ed 'xor' instructions
This salvages 259 debug values in a stage2 build of clang.

Differential Revision: https://reviews.llvm.org/D43207

llvm-svn: 324973
2018-02-13 01:09:46 +00:00
Adrian Prantl
455280bb24 Document the shortcomings of DwarfExpression::addMachineReg().
Also make a drive-by-fix of a bug in the subregister scan code that
only triggers with an incomplete or otherwise very irregular machine
description.

rdar://problem/37404493

llvm-svn: 324972
2018-02-13 01:02:56 +00:00
Volkan Keles
870f6d17a4 GlobalISel: IRTranslate llvm.fmuladd.* intrinsic
Reviewers: qcolombet, ab, dsanders, aditya_nandakumar, bogner

Reviewed By: qcolombet

Subscribers: rovka, kristof.beyls, javed.absar, llvm-commits

Differential Revision: https://reviews.llvm.org/D43090

llvm-svn: 324971
2018-02-13 00:47:46 +00:00
Sanjay Patel
a4be43cc7e [InstSimplify] allow exp/log simplifications with only 'reassoc' FMF
These intrinsic folds were added with D41381, but only allowed with isFast().
That's more than necessary because FMF has 'reassoc' to apply to these
kinds of folds after D39304, and that's all we need in these cases.

Differential Revision: https://reviews.llvm.org/D43160

llvm-svn: 324967
2018-02-12 23:51:23 +00:00
Sam Clegg
2b5694137f [WebAssembly] Update ADT/TripleTest.cpp now that default file format has changed
Differential Revision: https://reviews.llvm.org/D43212

llvm-svn: 324966
2018-02-12 23:47:38 +00:00
Craig Topper
5e5732b2bd [X86] Auto generate complete checks. NFC
llvm-svn: 324964
2018-02-12 23:43:10 +00:00
Sanjay Patel
3ff0e0c346 [InstSimplify] change tests to 'fast' to reflect current folds
The diff to use 'reassoc' is part of D43160; it should not have
been made with rL324961. Reverting that part here, so we'll
see the intended diff with the code change.

llvm-svn: 324963
2018-02-12 23:39:10 +00:00
Jakub Kuderski
2bf921c08c [Dominators] Always recalculate postdominators when update yields different roots
Summary:
This patch makes postdominators always recalculate the tree when an update causes to change the tree roots.
As @dmgreen noticed in [[ https://reviews.llvm.org/D41298 | D41298 ]], the previous implementation was not conservative enough and it was possible to end up with a PostDomTree that was different than a freshly computed one.
The patch also compares postdominators with a freshly computed tree at the end of full verification to make sure we don't hit similar issues in the future.

This should (ideally) be also backported to 6.0 before the release, although I don't have any reports of this causing an observable error. It should be safe to do it even if it's late in the release, as the change only makes the current behavior more conservative.

Reviewers: dmgreen, dberlin, davide, brzycki, grosser

Reviewed By: brzycki, grosser

Subscribers: llvm-commits, dmgreen

Differential Revision: https://reviews.llvm.org/D43140

llvm-svn: 324962
2018-02-12 23:37:27 +00:00