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Commit Graph

174948 Commits

Author SHA1 Message Date
Sanjay Patel
f15483dfff [InstCombine] limit extracting shuffle transform based on uses
As discussed in D53037, this can lead to worse codegen, and we
don't generally expect the backend to be able to optimize
arbitrary shuffles. If there's only one use of the 1st shuffle,
that means it's getting removed, so that should always be
safe.

llvm-svn: 353235
2019-02-05 22:58:45 +00:00
Heejin Ahn
cb321a6905 [WebAssembly] Disable a v128.const test line temporarily
r353131 caused failures in v128.const test for clang-ppc64be-linux-lnt
and clang-s390x-linux bots. This temporarily disables that line until
it is fixed.

llvm-svn: 353234
2019-02-05 22:47:29 +00:00
Sanjay Patel
c8f576a86d [InstCombine] split shuffle test to show extra use constraint; NFC
As discussed in D53037, this transform can cause codegen problems
if the 1st shuffle has multiple uses.

llvm-svn: 353233
2019-02-05 22:46:13 +00:00
Rong Xu
a75864e8e1 [PGO] Use a function for creating variable for profile file name. NFC.
Factored out the code for creating variable for profile file name to
a function.

llvm-svn: 353230
2019-02-05 22:34:45 +00:00
Petar Jovanovic
cb0186abee [elfabi] Fix the type of the variable formated for error output
Change the format type of Dyn.SONameOffset to PRIx64 since it is a uint64_t.
The problem was detected on mips builds, where it was printing junk values
and causing test failure.

Patch by Milos Stojanovic.

Differential Revision: https://reviews.llvm.org/D57676

llvm-svn: 353225
2019-02-05 22:23:46 +00:00
Aditya Nandakumar
bba2c76cb2 [NFC][GlobalISel]: Add a convenience method to MachineInstrBuilder to simplify getOperand(i).getReg()
https://reviews.llvm.org/D57608

It's a common pattern in GISel to have a MachineInstrBuilder from which we get various regs
(commonly MIB->getOperand(0).getReg()). This adds a helper method and the above can be
replaced with MIB.getReg(0).

llvm-svn: 353223
2019-02-05 22:14:40 +00:00
Craig Topper
fcd355d9cd [X86] Regenerate tests missed in r353061. NFC
We now print the implicit %st register on these instruction, but since they occur at the end of the line, FileCheck didn't see they were missing.

llvm-svn: 353222
2019-02-05 21:47:42 +00:00
Reid Kleckner
ccf6215242 [MC] Don't error on numberless .file directives on MachO
Summary:
Before r349976, MC ignored such directives when producing an object file
and asserted when re-producing textual assembly output. I turned this
assertion into a hard error in both cases in r349976, but this makes it
unnecessarily difficult to write a single assembly file that supports
both MachO and other object formats that support .file. A user reported
this as PR40578, and we decided to go back to ignoring the directive.

Fixes PR40578

Reviewers: mstorsjo

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D57772

llvm-svn: 353218
2019-02-05 21:14:09 +00:00
Matt Davis
60ba11caa1 [llvm-readobj] Display sections that do not belong to a segment in the section-mapping
Summary:
The following patch adds the "None" line to the section to segment mapping dump.
That line lists the sections that do not belong to any segment.
I realize that this change differs from GNU readelf which does not display the latter information.

I'd rather not add this "feature" under a command line option.  I think that might introduce confusion, since users would have to
make an additional decision as to if they want to see all of the section-to-segment map or just a subset of it.

Another option is to only print the "None" line if the `--section-mapping` option is passed; however,
that might also introduce some confusion, because the section-to-segment map would be different between`--program-headers`
and the `--section-mapping` output.  While the difference is just the "None" line, it seems that if we choose to display
the segment-to-section mapping, then we should always display the whole map including the sections
that do not belong to segments.

```
Section to Segment mapping:
  Segment Sections...
   00
   01     .interp
   02     .interp .note.ABI-tag .gnu.hash
   03     .init_array .fini_array .dynamic
   04     .dynamic
   05     .note.ABI-tag
   06     .eh_frame_hdr
   07
   08     .init_array .fini_array .dynamic .got
   None   .comment .symtab .strtab .shstrtab <--- THIS LINE
```

Reviewers: grimar, rupprecht, jhenderson, espindola

Reviewed By: rupprecht

Subscribers: khemant, emaste, arichardson, llvm-commits

Differential Revision: https://reviews.llvm.org/D57700

llvm-svn: 353217
2019-02-05 21:01:01 +00:00
Thomas Lively
82b00c4757 [WebAssembly] Lower memmove to memory.copy
Summary: The lowering is identical to the memcpy lowering.

Reviewers: aheejin

Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D57727

llvm-svn: 353216
2019-02-05 20:57:40 +00:00
Evandro Menezes
8b9cac7053 [TargetLibraryInfo] Regroup run time functions for Windows (NFC)
Regroup supported and unsupported functions by precision and C standard.

llvm-svn: 353213
2019-02-05 20:24:21 +00:00
Matt Arsenault
8b293a24e8 Move some llvm-mc tests where they belong
llvm-svn: 353211
2019-02-05 20:12:48 +00:00
Matt Arsenault
ff5eea0c79 GlobalISel: Verify G_GEP
llvm-svn: 353209
2019-02-05 20:04:12 +00:00
Scott Linder
ec09d11aac [AMDGPU] Consider XOR in waterfall loop as a terminator
Ensure the XOR in the waterfall loop for indirect addressing is considered a terminator.

Differential Revision: https://reviews.llvm.org/D57703

llvm-svn: 353207
2019-02-05 19:50:32 +00:00
Alexey Bataev
308478161b [DEBUG_INFO][NVPTX] Generate DW_AT_address_class to get the values in debugger.
Summary:
According to
https://docs.nvidia.com/cuda/archive/10.0/ptx-writers-guide-to-interoperability/index.html#cuda-specific-dwarf,
the compiler should emit the DW_AT_address_class attribute for all
variable and parameter. It means, that DW_AT_address_class attribute
should be used in the non-standard way to support compatibility with the
cuda-gdb debugger.
Clang is able to generate the information about the variable address
class. This information is emitted as the expression sequence
`DW_OP_constu <DWARF Address Space> DW_OP_swap DW_OP_xderef`. The patch
tries to find all such expressions and transform them into
`DW_AT_address_class <DWARF Address Space>` if target is NVPTX and the debugger is gdb.
If the expression is not found, then default values are used. For the
local variables <DWARF Address Space> is set to ADDR_local_space(6), for
the globals <DWARF Address Space> is set to ADDR_global_space(5). The
values are taken from the table in the same section 5.2. CUDA-Specific
DWARF Definitions.

Reviewers: echristo, probinson

Subscribers: jholewinski, aprantl, llvm-commits

Differential Revision: https://reviews.llvm.org/D57157

llvm-svn: 353203
2019-02-05 19:33:47 +00:00
Matt Arsenault
240cdafd6c AMDGPU: Fix assert on trunc from bitcast of build_vector
The v2i64 argument is lowered to a bitcast of v4i32 build_vector.
This would then attempt to use the i32-element as the source of the
vector truncate. This really would need to collect 2 elements from the
build_vector to produce the intended truncate.

llvm-svn: 353202
2019-02-05 19:23:57 +00:00
Simon Pilgrim
2fce0141f6 [X86][SSE] Disable ZERO_EXTEND shuffle combining
rL352997 enabled ZERO_EXTEND from non-shuffle-able value types. I've disabled it for now to fix a regression identified by @asbirlea until I can fix this properly.

llvm-svn: 353198
2019-02-05 19:15:48 +00:00
Petar Jovanovic
3354b4cc76 [PGO] Fix the type of the formated variable
Change the format type of Value to PRIu64 since it is a uint64_t.
The problem was detected on mips boards building 32-bit binaries,
where it was printing junk values and causing test failure.

Patch by Milos Stojanovic.

Differential Revision: https://reviews.llvm.org/D57583

llvm-svn: 353194
2019-02-05 18:09:28 +00:00
Robert Widmann
f2fda35e11 [LLVM-C] Add Bindings to GlobalIFunc
Summary:
Adds the standard gauntlet of accessors for global indirect functions and updates the echo test.

Now it would be nice to have a target abstraction so one could know if they have access to a suitable ELF linker and runtime.

Reviewers: whitequark, deadalnix

Reviewed By: whitequark

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D56177

llvm-svn: 353193
2019-02-05 18:05:44 +00:00
Anton Korobeynikov
287ccc2dff Enable integrated assembler on MSP430 by default.
Patch by Kristina Bessonova!

Differential Revision: https://reviews.llvm.org/D56787

llvm-svn: 353192
2019-02-05 18:01:45 +00:00
Oliver Stannard
a390364af8 [AArch64][Outliner] Don't outline BTI instructions
We can't outline BTI instructions, because they need to be the very first
instruction executed after an indirect call or branch. If we outline them, then
an indirect call might go to the branch to the outlined function, which will
fault.

Differential revision: https://reviews.llvm.org/D57753

llvm-svn: 353190
2019-02-05 17:21:57 +00:00
Simon Pilgrim
1f1c4b7b3e [X86][AVX] Attempt to combine shuffles to subvector broadcast load
llvm-svn: 353189
2019-02-05 17:02:49 +00:00
Matt Arsenault
eaac595e10 AArch64/GlobalISel: Don't clamp from 2 to 2
This is equivalent to clampMaxNumElements, but saves a check.

llvm-svn: 353188
2019-02-05 16:57:18 +00:00
Sam Clegg
72d22ece2e [WebAssembly] Object: Remove redundant method. NFC.
Differential Revision: https://reviews.llvm.org/D57719

llvm-svn: 353183
2019-02-05 16:30:21 +00:00
Simon Pilgrim
fb45770858 [X86][AVX] Add PR34041 subvector broadcast test cases
llvm-svn: 353182
2019-02-05 16:18:30 +00:00
Sanjay Patel
a7a3ff99be [CGP] add test for unsigned subtract of 1 with overflow; NFC
llvm-svn: 353179
2019-02-05 15:27:40 +00:00
Sanjay Patel
d8f3430e74 [AArch64][x86] add tests for unsigned subtract with overflow; NFC
llvm-svn: 353178
2019-02-05 15:26:42 +00:00
Nico Weber
7069843067 gn build: BUILD.gn files for clang-tidy and clang-apply-replacements
Patch from Mirko Bonadei <mbonadei@webrtc.org>!

Differential Revision: https://reviews.llvm.org/D57329

llvm-svn: 353177
2019-02-05 15:14:38 +00:00
Krasimir Georgiev
46e49b08fd Fix typo in comment, NFCI
llvm-svn: 353176
2019-02-05 15:00:56 +00:00
Nico Weber
69e27f5e76 gn build: Merge r353072
llvm-svn: 353175
2019-02-05 14:47:36 +00:00
Thomas Preud'homme
0f9aa25226 Recommit: Detect incorrect FileCheck variable CLI definition
Summary:
While the backend code of FileCheck relies on definition of variable
from the command-line to have an equal sign '=' and a variable name
before that, the frontend does not actually enforce it. This leads to
FileCheck crashing when invoked with invalid syntax for the -D option.

This patch adds the missing validation in the frontend. It also makes
the -D option an AlwaysPrefix option to be able to detect -D=FOO as
being a define without variable and -D as missing its value.

Copyright:
- Linaro (changes in version 2 of revision D55940)
- GraphCore (changes in later versions)

Reviewers: jdenny

Subscribers: JonChesterfield, hiraditya, kristina, probinson,
llvm-commits

Differential Revision: https://reviews.llvm.org/D55940

llvm-svn: 353173
2019-02-05 14:17:28 +00:00
Thomas Preud'homme
fd51ca5973 Recommit: Add support for prefix-only CLI options
Summary:
Add support for options that always prefix their value, giving an error
if the value is in the next argument or if the option is given a value
assignment (ie. opt=val). This is the desired behavior for the -D option
of FileCheck for instance.

Copyright:
- Linaro (changes in version 2 of revision D55940)
- GraphCore (changes in later versions and introduced when creating
  D56549)

Reviewers: jdenny

Subscribers: llvm-commits, probinson, kristina, hiraditya,
JonChesterfield

Differential Revision: https://reviews.llvm.org/D56549

llvm-svn: 353172
2019-02-05 14:17:16 +00:00
Simon Pilgrim
a48c260f94 [X86][SSE] Rename SimplifyDemandedVectorElts BLENDV tests
I'm going to be adding SimplifyDemandedBits tests shortly.

llvm-svn: 353171
2019-02-05 14:11:50 +00:00
Andrea Di Biagio
3e8820df08 [MCA] Moved the logic that updates register dependencies from DispatchStage to RegisterFile. NFC
DispatchStage should always delegate to an object of class RegisterFile the task
of updating data dependencies.  ReadState and WriteState objects should not be
modified directly by DispatchStage.
This patch also renames stage IS_AVAILABLE to IS_DISPATCHED.

llvm-svn: 353170
2019-02-05 14:11:41 +00:00
Serge Guelton
4312cae017 gn build: Fix Python 3 write_vcsrevision script compatibility
Trivial fix: decode was not called for all subprocess.check_output calls.

Commited on behalf of Andrew Boyarshin

Differential Revision: https://reviews.llvm.org/D57505

llvm-svn: 353168
2019-02-05 13:01:12 +00:00
Simon Pilgrim
e83a6e5ac6 [X86][SSE] Add SimplifyDemandedVectorElts support for X86ISD::BLENDV
llvm-svn: 353165
2019-02-05 12:27:29 +00:00
Simon Pilgrim
6a67c3821a [X86][SSE] Add tests showing missing SimplifyDemandedVectorElts support for X86ISD::BLENDV
llvm-svn: 353164
2019-02-05 12:18:34 +00:00
Andrea Di Biagio
b2c182d29f [MCA] Simplify the logic in method WriteState::addUser. NFCI
In some cases, it is faster to just grow the set of 'Users' rather than
performing a llvm::find_if every time a new user is added to
the set. No functional change intended.

llvm-svn: 353162
2019-02-05 11:36:55 +00:00
Jeremy Morse
926c499b16 [DebugInfo][NFCI] Split salvageDebugInfo into helper functions
Some use cases are appearing where salvaging is needed that does not
correspond to an instruction being deleted -- for example an instruction
being sunk, or a Value not being available in a block being isel'd.

Enable more fine grained control over how salavging occurs by splitting
the logic into helper functions, separating things that are specific to
working on DbgVariableIntrinsics from those specific to interpreting IR
and building DIExpressions.

Differential Revision: https://reviews.llvm.org/D57696

llvm-svn: 353156
2019-02-05 11:11:28 +00:00
Hans Wennborg
8b23ed2ade Fix format string in bindings/go/llvm/ir_test.go (PR40561)
The test started failing for me recently. I don't see any changes around
this code, so maybe it's my local go version that changed or something.

The error seems real to me: we're trying to print an Attribute with %d.
The test talks about "attribute masks" I'm not sure what that refers to,
but I suppose we could print the raw pointer value, since that's
what the test seems to be comparing.

Differential revision: https://reviews.llvm.org/D57672

llvm-svn: 353155
2019-02-05 11:01:54 +00:00
Simon Pilgrim
9819ff8761 [X86][AVX] Attempt to share broadcasts of different widths (PR39454)
If we have broadcasts of different vector widths, keep the longest vector width and extract subvectors for the shorter vectors (which should be free).

Differential Revision: https://reviews.llvm.org/D57663

llvm-svn: 353154
2019-02-05 10:58:43 +00:00
Simon Pilgrim
11c4a572bb [CostModel][X86] Add UMUL fixed point cost tests
llvm-svn: 353153
2019-02-05 10:55:38 +00:00
Florian Hahn
ad99b95580 [CGP] Add support for sinking operands to their users, if they are free.
This patch improves code generation for some AArch64 ACLE intrinsics. It adds
support to CGP to duplicate and sink operands to their user, if they can be
folded into a target instruction, like zexts and sub into usubl. It adds a
TargetLowering hook shouldSinkOperands, which looks at the operands of
instructions to see if sinking is profitable.

I decided to add a new target hook, as for the sinking to be profitable,
at least on AArch64, we have to look at multiple operands of an
instruction, instead of looking at the users of a zext for example.

The sinking is done in CGP, because it works around an instruction
selection limitation. If instruction selection is not limited to a
single basic block, this patch should not be needed any longer.

Alternatively this could be done in the LoopSink pass, which tries to
undo LICM for instructions in blocks that are not executed frequently.

Note that we do not force the operands to sink to have a single user,
because we duplicate them before sinking. Therefore this is only
desirable if they really can be done for free. Additionally we could
consider the impact on live ranges later on.

This should fix https://bugs.llvm.org/show_bug.cgi?id=40025.

As for performance, we have internal code that uses intrinsics and can
be speed up by 10% by this change.

Reviewers: SjoerdMeijer, t.p.northover, samparker, efriedma, RKSimon, spatel

Reviewed By: samparker

Differential Revision: https://reviews.llvm.org/D57377

llvm-svn: 353152
2019-02-05 10:27:40 +00:00
Diana Picus
d29b1fa6a3 [ARM GlobalISel] Support G_GEP for Thumb2
Same as ARM, but use a different opcode in the instruction selection.

llvm-svn: 353151
2019-02-05 10:21:37 +00:00
Dan Liew
8939afb9f3 Previously if the user configured their build but then changed
LLVM_ENABLED_PROJECT and reconfigured it had no effect on what
projects were actually built. This was very confusing behaviour. The
reason for this is that the value of the `LLVM_TOOL_<PROJECT>_BUILD`
variables are already set.

The problem here is that we have two sources of truth:

* The projects listed in LLVM_ENABLE_PROJECTS.
* The projects enabled/disabled with LLVM_TOOL_<PROJECT>_BUILD.

At configure time we have no real way of knowing which source of truth
the user wants so we apply the following heuristic:

If the user ever sets `LLVM_ENABLE_PROJECTS` in the CMakeCache then that
is used as the single source of truth and we force the
`LLVM_TOOL_<PROJECT>_BUILD` CMake cache variables to have the
appropriate values that match the contents of the
`LLVM_ENABLE_PROJECTS`. If the user never sets `LLVM_ENABLE_PROJECTS`
then they can continue to use and set the `LLVM_TOOL_<PROJECT>_BUILD`
variables as the "source of truth".

The problem with this approach is that if the user ever tries to use
both `LLVM_ENABLE_PROJECTS` and `LLVM_TOOL_<PROJECT>_BUILD` for the same
build directory then any user set value for `LLVM_TOOL_<PROJECT>_BUILD`
variables will get overwriten, likely without the user noticing.

Hopefully the above shouldn't matter in practice because the
LLVM_TOOL_<PROJECT>_BUILD variables are not documented, but
LLVM_ENABLE_PROJECTS is.

We should probably deprecate the `LLVM_TOOL_<PROJECT>_BUILD`
variables at some point by turning them into to regular CMake
variables that don't live in the CMake cache.

Differential Revision: https://reviews.llvm.org/D57535

llvm-svn: 353148
2019-02-05 08:47:28 +00:00
Hiroshi Inoue
d74d87c0db [NFC] fix trivial typos in comments
llvm-svn: 353147
2019-02-05 08:30:48 +00:00
Clement Courbet
fb5cfaa534 [DAG][NFC] Add unit tests.
In preparation for D57541.

llvm-svn: 353144
2019-02-05 08:00:17 +00:00
Clement Courbet
d6464019ba [DAG] BaseIndexOffset: FrameIndexSDNodes with the same FrameIndex compare equal.
Reviewers: niravd

Subscribers: arphaman, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D57692

llvm-svn: 353143
2019-02-05 07:36:20 +00:00
Craig Topper
f0b48521da [X86] Connect the default fpsr and dirflag clobbers in inline assembly to the registers we have defined for them.
Summary:
We don't currently map these constraints to physical register numbers so they don't make it to the MachineIR representation of inline assembly.

This could have problems for proper dependency tracking in the machine schedulers though I don't have a test case that shows that.

Reviewers: rnk

Reviewed By: rnk

Subscribers: eraman, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D57641

llvm-svn: 353141
2019-02-05 06:13:06 +00:00
Peter Collingbourne
714e057894 gn build: Upgrade to NDK r19.
NDK r19 includes a sysroot that can be used directly by the compiler
without creating a standalone toolchain, so we just need a handful
of flags to point Clang there.

Differential Revision: https://reviews.llvm.org/D57733

llvm-svn: 353139
2019-02-05 05:10:19 +00:00