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20146be5e8
Commit Graph

72 Commits

Author SHA1 Message Date
Rafael Espindola
20146be5e8 implement shl and sra 
llvm-svn: 30191
 2006-09-08 17:36:23 +00:00
Rafael Espindola
9ffcdb8ab7 add the eor (xor) instruction 
llvm-svn: 30189
 2006-09-08 16:59:47 +00:00
Rafael Espindola
af1689d5a5 implement unconditional branches 
fix select.ll

llvm-svn: 30186
 2006-09-08 12:47:03 +00:00
Jim Laskey
160a8aa339 1. Remove condition on delete. 
2. Protect and outline createTargetAsmInfo.

3. Misc. kruft.

llvm-svn: 30169
 2006-09-07 23:39:26 +00:00
Jim Laskey
9da25f6119 Make target asm info a property of the target machine. 
llvm-svn: 30162
 2006-09-07 22:06:40 +00:00
Jim Laskey
a64fe8ccf2 Break out target asm info into separate files. 
llvm-svn: 30161
 2006-09-07 22:05:02 +00:00
Jim Laskey
6b86ef852c Separate target specific asm properties from the asm printers. 
llvm-svn: 30126
 2006-09-06 18:34:40 +00:00
Rafael Espindola
d9cebd5e48 add the orr instruction 
llvm-svn: 30125
 2006-09-06 18:03:12 +00:00
Chris Lattner
9cd4e3429e Completely eliminate def&use operands. Now a register operand is EITHER a 
def operand or a use operand.

llvm-svn: 30109
 2006-09-05 02:31:13 +00:00
Rafael Espindola
de18749e1f add support for returning 64bit values 
llvm-svn: 30103
 2006-09-04 19:05:01 +00:00
Chris Lattner
33c9ddc91d Completely rearchitect the interface between targets and the pass manager. 
This pass:

1. Splits TargetMachine into TargetMachine (generic targets, can be implemented
any way, like the CBE) and LLVMTargetMachine (subclass of TM that is used by
things using libcodegen and other support).
2. Instead of having each target fully populate the passmgr for file or JIT
   output, move all this to common code, and give targets hooks they can
   implement.
3. Commonalize the target population stuff between file emission and JIT
   emission.
4. All (native code) codegen stuff now happens in a FunctionPassManager, which
   paves the way for "fast -O0" stuff in the CFE later, and now LLC could
   lazily stream .bc files from disk to use less memory.
5. There are now many fewer #includes and the targets don't depend on the
   scalar xforms or libanalysis anymore (but codegen does).
6. Changing common code generator pass ordering stuff no longer requires
   touching all targets.
7. The JIT now has the option of "-fast" codegen or normal optimized codegen,
   which is now orthogonal to the fact that JIT'ing is being done.

llvm-svn: 30081
 2006-09-04 04:14:57 +00:00
Chris Lattner
fb12884be6 Simplify target construction. 
llvm-svn: 30070
 2006-09-03 18:44:02 +00:00
Rafael Espindola
65007fc49c add the SETULT condition code 
llvm-svn: 30067
 2006-09-03 13:19:16 +00:00
Rafael Espindola
5c0443c41e add more condition codes 
llvm-svn: 30056
 2006-09-02 20:24:25 +00:00
Evan Cheng
2db7799507 Select() no longer require Result operand by reference. 
llvm-svn: 29898
 2006-08-26 05:34:46 +00:00
Rafael Espindola
91954ae78f use @ for comments 
store LR in an arbitrary stack slot
add support for writing varargs functions

llvm-svn: 29876
 2006-08-25 17:55:16 +00:00
Rafael Espindola
fb63eba81c add the "eq" condition code 
implement a movcond instruction

llvm-svn: 29857
 2006-08-24 17:19:08 +00:00
Rafael Espindola
cf999a6d39 create a generic bcond instruction that has a conditional code argument 
llvm-svn: 29856
 2006-08-24 16:13:15 +00:00
Rafael Espindola
9e2a2dfb2d initial support for branches 
llvm-svn: 29854
 2006-08-24 13:45:55 +00:00
Rafael Espindola
af0512fc8d add a README.txt 
llvm-svn: 29814
 2006-08-22 12:22:46 +00:00
Rafael Espindola
474f6c5bf1 initial support for select 
llvm-svn: 29802
 2006-08-21 22:00:32 +00:00
Rafael Espindola
13eb38e699 add the and instruction 
llvm-svn: 29793
 2006-08-21 13:58:59 +00:00
Rafael Espindola
c255c4c434 call computeRegisterProperties 
llvm-svn: 29780
 2006-08-20 01:49:49 +00:00
Chris Lattner
db290f7479 Constify some methods. Patch provided by Anton Vayvod, thanks! 
llvm-svn: 29756
 2006-08-17 22:00:08 +00:00
Rafael Espindola
ff879761c1 add a "load effective address" 
llvm-svn: 29748
 2006-08-17 17:09:40 +00:00
Rafael Espindola
b98e92cb78 Declare the callee saved regs 
Remove the hard coded store and load of the link register
Implement ARMFrameInfo

llvm-svn: 29727
 2006-08-16 14:43:33 +00:00
Rafael Espindola
48bed9023d select code like 
ldr rx, [ry, #offset]

llvm-svn: 29664
 2006-08-14 19:01:24 +00:00
Chris Lattner
8ca6e82bce Eliminate use of getNode that takes a vector. 
llvm-svn: 29614
 2006-08-11 17:38:39 +00:00
Chris Lattner
be2765058e elimiante use of getNode that takes vector of operands. 
llvm-svn: 29612
 2006-08-11 17:22:35 +00:00
Evan Cheng
6053206580 Match tablegen changes. 
llvm-svn: 29604
 2006-08-11 09:08:15 +00:00
Evan Cheng
34a49551f5 CALLSEQ_* produces chain even if that's not needed. 
llvm-svn: 29603
 2006-08-11 09:03:33 +00:00
Rafael Espindola
2ddcf46717 correctly set LocalAreaOffset of TargetFrameInfo 
llvm-svn: 29589
 2006-08-09 17:37:45 +00:00
Rafael Espindola
f0b265b48b fix the spill code 
llvm-svn: 29583
 2006-08-09 16:41:12 +00:00
Rafael Espindola
9e8af5c486 fix the loading of the link register in emitepilogue 
llvm-svn: 29580
 2006-08-09 13:15:47 +00:00
Rafael Espindola
ae2d1c53c7 change the addressing mode of the str instruction to reg+imm 
llvm-svn: 29571
 2006-08-08 20:35:03 +00:00
Rafael Espindola
7bfbb91f75 initial support for variable number of arguments 
llvm-svn: 29567
 2006-08-08 13:02:29 +00:00
Evan Cheng
d18be1d9c1 Match tablegen isel changes. 
llvm-svn: 29549
 2006-08-07 22:28:20 +00:00
Rafael Espindola
bd29d36be4 use a 'register pressure reducing' scheduler 
make sure only one move is used in a hello world

llvm-svn: 29520
 2006-08-04 12:48:42 +00:00
Rafael Espindola
97918b1d11 Bug fix: always generate a RET_FLAG in LowerRET 
fixes ret_null.ll and call.ll

llvm-svn: 29519
 2006-08-03 22:50:11 +00:00
Rafael Espindola
fa94338687 add and use ARMISD::RET_FLAG 
llvm-svn: 29499
 2006-08-03 17:02:20 +00:00
Rafael Espindola
719336441f start comments with # 
move the constant pool to .text
correctly print loads of labels
mark R0, R1, R2 and R3 as caller save

llvm-svn: 29451
 2006-08-01 18:53:10 +00:00
Rafael Espindola
f11277971f implement LowerConstantPool and LowerGlobalAddress 
llvm-svn: 29433
 2006-08-01 12:58:43 +00:00
Rafael Espindola
0ea0399411 handle GlobalValue::InternalLinkage in doFinalization 
llvm-svn: 29417
 2006-07-31 20:38:13 +00:00
Evan Cheng
3b5f1c6248 Remove InFlightSet hack. No longer needed. 
llvm-svn: 29373
 2006-07-28 00:47:19 +00:00
Rafael Espindola
c0ede90402 emit global constants 
llvm-svn: 29344
 2006-07-27 11:38:51 +00:00
Rafael Espindola
2919d4ce24 implement function calling of functions with up to 4 arguments 
llvm-svn: 29274
 2006-07-25 20:17:20 +00:00
Rafael Espindola
9ea0bc742c implemented sub 
correctly update the stack pointer in the prologue and epilogue

llvm-svn: 29244
 2006-07-21 12:26:16 +00:00
Rafael Espindola
ad256854c0 initial prologue and epilogue implementation. Need to define add and sub before finishing it :-) 
llvm-svn: 29175
 2006-07-18 17:00:30 +00:00
Rafael Espindola
40073f5767 skeleton of a lowerCall implementation for ARM 
llvm-svn: 29159
 2006-07-16 01:02:57 +00:00
Rafael Espindola
fdfaee67f5 add the memri memory operand 
this makes it possible for ldr instructions with non-zero immediate

llvm-svn: 29103
 2006-07-11 11:36:48 +00:00