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Commit Graph

272 Commits

Author SHA1 Message Date
Andrew Trick
2790ee3a8e Track IR ordering of SelectionDAG nodes 2/4.
Change SelectionDAG::getXXXNode() interfaces as well as call sites of
these functions to pass in SDLoc instead of DebugLoc.

llvm-svn: 182703
2013-05-25 02:42:55 +00:00
Benjamin Kramer
95f8445d29 Hexagon: Make helper functions static.
llvm-svn: 182588
2013-05-23 15:43:11 +00:00
Jyotsna Verma
5bb9f9d4f2 Hexagon: SelectionDAG should not use MVT::Other to check the legality of BR_CC.
llvm-svn: 182390
2013-05-21 15:54:32 +00:00
Matt Arsenault
118196f0ca Add LLVMContext argument to getSetCCResultType
llvm-svn: 182180
2013-05-18 00:21:46 +00:00
Benjamin Kramer
5781bb221a Don't cast away constness.
llvm-svn: 182086
2013-05-17 11:39:41 +00:00
Rafael Espindola
4c7120e048 Remove dead calls to addFrameMove.
Without a PROLOG_LABEL present, the cfi instructions are never printed.

llvm-svn: 182016
2013-05-16 15:08:37 +00:00
Jyotsna Verma
a1b968ec45 Hexagon: Pass to replace tranfer/copy instructions into combine instruction
where possible.

llvm-svn: 181817
2013-05-14 18:54:06 +00:00
Jyotsna Verma
980fae33f3 Hexagon: Add patterns to generate 'combine' instructions.
llvm-svn: 181805
2013-05-14 17:16:38 +00:00
Jyotsna Verma
86beda7e47 Hexagon: ArePredicatesComplement should not restrict itself to TFRs.
llvm-svn: 181803
2013-05-14 16:36:34 +00:00
Jyotsna Verma
8bbeb8be87 Hexagon: Remove dead-code after unconditional return from addPreSched2.
llvm-svn: 181797
2013-05-14 15:33:27 +00:00
Duncan Sands
526a10c53f Suppress GCC compiler warnings in release builds about variables that are only
read in asserts.

llvm-svn: 181689
2013-05-13 07:50:47 +00:00
Rafael Espindola
237980d752 Remove the MachineMove class.
It was just a less powerful and more confusing version of
MCCFIInstruction. A side effect is that, since MCCFIInstruction uses
dwarf register numbers, calls to getDwarfRegNum are pushed out, which
should allow further simplifications.

I left the MachineModuleInfo::addFrameMove interface unchanged since
this patch was already fairly big.

llvm-svn: 181680
2013-05-13 01:16:13 +00:00
Rafael Espindola
245de3a31f Change getFrameMoves to return a const reference.
To add a frame now there is a dedicated addFrameMove which also takes
care of constructing the move itself.

llvm-svn: 181657
2013-05-11 02:38:11 +00:00
Jyotsna Verma
9c76c6e3f4 Fix unused variable error.
Earlier, this variable was used in an assert and was causing failure on
darwin.

llvm-svn: 181630
2013-05-10 21:44:02 +00:00
Jyotsna Verma
f20d85d4ad Hexagon: Fix switch statements in GetDotOldOp and IsNewifyStore.
No functionality change.

llvm-svn: 181628
2013-05-10 20:58:11 +00:00
Jyotsna Verma
2dfc0b2d13 Hexagon: Fix switch cases in HexagonVLIWPacketizer.cpp.
llvm-svn: 181624
2013-05-10 20:27:34 +00:00
Rafael Espindola
d05c5e1727 Remove unused argument.
llvm-svn: 181618
2013-05-10 18:16:59 +00:00
Rafael Espindola
4f14a6f0b8 Remove unused function.
llvm-svn: 181606
2013-05-10 16:53:12 +00:00
Jyotsna Verma
c849e91c17 Hexagon: Remove switch cases from GetDotNewPredOp and isPostIncrement functions.
No functionality change.

llvm-svn: 181535
2013-05-09 19:16:07 +00:00
Jyotsna Verma
15d448ba0c Hexagon: Use relation map for getMatchingCondBranchOpcode() and
getInvertedPredicatedOpcode() functions instead of switch cases.

llvm-svn: 181530
2013-05-09 18:25:44 +00:00
Jyotsna Verma
37863260ff Hexagon: Fix Small Data support to handle -G 0 correctly.
llvm-svn: 181344
2013-05-07 19:53:00 +00:00
Jyotsna Verma
5307666fe8 Reverting r181331.
Missing file, HexagonSplitConst32AndConst64.cpp, from lib/Target/Hexagon/CMakeLists.txt.

llvm-svn: 181334
2013-05-07 17:12:35 +00:00
Jyotsna Verma
af0c734e1b Hexagon: Fix Small Data support to handle -G 0 correctly.
llvm-svn: 181331
2013-05-07 16:42:15 +00:00
Jyotsna Verma
71c6bf55f2 Hexagon: Set accessSize and addrMode on all load/store instructions.
llvm-svn: 181324
2013-05-07 15:06:29 +00:00
Krzysztof Parzyszek
b05e065c7b Print IR from Hexagon MI passes with -print-before/after-all.
llvm-svn: 181255
2013-05-06 21:58:00 +00:00
Krzysztof Parzyszek
1f0992737e Cleanup of the HexagonTargetMachine setup.
llvm-svn: 181250
2013-05-06 21:25:45 +00:00
Jyotsna Verma
0ec07a2dbc Hexagon: Add multiclass/encoding bits for the New-Value Jump instructions.
llvm-svn: 181235
2013-05-06 18:49:23 +00:00
Krzysztof Parzyszek
afd38d8a5a Make references to HexagonTargetMachine "const".
llvm-svn: 181233
2013-05-06 18:38:37 +00:00
Krzysztof Parzyszek
ab0f078360 Use consistent function names.
llvm-svn: 181090
2013-05-04 01:30:49 +00:00
Reid Kleckner
488fd277c1 Fix missing include in Hexagon code for Release+Asserts
llvm-svn: 180983
2013-05-03 00:54:56 +00:00
Jyotsna Verma
08d387d6f8 reverting r180953
llvm-svn: 180964
2013-05-02 22:10:59 +00:00
Jyotsna Verma
cd4db6de1c Hexagon: Add multiclass/encoding bits for the New-Value Jump instructions.
llvm-svn: 180953
2013-05-02 21:21:57 +00:00
Pranav Bhandarkar
520d26e773 Hexagon - Add peephole optimizations for zero extends.
* lib/Target/Hexagon/HexagonInstrInfo.td: Add patterns to combine a
	sequence of a pair of i32->i64 extensions followed by a "bitwise or"
	into COMBINE_rr.
	* lib/Target/Hexagon/HexagonPeephole.cpp: Copy propagate Rx in the
	instruction Rp = COMBINE_Ir_V4(0, Rx) to the uses of Rp:subreg_loreg.
	* test/CodeGen/Hexagon/union-1.ll: New test.
	* test/CodeGen/Hexagon/combine_ir.ll: Fix test.

llvm-svn: 180946
2013-05-02 20:22:51 +00:00
Jyotsna Verma
c909ae62a5 Hexagon: Honor __builtin_expect by using branch probabilities.
* lib/Target/Hexagon/HexagonInstrInfo.cpp (GetDotNewPredOp):
  Given a jump opcode return the right pred.new jump opcode with
  a taken vs not-taken hint based on branch probabilities provided
  by the target independent module.
  * lib/Target/Hexagon/HexagonVLIWPacketizer.cpp: Use the above function.
  * lib/Target/Hexagon/HexagonNewValueJump.cpp(getNewvalueJumpOpcode):
  Enhance existing function use branch probabilities like
  HexagonInstrInfo::GetDotNewPredOp but for New Value (GPR) Jumps.

llvm-svn: 180923
2013-05-02 15:39:30 +00:00
Jyotsna Verma
a3587dd6bb Hexagon: Use multiclass for Jump instructions.
llvm-svn: 180885
2013-05-01 21:37:34 +00:00
Jyotsna Verma
d290020e45 Hexagon: Clear isKill flag on the predicate register in
PredicateInstruction function.

llvm-svn: 180884
2013-05-01 21:27:30 +00:00
Jyotsna Verma
4a5d195942 Hexagon: Use multiclass for combine and STri[bhwd]_shl_V4 instructions.
llvm-svn: 180145
2013-04-23 21:17:40 +00:00
Jyotsna Verma
d985cbcb4e Hexagon: Define relations for GP-relative instructions.
No functionality change.

llvm-svn: 180144
2013-04-23 21:05:55 +00:00
Jyotsna Verma
624f2e0434 Hexagon: Remove assembler mapped instruction definitions.
llvm-svn: 180133
2013-04-23 19:15:55 +00:00
Jyotsna Verma
20903a7aba Hexagon: Remove duplicate instructions to handle global/immediate values
for absolute/absolute-set addressing modes.

llvm-svn: 180120
2013-04-23 17:11:46 +00:00
Tim Northover
d12b2f24c8 Remove unused MEMBARRIER DAG node; it's been replaced by ATOMIC_FENCE.
llvm-svn: 179939
2013-04-20 12:32:17 +00:00
Michael Liao
3b258b6b24 ArrayRefize getMachineNode(). No functionality change.
llvm-svn: 179901
2013-04-19 22:22:57 +00:00
Jyotsna Verma
f365070e16 Hexagon: Set isPredicatedNew flag on predicate new instructions.
llvm-svn: 179388
2013-04-12 18:01:06 +00:00
Jyotsna Verma
a7ba594fa9 Hexagon: Set isPredicatedFlase flag for all the instructions with negated predication.
llvm-svn: 179387
2013-04-12 17:46:52 +00:00
Jyotsna Verma
c3ebace56c Hexagon: Expand br_cc.
It fixes following tests for Hexagon:

CodeGen/Generic/2003-07-29-BadConstSbyte.ll
CodeGen/Generic/2005-10-21-longlonggtu.ll
CodeGen/Generic/2009-04-28-i128-cmp-crash.ll
CodeGen/Generic/MachineBranchProb.ll
CodeGen/Generic/builtin-expect.ll
CodeGen/Generic/pr12507.ll

llvm-svn: 178794
2013-04-04 21:18:26 +00:00
Duncan Sands
3137dc79c4 Remove unused typedef.
llvm-svn: 178462
2013-04-01 13:46:15 +00:00
Duncan Sands
25d8fd3fd9 There is no longer any need to silence this compiler warning as the warning has
been turned off globally.

llvm-svn: 178451
2013-03-31 17:44:09 +00:00
Jyotsna Verma
91f1858936 Hexagon: Add emitFrameIndexDebugValue function to emit debug information.
llvm-svn: 178368
2013-03-29 21:09:53 +00:00
Jyotsna Verma
c91629764d Hexagon: Disable DwarfUsesInlineInfoSection flag.
llvm-svn: 178345
2013-03-29 15:46:12 +00:00
Jyotsna Verma
912f8ff9d4 Hexagon: Replace switch-case in isDotNewInst with TSFlags.
llvm-svn: 178281
2013-03-28 19:44:04 +00:00