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11439 Commits

Author SHA1 Message Date
Owen Anderson
9e49cae184 Tests for NEON encodings of vpmin and vpmax. 
llvm-svn: 117382
 2010-10-26 18:31:47 +00:00
Owen Anderson
d8e5d26a56 Add correct NEON encoding for vpadal. 
llvm-svn: 117380
 2010-10-26 18:18:03 +00:00
Owen Anderson
1940ad62ca Tests for NEON encoding of vpadd and vpaddl. 
llvm-svn: 117377
 2010-10-26 18:04:51 +00:00
Owen Anderson
b7618a821f Add NEON encodings for vmov and vmvn of immediates. 
llvm-svn: 117374
 2010-10-26 17:40:54 +00:00
Rafael Espindola
e38790534e Implement some relaxations for arithmetic instructions. The limitation 
on RIP relative relocations looks artificial, but this is a superset of
what we were able to do before.

llvm-svn: 117364
 2010-10-26 14:09:12 +00:00
Kalle Raiskila
64680cd5b8 Change v64 datalayout in SPU. 
The SPU ABI does not mention v64, and all examples
in C suggest v128 are treated similarily to arrays, 
we use array alignment for v64 too. This makes the 
alignment of e.g. [2 x <2 x i32>] behave "intuitively"
and similar to as if the elements were e.g. i32s.

This also makes an "unaligned store" test to be 
aligned, with different (but functionally equivalent)
code generated.

llvm-svn: 117360
 2010-10-26 10:45:47 +00:00
Bob Wilson
309484bb46 When the "true" and "false" blocks of a diamond if-conversion are the same, 
do not double-count the duplicate instructions by counting once from the
beginning and again from the end.  Keep track of where the duplicates from
the beginning ended and don't go past that point when counting duplicates
at the end.  Radar 8589805.

This change causes one of the MC/ARM/simple-fp-encoding tests to produce
different (better!) code without the vmovne instruction being tested.
I changed the test to produce vmovne and vmoveq instructions but moving
between register files in the opposite direction.  That's not quite the same
but predicated versions of those instructions weren't being tested before,
so at least the test coverage is not any worse, just different.

llvm-svn: 117333
 2010-10-26 00:02:24 +00:00
Owen Anderson
67684a0bae Tests for NEON encoding of vmax. 
llvm-svn: 117327
 2010-10-25 23:45:34 +00:00
Owen Anderson
10a13e5063 Tests for NEON encoding of vmin. 
llvm-svn: 117326
 2010-10-25 23:35:36 +00:00
Dale Johannesen
2566d39d07 An stdcall function calling a non-stdcall function 
cannot use tailcall.  PR 8461.

llvm-svn: 117322
 2010-10-25 22:17:05 +00:00
Owen Anderson
e5e0dcd665 Add correct encodings for NEON vabal. 
llvm-svn: 117315
 2010-10-25 21:29:04 +00:00
Owen Anderson
3eff0b86a5 Add correct NEON encodings for vaba. 
llvm-svn: 117309
 2010-10-25 20:52:57 +00:00
Owen Anderson
a45478aef9 Tests for NEON encoding of vabdl. 
llvm-svn: 117303
 2010-10-25 20:36:28 +00:00
Owen Anderson
3e03c142fd Add tests for NEON encoding of vabd. 
llvm-svn: 117302
 2010-10-25 20:29:27 +00:00
Daniel Dunbar
5cbb066ea3 MC/AsmParser: Fix relative precedence of {+,-} and comparison ops. 
llvm-svn: 117299
 2010-10-25 20:18:56 +00:00
Daniel Dunbar
97fa30f53b MC/AsmLexer: Fix bug in source location for Slash token. 
llvm-svn: 117298
 2010-10-25 20:18:53 +00:00
Daniel Dunbar
9de1fe630b tweak test. 
llvm-svn: 117297
 2010-10-25 20:18:49 +00:00
Daniel Dunbar
4e52e15868 MC/AsmParser: Rewrite test to actually check some parts of expression parsing, 
now that we have macros and friends. Uncovered a bug in macro expansion...

llvm-svn: 117295
 2010-10-25 20:18:41 +00:00
Owen Anderson
61f5b3f2dc Attempt to provide correct encodings for NEON vbit and vbif, even though we can't test them at the moment. 
llvm-svn: 117294
 2010-10-25 20:17:22 +00:00
Owen Anderson
072692331e Provide correct NEON encodings for vbsl. 
llvm-svn: 117293
 2010-10-25 20:13:13 +00:00
Owen Anderson
59e85cbd66 Add correct instruction encodings for vbic, vorn, and vmvn. 
llvm-svn: 117282
 2010-10-25 18:43:52 +00:00
Owen Anderson
2824342fac Provide correct NEON encodings for vand, veor, and vorr. 
llvm-svn: 117279
 2010-10-25 18:28:30 +00:00
Owen Anderson
1693a4c5d5 Add tests for NEON encoding of vtst. 
llvm-svn: 117277
 2010-10-25 18:10:34 +00:00
Owen Anderson
ba261b092c Add NEON encoding tests for vcgt and vacgt. 
llvm-svn: 117276
 2010-10-25 18:03:59 +00:00
Rafael Espindola
5748458e7d Add support for emitting ARM file attributes. 
llvm-svn: 117275
 2010-10-25 17:50:35 +00:00
Owen Anderson
3a5f798790 Add tests for NEON encodings of vcge and vacge. 
llvm-svn: 117274
 2010-10-25 17:49:32 +00:00
Owen Anderson
757022131f Add a warning about our inability to test the encoding of vceq with immediate zero. 
llvm-svn: 117273
 2010-10-25 17:33:02 +00:00
Owen Anderson
8ad139dce6 Add tests for NEON encoding of vceq. 
llvm-svn: 117270
 2010-10-25 17:20:26 +00:00
Owen Anderson
d7968b1d9c Add tests for NEON encoding of vsubhn and vrsubhn. 
llvm-svn: 117269
 2010-10-25 17:12:46 +00:00
Dan Gohman
96e34e87ca Fix a case where instcombine was stripping metadata (and alignment) 
from stores when folding in bitcasts.

llvm-svn: 117265
 2010-10-25 16:16:27 +00:00
Duncan Sands
5b25503aab Fix PR8445: a block with no predecessors may be the entry block, in which case 
it isn't unreachable and should not be zapped.  The check for the entry block
was missing in one case: a block containing a unwind instruction.  While there,
do some small cleanups: "M" is not a great name for a Function* (it would be
more appropriate for a Module*), change it to "Fn"; use Fn in more places.

llvm-svn: 117224
 2010-10-24 12:23:30 +00:00
Owen Anderson
2710687363 Add tests for NEON encoding of vqsub. 
llvm-svn: 117214
 2010-10-23 18:02:16 +00:00
Michael J. Spencer
87c8212d41 X86: Emit _fltused instead of __fltused on Windows x64. 
llvm-svn: 117205
 2010-10-23 09:06:59 +00:00
Mikhail Glushenkov
858566ac15 Remove -llvmc-temp-hack from tblgen. 
llvm-svn: 117197
 2010-10-23 07:32:53 +00:00
Owen Anderson
1e091f8c58 Add tests for NEON encoding of vhsub. 
llvm-svn: 117189
 2010-10-22 23:58:22 +00:00
Jim Grosbach
7de028efd2 Add a CMP test. 
llvm-svn: 117187
 2010-10-22 23:48:01 +00:00
Owen Anderson
3416940e43 Add tests for NEON encoding of vsubw. 
llvm-svn: 117186
 2010-10-22 23:46:07 +00:00
Jim Grosbach
1df6f11838 tidy up 
llvm-svn: 117185
 2010-10-22 23:46:04 +00:00
Owen Anderson
a9c3c6c610 Add tests for NEON encoding of vsubl. 
llvm-svn: 117183
 2010-10-22 23:36:36 +00:00
Owen Anderson
8bc3d6ec45 Add tests for NEON encoding of vsub. 
llvm-svn: 117177
 2010-10-22 23:21:04 +00:00
Owen Anderson
2d807f4ed0 Add tests for NEON encoding of vqdmlsl. 
llvm-svn: 117173
 2010-10-22 23:08:47 +00:00
Owen Anderson
593d941f2f Add tests for NEON encoding of vmlsl. 
llvm-svn: 117171
 2010-10-22 23:02:27 +00:00
Jim Grosbach
de52e11864 tidy up. 
llvm-svn: 117166
 2010-10-22 22:15:48 +00:00
Jim Grosbach
bba77cca02 ARM mode encoding information for CLZ, RBIT, REV*, and PKH*. 
llvm-svn: 117165
 2010-10-22 22:12:16 +00:00
Jim Grosbach
172f52fb3d Remove duplicate test. 
llvm-svn: 117158
 2010-10-22 22:04:28 +00:00
Jim Grosbach
3cb3f83374 tidy up. 
llvm-svn: 117157
 2010-10-22 22:01:56 +00:00
Jim Grosbach
4366bb4852 FileCheck-ize a few tests. 
llvm-svn: 117156
 2010-10-22 21:55:03 +00:00
Bob Wilson
0290dbe7d4 Teach instcombine to set the alignment arguments for NEON load/store intrinsics. 
llvm-svn: 117154
 2010-10-22 21:41:48 +00:00
Owen Anderson
8c38a57413 Add tests for the correct encoding of NEON vmls. 
llvm-svn: 117145
 2010-10-22 20:31:24 +00:00
Owen Anderson
424434414e Add correct NEON encodings for vqdmlal. 
llvm-svn: 117134
 2010-10-22 19:35:48 +00:00
Jim Grosbach
10195e9b73 Add the encoding information for the rest of the ARM mode multiply instructions. 
llvm-svn: 117133
 2010-10-22 19:15:30 +00:00
Owen Anderson
2bbdc62e17 Provide correct encodings for NEON vmlal. 
llvm-svn: 117131
 2010-10-22 19:05:25 +00:00
Owen Anderson
ada2b33321 Provide correct NEON encodings for vmla. 
llvm-svn: 117126
 2010-10-22 18:54:37 +00:00
Stuart Hastings
772bf86028 Temporarily revert r117079; it broke a tester. Radar 6635085. 
llvm-svn: 117122
 2010-10-22 18:44:22 +00:00
Jim Grosbach
ca2897a0ca More ARM multiply instuction binary encodings. 
llvm-svn: 117121
 2010-10-22 18:35:16 +00:00
Owen Anderson
399ec622e4 Add testscases for encoding of NEON vdqmull. 
llvm-svn: 117115
 2010-10-22 17:57:37 +00:00
Jim Grosbach
0ae6bf8095 More ARM multiply instruction encoding information. 
llvm-svn: 117108
 2010-10-22 17:16:17 +00:00
NAKAMURA Takumi
00eaed4fe8 test/Makefile: Force lit -j1 on Cygwin. 
lit -jN causes crash on Cygwin's python.

llvm-svn: 117093
 2010-10-22 09:40:37 +00:00
Andrew Trick
b9e8700beb Reverting r117031 to cleanup valgrind errors. 
It doesn't look like anything is wrong with the checkin,
but the new test cases expose a mem bug in AsmParser.

llvm-svn: 117087
 2010-10-22 03:58:29 +00:00
Sean Callanan
9a40554de4 Fixed handling of immediate operand sizes, which 
weren't properly reflecting the OperandSize attribute
of the instruction leading to improper decoding of
certain instructions with the 66H prefix.  Also added
a test case for this.

llvm-svn: 117084
 2010-10-22 01:24:11 +00:00
Stuart Hastings
c6b2d77375 Test case for r117075. Radar 6635085. 
llvm-svn: 117079
 2010-10-21 22:43:32 +00:00
Owen Anderson
bba3b2050e Add tests for NEON encoding of vmull. 
llvm-svn: 117077
 2010-10-21 22:19:53 +00:00
Jim Grosbach
7c42142b71 ARM binary encodings for MVN variants. 
llvm-svn: 117076
 2010-10-21 22:19:32 +00:00
Owen Anderson
653fc9304a Add tests for NEON encoding of vqdmulh and vqrdmulh. 
llvm-svn: 117074
 2010-10-21 22:05:33 +00:00
Jim Grosbach
cb41e97b5c ARM Binary encoding information for BFC/BFI instructions. 
llvm-svn: 117072
 2010-10-21 22:03:21 +00:00
Owen Anderson
2c25ce7af1 Add tests for NEON vmul encoding. 
llvm-svn: 117069
 2010-10-21 21:51:58 +00:00
Owen Anderson
b0bddd3282 Rename this test to better reflect its contents. 
llvm-svn: 117067
 2010-10-21 21:40:15 +00:00
Owen Anderson
77c5078d4a Add tests for NEON encodings of vaddhn and vraddhn. 
llvm-svn: 117064
 2010-10-21 20:56:57 +00:00
Owen Anderson
ba6ee305cf Add tests for NEON encodings of vqadd, which was already correctly encoded. 
llvm-svn: 117059
 2010-10-21 20:42:04 +00:00
Owen Anderson
51a6bc3b27 Add correct NEON encodings for vhadd and vrhadd. 
llvm-svn: 117047
 2010-10-21 18:55:04 +00:00
Owen Anderson
dce283c7db Add correct encodings for NEON vaddw.s* and vaddw.u*. 
llvm-svn: 117040
 2010-10-21 18:20:25 +00:00
Owen Anderson
7d90c72edf Provide correct NEON encodings for vaddl.u* and vaddl.s*. 
llvm-svn: 117039
 2010-10-21 18:09:17 +00:00
Rafael Espindola
69c973fbfd Do not recurse into symbol refs that have a variant kind. This prevents us 
from losing the variant when producing a relocation on an alias.

llvm-svn: 117037
 2010-10-21 18:00:20 +00:00
Kevin Enderby
c63105a064 More tweaks to X86 instructions to allow the 'w' suffix in places it makes 
sense, when the instruction takes the 16-bit ax register or m16 memory
location.  These changes to llvm-mc matches what the darwin assembler allows
for these instructions.  Also added the missing flex (without the wait prefix)
and ud2a as an alias to ud2 (still to add ud2b).

llvm-svn: 117031
 2010-10-21 17:16:46 +00:00
Bill Wendling
8b2c8a5856 Fix whitespace. 
llvm-svn: 117002
 2010-10-21 06:25:08 +00:00
Wesley Peck
d646a12f25 Recommit 116986 with capitalization typo fixed. 
llvm-svn: 116993
 2010-10-21 03:57:26 +00:00
Andrew Trick
4a3b819c1f putback r116983 and fix simple-fp-encoding.ll tests 
llvm-svn: 116992
 2010-10-21 03:40:16 +00:00
Wesley Peck
3478e641b9 Reverting the commit 116986. It was breaking the build on llvm-x86_64-linux though it 
compiles on OS X. I'll ensure that it builds on a linux machine before committing
again.

llvm-svn: 116991
 2010-10-21 03:34:22 +00:00
Owen Anderson
7da515c665 Revert r116983, which is breaking all the buildbots. 
llvm-svn: 116987
 2010-10-21 03:11:16 +00:00
Wesley Peck
c50372298d Major update of the MicroBlaze backend. The new features are: 
1. A delay slot filler that searches for valid instructions
       to fill the delay slot with. Previously NOPs would always
       be inserted into delay slots.
    2. Support for MC based instruction printer added.
    3. Support for MC based machine code generation and ELF
       file generation. ELF file generation does not yet
       completely work as much of the ELF support infrastructure
       is still x86/x86-64 specific.
    4. General clean up of the MBlaze backend code. Much of the
       tablegen code has been cleanup and simplified.

Bug Fixes:
    1. Removed duplicate periods from subtarget feature descriptions.
    2. Many of the instructions had bad machine code information
       in the tablegen files. Much of this has been fixed.

llvm-svn: 116986
 2010-10-21 03:09:55 +00:00
Evan Cheng
0b9eaaf45d Add missing scheduling itineraries for transfers between core registers and VFP registers. 
llvm-svn: 116983
 2010-10-21 01:12:00 +00:00
Owen Anderson
a685f8e90a Implement correct encodings for NEON vadd, both integer and floating point. 
llvm-svn: 116981
 2010-10-21 00:48:00 +00:00
Bill Wendling
c7ef66fcf2 Add encoding for moving a value between two ARM core registers and a doublework 
extension register.

llvm-svn: 116970
 2010-10-20 23:37:40 +00:00
Bill Wendling
0f96ff63b3 Add encodings for movement between ARM core registers and single-precision 
registers.

llvm-svn: 116961
 2010-10-20 22:44:54 +00:00
Dan Gohman
afaaf2f56b Add some comments. 
llvm-svn: 116957
 2010-10-20 22:04:02 +00:00
Evan Cheng
9a06e4c7c8 More accurate estimate / tracking of register pressure. 
- Initial register pressure in the loop should be all the live defs into the
  loop. Not just those from loop preheader which is often empty.
- When an instruction is hoisted, update register pressure from loop preheader
  to the original BB.
- Treat only use of a virtual register as kill since the code is still SSA.

llvm-svn: 116956
 2010-10-20 22:03:58 +00:00
Dale Johannesen
a324c8c6bd Fix crash introduced in 116852. 8573915. 
llvm-svn: 116955
 2010-10-20 22:03:37 +00:00
Jason W Kim
3dc75181ae Cut unneeded global variable. 
llvm-svn: 116953
 2010-10-20 22:01:39 +00:00
Rafael Espindola
0a50bbaee1 Handle _GLOBAL_OFFSET_TABLE_ correctly. 
llvm-svn: 116932
 2010-10-20 16:46:08 +00:00
Dale Johannesen
ee87cbe4e9 Enable using vdup for vector constants which are splat of 
integers by default, and remove the controlling flag, now
that LICM will hoist such vdup's.  8003375.

llvm-svn: 116852
 2010-10-19 20:00:17 +00:00
Evan Cheng
1c8dafd12a Re-enable register pressure aware machine licm with fixes. Hoist() may have 
erased the instruction during LICM so UpdateRegPressureAfter() should not
reference it afterwards.

llvm-svn: 116845
 2010-10-19 18:58:51 +00:00
Jason W Kim
ccbc75257a Fixing r116753 r116756 r116777 
The failures in r116753 r116756 were caused by a python issue -
Python likes to append 'L' suffix to stringified numbers if the number
is larger than a machine int. Unfortunately, this causes a divergence of
behavior between 32 and 64 bit python versions.

I re-crafted elf-dump/common_dump to take care of these issues by:

1. always printing 0x (makes for easy sed/regex)
2. always print fixed length (exactly 2 + numBits/4 digits long)
   by mod ((2^numBits) - 1)
3. left-padded with '0'

There is a residual common routine that is also used by
macho-dump (dataToHex) , so I left the 'section_data' test values alone.

llvm-svn: 116823
 2010-10-19 17:39:10 +00:00
Daniel Dunbar
6ff550c84d Revert r116781 "- Add a hook for target to determine whether an instruction def 
is", which breaks some nightly tests.

llvm-svn: 116816
 2010-10-19 17:14:24 +00:00
Mikhail Glushenkov
0c09a4b97f GlobalOpt: EvaluateFunction() must not evaluate stores to weak_odr globals. 
Fixes PR8389.

llvm-svn: 116812
 2010-10-19 16:47:23 +00:00
Che-Liang Chiou
1733b45be9 Add test case mov.ll for PTX device function 
llvm-svn: 116806
 2010-10-19 13:21:51 +00:00
Rafael Espindola
2ba55832f3 Fix PR8300 by remembering to keep the bitcast in all cases. 
llvm-svn: 116788
 2010-10-19 02:02:57 +00:00
Evan Cheng
9c3f6f486e - Add a hook for target to determine whether an instruction def is 
"long latency" enough to hoist even if it may increase spilling. Reloading
  a value from spill slot is often cheaper than performing an expensive
  computation in the loop. For X86, that means machine LICM will hoist
  SQRT, DIV, etc. ARM will be somewhat aggressive with VFP and NEON
  instructions.
- Enable register pressure aware machine LICM by default.

llvm-svn: 116781
 2010-10-19 00:55:07 +00:00
Eric Christopher
a039d14f9b Speculatively revert 116753 and 116756 to attempt to fix the bots. 
llvm-svn: 116777
 2010-10-19 00:19:49 +00:00
Bob Wilson
c3fb4427f4 Support alignment for NEON vld-lane and vst-lane instructions. 
llvm-svn: 116776
 2010-10-19 00:16:32 +00:00
Kevin Enderby
8a3030c6af Added a few tweaks to the Intel Descriptor-table support instructions to allow 
word forms and suffixed versions to match the darwin assembler in 32-bit and
64-bit modes.  This is again for use just with assembly source for llvm-mc .

llvm-svn: 116773
 2010-10-19 00:01:44 +00:00
Eric Christopher
5850afe5f2 Revert r116220 - thus turning arm fast isel back on by default. 
llvm-svn: 116762
 2010-10-18 22:53:53 +00:00
Jason W Kim
1f55cad0e3 Get rid of unneeded FormatOutput global variable 
llvm-svn: 116756
 2010-10-18 21:59:38 +00:00
Jason W Kim
a60bcd8bb1 Changed elf-dump to output hex format by default. 
Also updated tests. 

llvm-svn: 116753
 2010-10-18 21:32:41 +00:00
Dan Gohman
6efd04961b Don't pass the raw invalid pointer used to represent conflicting 
TBAA information to AliasAnalysis.

llvm-svn: 116751
 2010-10-18 21:28:00 +00:00
Dan Gohman
ed8fc1b23f Add a basic testcase for TBAA-aware LICM. 
llvm-svn: 116745
 2010-10-18 21:00:09 +00:00
Rafael Espindola
9a98116bb7 Implement R_386_GOT32. 
llvm-svn: 116744
 2010-10-18 20:47:21 +00:00
Rafael Espindola
c75defe576 Relocate with .bss instead of using the symbol. Matches gas behavior. 
llvm-svn: 116741
 2010-10-18 20:25:33 +00:00
Dan Gohman
2427af80d1 Run tbaa before basicaa, since that's how it's expected to be used. 
llvm-svn: 116731
 2010-10-18 18:45:59 +00:00
Rafael Espindola
7cc236c87f Produce ELF::R_386_GOTPC relocations. 
llvm-svn: 116728
 2010-10-18 18:36:12 +00:00
Dan Gohman
7820328076 Make TypeBasedAliasAnalysis default to doing nothing, with a command-line 
option to enable it.

llvm-svn: 116722
 2010-10-18 18:17:47 +00:00
Dan Gohman
6aff5b94ff Make BasicAliasAnalysis a normal AliasAnalysis implementation which 
does normal initialization and normal chaining. Change the default
AliasAnalysis implementation to NoAlias.

Update StandardCompileOpts.h and friends to explicitly request
BasicAliasAnalysis.

Update tests to explicitly request -basicaa.

llvm-svn: 116720
 2010-10-18 18:04:47 +00:00
Kevin Enderby
cb18d38b76 Added a handful of x86-32 instructions that were missing so that llvm-mc would 
be more complete.  These are only expected to be used by llvm-mc with assembly
source so there is no pattern, [], in the .td files.  Most are being added to
X86InstrInfo.td as Chris suggested and only comments about register uses are
added.  Suggestions welcome on the .td changes as I'm not sure on every detail
of the x86 records.  More missing instructions will be coming.

llvm-svn: 116716
 2010-10-18 17:04:36 +00:00
Rafael Espindola
bf9107e924 Produce a R_386_PLT32 when needed. Moved the default cases of switches to the 
start for consistency.

llvm-svn: 116715
 2010-10-18 16:58:03 +00:00
Rafael Espindola
4a7459403a Handle GOTOFF correctly on i386. 
llvm-svn: 116711
 2010-10-18 16:38:04 +00:00
Kalle Raiskila
3cdfdd9383 Improve lowering of sext to i128 on SPU. 
The old algorithm inserted a 'rotqmbyi' instruction which was
both redundant and wrong - it made shufb select bytes from the
wrong end of the input quad.

llvm-svn: 116701
 2010-10-18 09:34:19 +00:00
Rafael Espindola
be5c52d2dc Add a MCObjectFormat class so that code common to all targets that use a 
single object format can be shared.

This also adds support for

mov zed+(bar-foo), %eax

on ELF and COFF targets.

llvm-svn: 116675
 2010-10-16 18:23:53 +00:00
Benjamin Kramer
9c81b592e7 Unbreak test on non-COFF targets. 
llvm-svn: 116669
 2010-10-16 11:27:13 +00:00
Michael J. Spencer
f9a7c39ecc MC-COFF: Add support for default-null weak externals. 
llvm-svn: 116666
 2010-10-16 08:25:57 +00:00
Michael J. Spencer
e57b670425 X86-Windows: Emit an undefined global __fltused symbol when targeting Windows 
if any floating point arguments are passed to an external function.

llvm-svn: 116665
 2010-10-16 08:25:41 +00:00
Owen Anderson
4373b4516b Generalize MemCpyOpt's handling of call slot forwarding to function properly when the call slot 
forwarding is implemented with a load/store pair rather than a memcpy.

llvm-svn: 116637
 2010-10-15 22:52:12 +00:00
Mikhail Glushenkov
65e099eb3c llvmc: Add a test for the -c flag. 
llvm-svn: 116611
 2010-10-15 19:30:49 +00:00
Jim Grosbach
67f94c42d8 ARM mode encoding information for UBFX and SBFX instructions. 
llvm-svn: 116588
 2010-10-15 17:15:16 +00:00
Jakob Stoklund Olesen
7c0c554397 FileCheckize 
llvm-svn: 116581
 2010-10-15 16:06:42 +00:00
Rafael Espindola
9b114d966a Refactor code a bit and avoid creating unnecessary entries in the string 
map.

llvm-svn: 116579
 2010-10-15 15:39:06 +00:00
Bob Wilson
fcc42f2f3a ARM instructions that are both predicated and set the condition codes 
have been printed with the "S" modifier after the predicate.  With ARM's
unified syntax, they are supposed to go in the other order.  We fixed this
for Thumb when we switched to unified syntax but missed changing it for
ARM.  Apparently we don't generate these instructions often because no one
noticed until now.  Thanks to Bill Wendling for the testcase!

llvm-svn: 116563
 2010-10-15 03:23:44 +00:00
Jim Grosbach
608e4fd221 Simplify test file a bit. 
llvm-svn: 116540
 2010-10-14 23:32:44 +00:00
Jim Grosbach
26842cb893 Add testcase for RRX and ASRS (which effectively tests MOVs, since those 
are just forms of that instruction).

llvm-svn: 116538
 2010-10-14 23:29:18 +00:00
Jim Grosbach
804505c7d4 Refactor the MOVsr[al]_flag and RRX pseudo-instructions to really be pseudos 
and let the ARMExpandPseudoInsts pass fix them up into the real (MOVs)
instruction form.

llvm-svn: 116534
 2010-10-14 22:57:13 +00:00
Jim Grosbach
29dc23398f Tweak the ARM backend to use the RRX mnemonic instead of the 'mov a, b, rrx' 
pseudonym.

llvm-svn: 116512
 2010-10-14 20:43:44 +00:00
Jim Grosbach
73c78f8790 MOVi16 and MOVT ARM mode encodings. 
llvm-svn: 116498
 2010-10-14 18:54:27 +00:00
Rafael Espindola
2cdc3d6235 Remove some code duplication. 
llvm-svn: 116484
 2010-10-14 16:34:44 +00:00
Mikhail Glushenkov
bfe6fa281e Comments. 
llvm-svn: 116476
 2010-10-14 13:43:20 +00:00
Bill Wendling
2c335d364c Add support for vmov.f64/.f32 encoding. There's a bit of a hack going on 
here. The f32 in FCONSTS is handled as a double instead of a float in the
code. So the encoding of the immediate into the instruction isn't exactly in
line with the documentation in that regard. But given that we know it's handled
as a double, it doesn't cause any harm.

llvm-svn: 116471
 2010-10-14 02:33:26 +00:00
Bill Wendling
33a2ecd5e4 Add encoding for 'fmstat'. 
llvm-svn: 116466
 2010-10-14 01:19:34 +00:00
Bill Wendling
cd41f22ec1 - Add encodings for multiply add/subtract instructions in all their glory. 
- Add missing patterns for some multiply add/subtract instructions.
- Add encodings for VMRS and VMSR.

llvm-svn: 116464
 2010-10-14 01:02:08 +00:00
Chris Lattner
27d8b68afa fix a bug I introduced, no idea how this didn't repro right. 
llvm-svn: 116462
 2010-10-14 00:30:00 +00:00
Chris Lattner
7c5912d186 hack to unbreak buildbots 
llvm-svn: 116461
 2010-10-14 00:26:10 +00:00
Chris Lattner
451a0accb5 add uadd_ov/usub_ov to apint, consolidate constant folding 
logic to use the new APInt methods.  Among other things this
implements rdar://8501501 - llvm.smul.with.overflow.i32 should constant fold

which comes from "clang -ftrapv", originally brought to my attention from PR8221.

llvm-svn: 116457
 2010-10-14 00:05:07 +00:00
Jim Grosbach
1699d40f80 Refactor the ARM 'setend' instruction pattern. Use a single instruction pattern 
and handle the operand explicitly. Flesh out encoding information. Add an
explicit disassembler testcase for the instruction.

llvm-svn: 116432
 2010-10-13 21:00:04 +00:00
Bill Wendling
bf63d6eb63 Add MC encodings for VCVT* instrunctions. 
llvm-svn: 116431
 2010-10-13 20:58:46 +00:00
Jim Grosbach
8f0bea85bf Add ARM mode encoding for [SU]XT[BH] and [SU]XTA[BH] instructions. 
llvm-svn: 116421
 2010-10-13 19:56:10 +00:00
Jim Grosbach
9c4a598ef2 Add ARM mode operand encoding information for ADDE/SUBE instructions. 
llvm-svn: 116412
 2010-10-13 18:00:52 +00:00
Rafael Espindola
b1ae74bd73 Fix another case where we were preferring instructions with large 
immediates instead of 8 bits ones.

llvm-svn: 116410
 2010-10-13 17:14:25 +00:00
Rafael Espindola
ff7f11c151 Fix PR8365 by adding a more specialized Pat that checks if an 'and' with 
8 bit constants can be used.

llvm-svn: 116403
 2010-10-13 13:31:20 +00:00
Bill Wendling
6d8a23c978 Add encodings for VNEG and VSQRT. Also add encodings for VMOV, but not a test 
just yet.

llvm-svn: 116386
 2010-10-13 01:17:33 +00:00
Bill Wendling
ea062d454d Add encodings for VCVT instructions. 
llvm-svn: 116385
 2010-10-13 00:56:35 +00:00
Jim Grosbach
3fe0337063 Add ARM encoding information for comparisons, forced-cc-out arithmetics, and 
arithmetic-with-carry-in instructions.

llvm-svn: 116384
 2010-10-13 00:50:27 +00:00
Bill Wendling
e6c2fdebbd Add VCMPZ and VABS. 
llvm-svn: 116383
 2010-10-13 00:38:07 +00:00
Bill Wendling
fddde4cc72 Refactor VCMP instructions. 
llvm-svn: 116379
 2010-10-13 00:04:29 +00:00
Eric Christopher
efbd4146d8 FileCheckize this in a hope to quiet a valgrind warning on grep. 
llvm-svn: 116376
 2010-10-12 23:47:58 +00:00
Bill Wendling
47155cfddd Add encodings for VNMUL[SD]. 
llvm-svn: 116375
 2010-10-12 23:47:37 +00:00
Bill Wendling
185b548b07 Add encodings for VDIV and VMUL. 
llvm-svn: 116370
 2010-10-12 23:22:27 +00:00
Jim Grosbach
0038f2eec6 Be nitpicky and line up the comments. 
llvm-svn: 116365
 2010-10-12 23:14:03 +00:00
Bill Wendling
cd3cb8da45 Add encoding for VSUB and VCMP. 
Fear not! I'm going to try a refactoring right now. :)

llvm-svn: 116359
 2010-10-12 22:55:35 +00:00
Bill Wendling
fad2800dbd Don't need to specify calling convention. Add 'readnone' to functions. 
llvm-svn: 116354
 2010-10-12 22:24:10 +00:00
Bill Wendling
33a26354c1 Encoding for VADDD. Plus a test for the VFP instructions. 
llvm-svn: 116348
 2010-10-12 22:08:41 +00:00
Jim Grosbach
10d9bbe0ca Add encoding information for the remainder of the generic arithmetic 
ARM instructions.

llvm-svn: 116313
 2010-10-12 17:11:26 +00:00
Dan Gohman
8dc9781a91 Add a simple testcase for tbaa. 
llvm-svn: 116272
 2010-10-11 23:54:13 +00:00
Jim Grosbach
29ef87e765 MC machine encoding for simple aritmetic instructions that use a shifted 
register operand.

llvm-svn: 116259
 2010-10-11 23:16:21 +00:00
Andrew Trick
5361f35978 PR8297 
llvm-svn: 116223
 2010-10-11 21:08:42 +00:00
Jakob Stoklund Olesen
a0a5015a35 PowerPC varargs functions store live-in registers on the stack. Make sure we use 
virtual registers for those stores since RegAllocFast requires that each live
physreg only be used once.

This fixes PR8357.

llvm-svn: 116222
 2010-10-11 20:43:09 +00:00
Eric Christopher
fa961e31b1 Found a bug turning this on by default. Disable again for now. 
llvm-svn: 116220
 2010-10-11 20:26:21 +00:00
Eric Christopher
b477aa7c6f Remove now non-existent option. 
llvm-svn: 116219
 2010-10-11 20:21:21 +00:00
Andrew Trick
5704a15e36 Fixes bug 8297: i386 cmpxchg8b, missing MachineMemOperand 
llvm-svn: 116214
 2010-10-11 19:02:04 +00:00
Chris Lattner
c9709f154d Per discussion with Sanjiv, remove the PIC16 target from mainline. When/if 
it comes back, it will be largely a rewrite, so keeping the old codebase
in tree isn't helping anyone.

llvm-svn: 116190
 2010-10-11 05:44:40 +00:00
Michael J. Spencer
8f7251a0e9 X86: MinGW should always use libgcc on Windows. 
llvm-svn: 116177
 2010-10-10 23:11:06 +00:00
Michael J. Spencer
b13cb4dd72 X86: Call _alldiv instead of __divdi3 on Windows (excluding cygwin). 
llvm-svn: 116174
 2010-10-10 22:04:34 +00:00
Chris Lattner
307552613d force a triple, varargs isn't supported with the SVR4 ABI the buildbot tells me. 
llvm-svn: 116170
 2010-10-10 18:59:01 +00:00
Chris Lattner
2b428a0ab8 fix the expansion of va_arg instruction on PPC to know the arg 
alignment for PPC32/64, avoiding some masking operations.

llvm-gcc expands vaarg inline instead of using the instruction
so it has never hit this.

llvm-svn: 116168
 2010-10-10 18:34:00 +00:00
Kenneth Uildriks
e9771f15f7 Now using a variant of the existing inlining heuristics to decide whether to create a given specialization of a function in PartialSpecialization. If the total performance bonus across all callsites passing the same constant exceeds the specialization cost, we create the specialization. 
llvm-svn: 116158
 2010-10-09 22:06:36 +00:00
Michael J. Spencer
56d81e7eae MC-COFF: Fix .bss section size. Fixes PR8335. Patch by NAKAMUTA Takumi! 
llvm-svn: 116155
 2010-10-09 16:04:45 +00:00
Benjamin Kramer
f2d65aee82 Don't test a removed function. 
llvm-svn: 116154
 2010-10-09 15:53:25 +00:00
Michael J. Spencer
4dc462314c MC-COFF: Implement InitSections. Fixes PR8335. 
llvm-svn: 116151
 2010-10-09 15:44:27 +00:00
Michael J. Spencer
9e8793d7d6 MC-COFF: Add COFFAsmParser. Completes PR8343. 
llvm-svn: 116150
 2010-10-09 11:01:07 +00:00
Evan Cheng
15fc769cf2 Correct some load / store instruction itinerary mistakes: 
1. Cortex-A8 load / store multiplies can only issue on ALU0.
2. Eliminate A8_Issue, A8_LSPipe will correctly limit the load / store issues.
3. Correctly model all vld1 and vld2 variants.

llvm-svn: 116134
 2010-10-09 01:03:04 +00:00
Bill Wendling
59895ff813 Simplify test and move into a generic "crash" ll file. 
llvm-svn: 116130
 2010-10-09 00:29:04 +00:00
Bill Wendling
ba58fb0f42 Check to make sure that the iterator isn't at the beginning of the basic block 
before decrementing. <rdar://problem/8529919>

llvm-svn: 116126
 2010-10-09 00:03:48 +00:00
Jim Grosbach
3075d28c15 Implement a few more binary encoding bits. Still very early stage proof-of- 
concept level stuff at this point, but it is generally working for those
instructions that know how to map the operands.

This patch fills in the register operands for add/sub/or/etc instructions
and adds the conditional execution predicate encoding.

llvm-svn: 116112
 2010-10-08 21:45:55 +00:00
Rafael Espindola
bfd3c31acf Call InitSections in llc and clang so that the binaries produced by them 
are easier to diff with those produced by llvm-mc.

llvm-svn: 116095
 2010-10-08 19:37:38 +00:00
Cameron Esfahani
664317d6cd Recommit 116056, now with the missing file... 
llvm-svn: 116083
 2010-10-08 19:24:18 +00:00
Andrew Trick
0d8a3d67e0 reverting 116056: win64_params.ll may need to be conditionalized? 
llvm-svn: 116063
 2010-10-08 17:22:42 +00:00
Cameron Esfahani
a9f8bb1356 Small patch to restore home register stack space allocation for the Win64 case. Add test case. This code eventually needs to be tighter, since it's always allocating it, even in leaf routines. 
llvm-svn: 116056
 2010-10-08 10:31:30 +00:00
Bob Wilson
8689a52c10 Change register allocation order for ARM VFP and NEON registers to put the 
callee-saved registers at the end of the lists.  Also prefer to avoid using
the low registers that are in register subclasses required by certain
instructions, so that those registers will more likely be available when needed.
This change makes a huge improvement in spilling in some cases.  Thanks to
Jakob for helping me realize the problem.

Most of this patch is fixing the testsuite.  There are quite a few places
where we're checking for specific registers.  I changed those to wildcards
in places where that doesn't weaken the tests.  The spill-q.ll and
thumb2-spill-q.ll tests stopped spilling with this change, so I added a bunch
of live values to force spills on those tests.

llvm-svn: 116055
 2010-10-08 06:15:13 +00:00
Chris Lattner
761f40f7ee testcase that goes with r116053 
llvm-svn: 116054
 2010-10-08 05:12:30 +00:00
Chris Lattner
c77216343c rename test 
llvm-svn: 116052
 2010-10-08 05:05:06 +00:00
Chris Lattner
c694d80729 merge tests 
llvm-svn: 116051
 2010-10-08 05:04:58 +00:00
Chris Lattner
79fbe67839 filecheckize. 
llvm-svn: 116050
 2010-10-08 05:02:29 +00:00
Chris Lattner
82ce325f16 reapply: Use the new TB_NOT_REVERSABLE flag instead of special 
reapply: reimplement the second half of the or/add optimization.  We should now

with no changes.  Turns out that one missing "Defs = [EFLAGS]" can upset things
a bit.

llvm-svn: 116040
 2010-10-08 03:57:25 +00:00
Michael J. Spencer
3725cf3d21 Fix Formatting. 
llvm-svn: 116038
 2010-10-08 03:17:21 +00:00
Michael J. Spencer
bdf3b8770f MC-COFF: Fix Simple and Complex type. Fixes PR8320. 
llvm-svn: 116037
 2010-10-08 03:17:11 +00:00
Daniel Dunbar
983fae5a86 Revert "reimplement the second half of the or/add optimization. We should now", 
which depends on r116007, which I am about to revert.

llvm-svn: 116031
 2010-10-08 02:07:26 +00:00
Chris Lattner
7577cb7b49 reimplement the second half of the or/add optimization. We should now 
only end up emitting LEA instead of OR.  If we aren't able to promote
something into an LEA, we should never be emitting it as an ADD.

Add some testcases that we emit "or" in cases where we used to produce
an "add".

llvm-svn: 116026
 2010-10-08 01:05:10 +00:00
Jim Grosbach
edbbf33203 Add test file for simple ARM binary encodings with MC 
llvm-svn: 116024
 2010-10-08 00:47:59 +00:00
Michael J. Spencer
452789b5c0 MC-COFF: Add test for my last commit. 
llvm-svn: 116015
 2010-10-08 00:00:28 +00:00
Devang Patel
35201e0fd6 Remove LoopIndexSplit pass. It is neither maintained nor used by anyone. 
llvm-svn: 116004
 2010-10-07 23:29:37 +00:00
Chris Lattner
bd89233607 convert cmp to use a multipattern 
llvm-svn: 115978
 2010-10-07 20:56:25 +00:00
Evan Cheng
7c89d70f27 Canonicalize X86ISD::MOVDDUP nodes to v2f64 to make sure all cases match. Also eliminate unneeded isel patterns. rdar://8520311 
llvm-svn: 115977
 2010-10-07 20:50:20 +00:00
Michael J. Spencer
85094f7689 MC-COFF: Fix symbol aliases. Fixes PR8251. 
llvm-svn: 115909
 2010-10-07 06:29:33 +00:00
Michael J. Spencer
b6c9623247 test: Fix binary stdin issues with coff-dump on Windows. 
llvm-svn: 115908
 2010-10-07 06:29:21 +00:00
Jim Grosbach
1e2566c20d Allow use of the 16-bit literal move instruction in CMOVs for ARM mode. 
llvm-svn: 115884
 2010-10-07 00:42:42 +00:00
Rafael Espindola
ed469a30f0 Get binding and visibility info from the the alias, but Type from the symbol 
being aliased.

llvm-svn: 115836
 2010-10-06 21:02:29 +00:00
Rafael Espindola
6283a4a478 If a symbol is global, reloc against it even if it is in a mergeable section. 
llvm-svn: 115817
 2010-10-06 19:27:21 +00:00
Rafael Espindola
d085e53b36 Make sure weak symbols are listed after the local ones. 
llvm-svn: 115795
 2010-10-06 16:47:31 +00:00
Rafael Espindola
0c327e6e77 Correctly handle GOTPCREL relocations. 
llvm-svn: 115793
 2010-10-06 16:23:36 +00:00
Evan Cheng
6fbb6dea7c - Add TargetInstrInfo::getOperandLatency() to compute operand latencies. This 
allow target to correctly compute latency for cases where static scheduling
  itineraries isn't sufficient. e.g. variable_ops instructions such as
  ARM::ldm.
  This also allows target without scheduling itineraries to compute operand
  latencies. e.g. X86 can return (approximated) latencies for high latency
  instructions such as division.
- Compute operand latencies for those defined by load multiple instructions,
  e.g. ldm and those used by store multiple instructions, e.g. stm.

llvm-svn: 115755
 2010-10-06 06:27:31 +00:00
Chris Lattner
0bc415a491 Generalize tblgen's dag parsing logic to handle arbitrary expressions 
as the operator of the dag.  Specifically, this allows parsing things
like (F.x 4) in addition to just (a 4).

Unfortunately, this runs afoul of an idiom being used by llvmc.  It
is using dags like (foo [1,2,3]) to represent a list of stuff being
passed into foo.  With this change, this is parsed as a [1,2,3] 
subscript on foo instead of being the first argument to the dag.
Cope with this in the short term by requiring a "-llvmc-temp-hack"
argument to tblgen to get the old parsing behavior.

llvm-svn: 115742
 2010-10-06 04:55:48 +00:00
Chris Lattner
a4ec3f20fd rename add some comments. 
llvm-svn: 115741
 2010-10-06 04:37:17 +00:00
Chris Lattner
a61d41e1da filecheckize 
llvm-svn: 115740
 2010-10-06 04:36:30 +00:00
Chris Lattner
84846b71af remove the !nameconcat tblgen feature. It "shorthand" and only used in 4 places 
where !cast is just as short.

llvm-svn: 115722
 2010-10-06 00:19:21 +00:00
Rafael Espindola
8c7f9745de Use a relocation against the symbol if it is a PLT and the symbol is in another 
section. Common because of linkonce sections.

llvm-svn: 115718
 2010-10-05 23:57:26 +00:00
Chris Lattner
3357066875 enhance tblgen to support anonymous defm's, use this to 
simplify the X86 CMOVmr's.

llvm-svn: 115702
 2010-10-05 22:51:56 +00:00
Rafael Espindola
e2bc98a2b2 Implement more alias cases. 
llvm-svn: 115699
 2010-10-05 22:26:43 +00:00
Bill Wendling
4938e4d00a PSHUFW is in SSE, not SSSE3. 
llvm-svn: 115691
 2010-10-05 21:58:12 +00:00
Chris Lattner
ca34143ddd Replace a gross hack (the MOV64ri_alt instruction) with a slightly less 
gross hack (having the asmmatcher handle the alias).

llvm-svn: 115685
 2010-10-05 21:09:45 +00:00
Rafael Espindola
5762077d52 Don't crash in a strange .size directive. 
llvm-svn: 115684
 2010-10-05 21:02:45 +00:00
Michael J. Spencer
19b6962abb MC-COFF: Fix (PR8278) temporary symbol relocations. 
llvm-svn: 115656
 2010-10-05 19:48:03 +00:00
Rafael Espindola
0b536fb0fb Add support for a fill value in the .zero directive. 
llvm-svn: 115655
 2010-10-05 19:42:57 +00:00
Rafael Espindola
f850cfbc16 Implement a simple alias case and refactor the code a bit so that the 
isInSymtab and isLocal logic in the two loops don't get easily out of sync.

llvm-svn: 115643
 2010-10-05 18:01:23 +00:00
Michael J. Spencer
26a49596d7 test/COFF: Fix symbol indexes and names. Update tests to match. 
llvm-svn: 115642
 2010-10-05 17:57:08 +00:00
Michael J. Spencer
723b94923a test/COFF: Remove temp file usage. 
llvm-svn: 115641
 2010-10-05 17:56:56 +00:00
Michael J. Spencer
513daaafdd test/coff-dump: Support reading from stdin. 
llvm-svn: 115640
 2010-10-05 17:56:46 +00:00
Michael J. Spencer
8d37ea7265 Cleanup Whitespace. 
llvm-svn: 115639
 2010-10-05 17:56:37 +00:00
Owen Anderson
20b48697cd Use a more efficient lowering of uint64_t --> float that can take advantage of hardware signed integer conversion without 
having to do a double cast (uint64_t --> double --> float).  This is based on the algorithm from compiler_rt's __floatundisf
for X86-64.

llvm-svn: 115634
 2010-10-05 17:24:05 +00:00
Rafael Espindola
e829a55e8e Produce a undefined reference to _GLOBAL_OFFSET_TABLE_ when needed. 
llvm-svn: 115623
 2010-10-05 15:48:37 +00:00
Rafael Espindola
9cd97ce8ed Tests that now pass. 
llvm-svn: 115622
 2010-10-05 15:43:32 +00:00
NAKAMURA Takumi
33e956ce63 test/CodeGen/X86/atomic_op.ll: Rename @main to @func. Extra sequences will be inserted to @main as prologue on cygming, to fail. 
llvm-svn: 115611
 2010-10-05 11:16:24 +00:00
Sean Callanan
be873cd53a Added a testcase for the ENTER instruction. 
llvm-svn: 115580
 2010-10-05 00:21:40 +00:00
Bill Wendling
b94ade249a The pshufw instruction came about in MMX2 when SSE was introduced. Don't place 
it in with the SSSE3 instructions.

Steward! Could you place this chair by the aft sun deck? I'm trying to get away
from the Astors. They are such boors!

llvm-svn: 115552
 2010-10-04 20:24:01 +00:00
Rafael Espindola
dcac047c7f Implement ELF::R_X86_64_GOTPCREL. 
llvm-svn: 115547
 2010-10-04 19:51:39 +00:00
Rafael Espindola
f7e642c0da Produce a R_X86_64_PLT32 when needed. 
llvm-svn: 115541
 2010-10-04 19:04:13 +00:00
Rafael Espindola
08361a0329 Produce a R_X86_64_GOT32 when needed. 
llvm-svn: 115537
 2010-10-04 18:44:25 +00:00
Jan Wen Voung
9c76bbf90a Add hook in MCSection to decide when to use "optimized nops", for each 
section kind. Previously, optimized nops were only used for MachO.
Also added tests for ELF and COFF.

llvm-svn: 115523
 2010-10-04 17:32:41 +00:00
Rafael Espindola
491c3f9ef7 Include the section address in the computation of the relocation. 
llvm-svn: 115509
 2010-10-04 15:59:01 +00:00
Rafael Espindola
ce6ea76503 Correctly compute the relocation when it is not in the first fragment. 
llvm-svn: 115506
 2010-10-04 15:28:43 +00:00
Anton Korobeynikov
f1acea8615 va_args support for Win64. 
Patch by Cameron!

llvm-svn: 115480
 2010-10-03 22:52:07 +00:00
Anton Korobeynikov
31b3b2ca41 Properly emit stack probe on win64 (for non-mingw targets). 
Based on the patch by Cameron Esfahani!

llvm-svn: 115479
 2010-10-03 22:02:38 +00:00
Eli Friedman
35432e5685 Add 3DNowA instructions. 
llvm-svn: 115477
 2010-10-03 20:23:13 +00:00
Chris Lattner
f58652610d unbreak buildbot 
llvm-svn: 115476
 2010-10-03 20:02:48 +00:00
Chris Lattner
d03783eaf2 the immediate field of pshufw is actually an 8-bit field, not a 8-bit field that is sign extended. This fixes PR8288 
llvm-svn: 115473
 2010-10-03 19:09:13 +00:00
Chris Lattner
4599fd89fd add support for the prefetch/prefetchw instructions, move femms into 
the right file.  The assembler supports all the 3dnow instructions now,
but not the "3dnowa" ones.

llvm-svn: 115468
 2010-10-03 18:42:30 +00:00
Chris Lattner
6d6f84f99c what the heck, add support for the rest of the 3dNow! binary operations. 
llvm-svn: 115467
 2010-10-03 18:24:18 +00:00
Chris Lattner
8174253484 Implement support for the bizarre 3DNow! encoding (which is unlike anything 
else in X86), and add support for pavgusb.  This is apparently the
only instruction (other than movsx) that is preventing ffmpeg from building
with clang.

If someone else is interested in banging out the rest of the 3DNow! 
instructions, it should be quite easy now.

llvm-svn: 115466
 2010-10-03 18:08:05 +00:00
Bill Wendling
f1552256a1 Add test to make sure that the MMX intrinsic calls make it out the other end in 
tact.

llvm-svn: 115458
 2010-10-03 03:30:30 +00:00
Bill Wendling
0090e3b6a1 Auto-upgrade tests for the new MMX intrinsic calls. 
llvm-svn: 115456
 2010-10-03 01:12:20 +00:00
Rafael Espindola
e209fd8ab7 Implement a very basic PIC case. 
llvm-svn: 115454
 2010-10-03 00:46:57 +00:00
Chris Lattner
3c29a2b776 fix a regression introduced in r115243, in which the instruction 
backing int_x86_ssse3_pshuf_w got removed.  This caused PR8280.

llvm-svn: 115422
 2010-10-02 21:32:15 +00:00
Chris Lattner
0f389ed003 actually, move the elf tests into the existing elf dir. 
llvm-svn: 115416
 2010-10-02 18:53:48 +00:00
Chris Lattner
1a96333869 consolidate ELF tests into asmparser tests. 
llvm-svn: 115415
 2010-10-02 18:52:57 +00:00
Chris Lattner
3528fce592 move ARM MC tests up one level. 
llvm-svn: 115414
 2010-10-02 18:52:05 +00:00
Bill Wendling
1f47b01f08 Need to specify SSE4 for machines which don't have SSE4. The code checked for is generated by SSE4. Otherwise, we get something else. 
llvm-svn: 115352
 2010-10-01 21:39:35 +00:00