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Commit Graph

116594 Commits

Author SHA1 Message Date
Pete Cooper
2c1b4fde0b [ARM] Transfer the internal flag in thumb2 size reduction.
Converting from t2LDRs to tLDRr caused the shift argument to drop the internal flag.  This would then throw machine verifier errors.

Unfortunately i'm having trouble reducing a test case.  I'm going to keep trying, but so far its a scary combination of machine sinking, an 'and i1', loads feeding loads, and a bunch of code which shouldn't change IT block formation, but does.  Its not useful to commit a test in that state as we have no way of knowing if it even hits this code reliably in future.

rdar://problem/20752113

llvm-svn: 236333
2015-05-01 18:57:32 +00:00
Douglas Katzman
ff0ea9775b Move unit test into anonymous namespace as per convention.
llvm-svn: 236332
2015-05-01 18:51:06 +00:00
Alex Lorenz
9cbd820929 YAML: Fix the output of sequences that contain flow sequences.
This patch fixes a bug where the YAML Output class emitted
a sequence of flow sequences without the '-' characters.
Before:
  
  seq:
    [ a, b ]
    [ c, d ]

After:

  seq:
    - [ a, b ]
    - [ c, d ]


Reviewers: Justin Bogner

Differential Revision: http://reviews.llvm.org/D9206

llvm-svn: 236329
2015-05-01 18:34:25 +00:00
Alex Lorenz
5814edb368 Update YamlIO documentation for the ScalarTraits class.
This patch adds the missing context parameter to the
input and output methods in ScalarTraits.

Differential Revision: http://reviews.llvm.org/D9173

llvm-svn: 236328
2015-05-01 18:20:23 +00:00
Peter Collingbourne
daa528e28b ARM: Align functions containing Thumb-2 jump tables to 4 bytes.
Functions with jump tables need an alignment of 4 because they use the ADR
instruction, which aligns the PC to 4 bytes before adding an offset.

Differential Revision: http://reviews.llvm.org/D9424

llvm-svn: 236327
2015-05-01 18:05:59 +00:00
Diego Novillo
f19a3e9172 Fix infinite recursion in ScaledNumber::toInt.
Patch from dexonsmith. The call to toInt() was calling compareTo() which
in some cases would call back to toInt(), creating an infinite loop.

Fixed by simplifying the logic in compareTo() to avoid the co-recursion.

llvm-svn: 236326
2015-05-01 17:59:15 +00:00
James Y Knight
3157c00641 [Sparc] Repair fixups in little endian mode.
Differential Revision: http://reviews.llvm.org/D9434

llvm-svn: 236324
2015-05-01 17:13:02 +00:00
Douglas Katzman
e416edad83 Fix omission from adding sparcel (original http://reviews.llvm.org/D9263)
"obviously" it needs to go in parseArch *and* getArchTypeForLLVMName.

Differential Revision: http://reviews.llvm.org/D9436

llvm-svn: 236322
2015-05-01 16:49:58 +00:00
Benjamin Kramer
9558252e8e Remove std::move on return of temporary.
No functionality change. Found by -Wpessimizing-move.

llvm-svn: 236318
2015-05-01 15:26:22 +00:00
Benjamin Kramer
10a4c8f0b6 Remove std::move on return of temporary.
No functionality change. Found by -Wpessimizing-move.

llvm-svn: 236317
2015-05-01 15:25:29 +00:00
Benjamin Kramer
486636e5e7 Remove std::move on return when it could prevent copy elision.
Found by -Wpessimizing-move, no functional change. The APFloat and
PassManager change doesn't affect codegen as returning a by-value
argument will always result in a move.

llvm-svn: 236316
2015-05-01 15:16:11 +00:00
Toma Tabacu
f00cf4968b [mips] [IAS] Fix error messages for using LI with 64-bit immediates.
Summary:
LI should never accept immediates larger than 32 bits.
The additional Is32BitImm boolean also paves the way for unifying the functionality that LA and LI have in common.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D9289

llvm-svn: 236313
2015-05-01 12:19:27 +00:00
Niels Ole Salscheider
1fd7063a03 [CMake] Also search for prefixed versions of ld.gold
llvm-svn: 236312
2015-05-01 11:58:30 +00:00
Toma Tabacu
a7771fd9f0 [mips] [IAS] Slightly improve shift instruction generation in expandLoadImm.
Summary:
Generate one DSLL32 of 0 instead of two consecutive DSLL of 16.
In order to do this I had to change createLShiftOri's template argument from a bool to an unsigned.

This also gave me the opportunity to rewrite the mips64-expansions.s test, as it was testing the same cases multiple times and skipping over other cases.
It was also somewhat unreadable, as the CHECK lines were grouped in a huge block of text at the beginning of the file.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8974

llvm-svn: 236311
2015-05-01 10:26:47 +00:00
Simon Pilgrim
eb80927c6c [SelectionDAG] Unary vector constant folding integer legality fixes
This patch fixes issues with vector constant folding not correctly handling scalar input operands if they require implicit truncation - this was tested with llvm-stress as recommended by Patrik H Hagglund.

The patch ensures that integer input scalars from a build vector are correctly truncated before folding, and that constant integer scalar results are promoted to a legal type before inclusion in the new folded build vector.

I have added another crash test case and also a test for UINT_TO_FP / SINT_TO_FP using an non-truncated scalar input, which was failing before this patch.

Differential Revision: http://reviews.llvm.org/D9282

llvm-svn: 236308
2015-05-01 08:20:04 +00:00
Tom Stellard
b37aaa4862 R600/SI: Add VCC as an implict def of SI_KILL
When SI_KILL has a register operand, its lowered form writes to vcc.

llvm-svn: 236307
2015-05-01 03:44:09 +00:00
Tom Stellard
6da1425028 R600/SI: Fix verifier errors from the SIAnnotateControlFlow pass
This pass was generating 'Instruction does not dominate all uses!'
errors for programs which had loops with a condition variable that
depended on the result of a phi instruction from outside of the loop.

The pass was inserting new phi nodes outside of the loop which used values
defined inside the loop.

http://bugs.freedesktop.org/show_bug.cgi?id=90056

llvm-svn: 236306
2015-05-01 03:44:08 +00:00
Quentin Colombet
a179ebf75a [ARM][TEST] Strengthen test against smarter reg alloc.
Follow-up of r236247.

rdar://problem/20770899

llvm-svn: 236296
2015-05-01 00:45:55 +00:00
Pete Cooper
9851cd43b2 [ARM] optimizeSelect should clear kill flags.
If we move an instruction from one block down to a MOVC and predicate it,
then the original instruction could be moved in to a loop.  In this case,
its invalid for any kill flags to remain on there.

Fails with -verfy-machineinstrs.

rdar://problem/20752113

llvm-svn: 236290
2015-04-30 23:57:47 +00:00
Justin Bogner
6f44b3969b InstrProf: Instrumenter support for setting profile output from command line
This change is the second of 3 patches to add support for specifying
the profile output from the command line via -fprofile-instr-generate=<path>,
where the specified output path/file will be overridden by the
LLVM_PROFILE_FILE environment variable.

This patch adds the necessary support to the llvm instrumenter, specifically
a new member of GCOVOptions for clang to save the specified filename, and
support for calling the new compiler-rt interface from __llvm_profile_init.

Patch by Teresa Johnson. Thanks!

llvm-svn: 236288
2015-04-30 23:49:23 +00:00
Matt Arsenault
8e960d3ffb Fix typo
llvm-svn: 236283
2015-04-30 23:20:56 +00:00
Pete Cooper
2c871b35a8 Commute the internal flag on MachineOperands.
When commuting a thumb instruction in the size reduction pass, thumb
instructions are represented as a bundle and so some operands may be marked
as internal.  The internal flag has to move with the operand when commuting.

This test is sensitive to register allocation so can't specifically check that
this error was happening, but so long as it continues to pass with -verify then
hopefully its still ok.

rdar://problem/20752113

llvm-svn: 236282
2015-04-30 23:14:14 +00:00
Davide Italiano
896d3ac959 [Object] Teach Object and llvm-objdump about ".hidden"
Differential Revision:	http://reviews.llvm.org/D9416
Reviewed by:	rafael

llvm-svn: 236279
2015-04-30 23:08:53 +00:00
Richard Trieu
b05d298163 Fix -Wpessimizing-move warnings by removing std::move calls.
llvm-svn: 236278
2015-04-30 23:07:00 +00:00
Rafael Espindola
782fe11d94 Remove unnecessary break.
llvm-svn: 236275
2015-04-30 22:41:12 +00:00
Quentin Colombet
43702a31a2 [AArch64] Fix bad register class constraint in fast-isel for TST instruction.
rdar://problem/20748715

llvm-svn: 236273
2015-04-30 22:27:20 +00:00
Pete Cooper
90ff562042 Don't always apply kill flag in thumb2 ABS pseudo expansion.
The expansion for t2ABS was always setting the kill flag on the rsb instruction.
It should instead only be set on rsb if it was set on the original ABS instruction.

rdar://problem/20752113

llvm-svn: 236272
2015-04-30 22:15:59 +00:00
Reid Kleckner
6e67433faf [X86] Use 4 byte preferred aggregate alignment on Win32
This helps reduce the frequency of stack realignment prologues in 32-bit
X86 Windows code. Before this change and the corresponding clang change,
we would take the max of the type preferred alignment and the explicit
alignment on the alloca.

If you don't override aggregate alignment in datalayout, you get a
default of 8. This dates back to 2007 / r34356, and changing it seems
prohibitively difficult at this point.

llvm-svn: 236270
2015-04-30 22:11:59 +00:00
Matthias Braun
bfbcc9d6b2 InstCombineSimplifyDemanded: Remove nsw/nuw flags when optimizing demanded bits
When optimizing demanded bits of the operands of an Add we have to
remove the nsw/nuw flags as we have no guarantee anymore that we don't
wrap.  This is legal here because the top bit is not demanded.  In fact
this operaion was already performed but missed in the case of an Add
with a constant on the right side.  To fix this this patch refactors the
code to unify the code paths in SimplifyDemandedUseBits() handling of
Add/Sub:

- The transformation of Add->Or is removed from the simplify demand
  code because the equivalent transformation exists in
  InstCombiner::visitAdd()
- KnownOnes/KnownZero are not adjusted for Add x, C anymore as
  computeKnownBits() already performs these computations.
- The simplification of the operands is unified. In this new version
  constant on the right side of a Sub are shrunk now as I could not find
  a reason why not to do so.
- The special case for clearing nsw/nuw in ShrinkDemandedConstant() is
  not necessary anymore as the caller does that already.

Differential Revision: http://reviews.llvm.org/D9415

llvm-svn: 236269
2015-04-30 22:05:30 +00:00
Matthias Braun
dd934add12 InstCombine: Move Sub->Xor rule from SimplifyDemanded to InstCombine
The rule that turns a sub to xor if the LHS is 2^n-1 and the remaining bits
are known zero, does not use the demanded bits at all: Move it to the
normal InstCombine code path.

Differential Revision: http://reviews.llvm.org/D9417

llvm-svn: 236268
2015-04-30 22:04:26 +00:00
Rafael Espindola
a0b480ab97 Simplify the creation of compressed debug sections.
This is actually fairly simple in the current code layout: Check if we should
compress just before writing out and everything else just works.

This removes the last case in which the object writer was creating a
fragment.

llvm-svn: 236267
2015-04-30 21:51:58 +00:00
Andrea Di Biagio
50f551d703 Fix comment in test. NFC.
llvm-svn: 236262
2015-04-30 21:22:28 +00:00
Rafael Espindola
4f365e26b8 Replace unreachable code with llvm_unreachable.
llvm-svn: 236261
2015-04-30 21:20:06 +00:00
Rafael Espindola
5eb4acbada Don't create a MCSectionData when we don't have to.
llvm-svn: 236260
2015-04-30 21:10:06 +00:00
Andrea Di Biagio
2fddd75212 Fix for PR23103. Correctly propagate the 'IsUndef' flag to the register operands of a commuted instruction.
Revision 220239 exposed a latent bug in method
'TargetInstrInfo::commuteInstruction'. When commuting the operands of a machine
instruction, method 'commuteInstruction' didn't correctly propagate the
'IsUndef' flag to the register operands of the new (commuted) instruction.

Before this patch, the following instruction:
  %vreg4<def> = VADDSDrr  %vreg14, %vreg5<undef>; FR64:%vreg4,%vreg14,%vreg5

was wrongly converted by method 'commuteInstruction' into:
  %vreg4<def> = VADDSDrr  %vreg5, %vreg14<undef>; FR64:%vreg4,%vreg5,%vreg14

The correct instruction should have been:
  %vreg4<def> = VADDSDrr  %vreg5<undef>, %vreg14; FR64:%vreg4,%vreg5,%vreg14

This patch fixes the problem in method 'TargetInstrInfo::commuteInstruction'.
When swapping the operands of a machine instruction, we now make sure that
'IsUndef' flags are correctly set.
Added test case 'pr23103.ll'.

Differential Revision: http://reviews.llvm.org/D9406

llvm-svn: 236258
2015-04-30 21:03:29 +00:00
Rafael Espindola
28b1577052 Avoid an extra loop over the sections.
Add string to the section header string table as we add sections.

llvm-svn: 236257
2015-04-30 20:57:14 +00:00
Rafael Espindola
bea43714cb Make the section table a member of ELFObjectWriter.
This avoids passing it around and lets us build a small helper to add
a section to the table.

llvm-svn: 236255
2015-04-30 20:53:27 +00:00
Rafael Espindola
52d84b33c1 Nothing inherits from this, drop the protected:
llvm-svn: 236253
2015-04-30 20:37:36 +00:00
Kevin Enderby
dfd6ce5dd4 For llvm-objdump, with the -archive-headers and -macho options, use the -non-verbose
option to print the archive headers using raw numeric values.  Also add the -archive-member-offsets
for use with these to also trigger printing of the offset of the archive member from the start
of the archive.

llvm-svn: 236252
2015-04-30 20:30:42 +00:00
Douglas Katzman
c5f5be748a Exhaustively test all triples in TripleTest.
Iteration over all permutations didn't really work,
due to evolution of the underlying enums.

Differential Revision: http://reviews.llvm.org/D9057

llvm-svn: 236251
2015-04-30 20:08:44 +00:00
Matt Arsenault
c3f1d1307f Mips: Remove dead declaration
llvm-svn: 236250
2015-04-30 19:35:43 +00:00
Matt Arsenault
07ee8a89f5 MachineVerifier: Don't crash if MachineOperand has no parent
If you somehow added a MachineOperand to an instruction
that did not have the parent set, the verifier would
crash since it attempts to use the operand's parent.

llvm-svn: 236249
2015-04-30 19:35:41 +00:00
Pete Cooper
54ecccfd00 Don't rewrite jumps to empty BBs to landing pads.
In the test case here, the 'unreachable' BB was removed by BranchFolding because its empty.

It then rewrote the jump from 'entry' to jump to its fallthrough, which was a landing pad.

This results in 'entry' jumping to 2 different landing pads, which fails the machine verifier.

rdar://problem/20750162

llvm-svn: 236248
2015-04-30 18:58:23 +00:00
Quentin Colombet
bc9c5a5af1 [ARM] Do not generate invalid encoding for stack adjust, even if this is just
temporary.

Because of that:
1. The machine verifier was complaining on such code.
2. The generate code worked just because the thumb reduction size pass fixed the
opcode.

rdar://problem/20749824

llvm-svn: 236247
2015-04-30 18:52:49 +00:00
Tim Northover
db249b5492 AArch64: add BFC alias for the BFI/BFM instructions.
Unlike 32-bit ARM, AArch64 can use wzr/xzr to implement this without the need
for a separate instruction.

rdar://18679590

llvm-svn: 236245
2015-04-30 18:28:58 +00:00
Reid Kleckner
f16b28762e Add a note about permitting default member initializers
Use them in WinEHPrepare so that we can spot any toolchain bugs that
come up.

llvm-svn: 236244
2015-04-30 18:17:12 +00:00
Jan Vesely
72f354c922 Reinstate revisions r234755, r234759, r234760
changes:
  Don't apply on hexagon and NVPTX since they no longer claim to support UADDO/USUBO
  Add location to getConstant
  Drop comment about the ops being turned into expand

llvm-svn: 236240
2015-04-30 17:15:56 +00:00
Daniel Berlin
f6799ad1b8 Move equality function for AliasAnalysis::Location from DenseMapInfo to Location struct so it can be used in other types of maps
llvm-svn: 236237
2015-04-30 16:15:07 +00:00
Rafael Espindola
2375592ce3 Write sections mostly in one pass.
During ELF writing, there is no need to further relax the sections, so we
should not be creating fragments. This patch avoids doing so in all cases
but debug section compression (that is next).

Also, the ELF format is fairly simple to write. We can do a single pass over
the sections to write them out and compute the section header table.

llvm-svn: 236235
2015-04-30 14:21:49 +00:00
Aaron Ballman
abe3091fb7 Silencing an "enumeral and non-enumeral type in conditional expression" warning; NFC.
llvm-svn: 236234
2015-04-30 14:03:12 +00:00