1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-29 23:12:55 +01:00
Commit Graph

3106 Commits

Author SHA1 Message Date
Duraid Madina
2f8f3f018d clean up some warnings
llvm-svn: 21590
2005-04-27 11:57:39 +00:00
Duraid Madina
90bcae7fd2 constmul bugfix: multiply by 27611 was broken
llvm-svn: 21564
2005-04-26 09:42:50 +00:00
Duraid Madina
675a0b9769 clean up the code! (oops) lots more cleaning left, however.
llvm-svn: 21563
2005-04-26 08:43:47 +00:00
Duraid Madina
ee826ec8f6 * Add code to reduce multiplies by constant integers to shifts, adds and
subtracts. This is a very rough and nasty implementation of Lefevre's
  "pattern finding" algorithm. With a few small changes though, it should
  end up beating most other methods in common use, regardless of the size
  of the constant (currently, it's often one or two shifts worse)

  TODO: rewrite it so it's not hideously ugly (this is a translation from
        perl, which doesn't help ;)
        bypass most of it for multiplies by 2^n+1
	(eventually) teach it that some combinations of shift+add are
	cheaper than others (e.g. shladd on ia64, scaled adds on alpha)
	get it to try multiple booth encodings in search of the cheapest
	routine
	make it work for negative constants

  This is hacked up as a DAG->DAG transform, so once I clean it up I hope
  it'll be pulled out of here and put somewhere else. The only thing backends
  should really have to worry about for now is where to draw the line
  between using this code vs. going ahead and doing an integer multiply
  anyway.

llvm-svn: 21560
2005-04-26 07:23:02 +00:00
Reid Spencer
e952b16f37 Shut GCC 4.0 up about classes that have virtual functions but a non-virtual
destructor. Just add the do-nothing virtual destructor.

llvm-svn: 21524
2005-04-25 02:55:55 +00:00
Misha Brukman
b3e2f08638 Convert tabs to spaces
llvm-svn: 21457
2005-04-22 18:06:01 +00:00
Misha Brukman
66d3c6e020 Convert tabs to spaces
llvm-svn: 21452
2005-04-22 17:54:37 +00:00
Reid Spencer
868f3fb2e0 Implement the --enable-targets= feature of the configure script. The make
variable TARGETS_TO_BUILD is used to determine which targets in lib/Target
are built and which libraries are linked into llc. This effectively
implements the feature. One item remains: disabling targets in the dejagnu
test suite.

llvm-svn: 21450
2005-04-22 17:20:11 +00:00
Andrew Lenharth
25a03c00c7 keep track of max depth stats
llvm-svn: 21446
2005-04-22 13:35:18 +00:00
Tanya Lattner
3f4d35ca74 Updated dependence analyzer. Fixed numerous bugs. Same stage scheduling, etc.
llvm-svn: 21444
2005-04-22 06:32:48 +00:00
Misha Brukman
bf3f6181fd * Remove trailing whitespace
* Convert tabs to spaces

llvm-svn: 21426
2005-04-21 23:38:14 +00:00
Misha Brukman
1fef885677 Remove trailing whitespace
llvm-svn: 21425
2005-04-21 23:30:14 +00:00
Misha Brukman
1fdf39f2ea Remove trailing whitespace
llvm-svn: 21424
2005-04-21 23:13:11 +00:00
Misha Brukman
933cdaf254 Remove trailing whitespace
llvm-svn: 21422
2005-04-21 22:55:34 +00:00
Chris Lattner
208da25af0 Match another form of eqv
llvm-svn: 21413
2005-04-21 21:09:11 +00:00
Chris Lattner
8d813a7d51 Handle stores of global address as stores of immediates. Instead of:
test1:
        movl $N, %eax
        movl %eax, G
        ret

emit:

test1:
        movl $N, G
        ret

llvm-svn: 21407
2005-04-21 19:11:03 +00:00
Chris Lattner
706775467b Handle (store &GV -> mem) as a store immediate. This often occurs for
printf format strings and other stuff.  Instead of generating this:

        movl $l1__2E_str_1, %eax
        movl %eax, (%esp)

we now emit:

        movl $l1__2E_str_1, (%esp)

llvm-svn: 21406
2005-04-21 19:03:24 +00:00
Misha Brukman
e096a50cb7 Remove trailing whitespace, patch by Markus Oberhumer.
llvm-svn: 21379
2005-04-20 16:05:03 +00:00
Chris Lattner
3d4612c54c Add completely untested support for mtcrf/mfcrf encoding
llvm-svn: 21353
2005-04-19 05:41:52 +00:00
Chris Lattner
e6f861f92c switch over the rest of the formats that use RC to use isDOT
llvm-svn: 21352
2005-04-19 05:21:30 +00:00
Chris Lattner
082ca8fcab Convert the XForm instrs and XSForm instruction over to use isDOT
llvm-svn: 21351
2005-04-19 05:15:18 +00:00
Chris Lattner
3fdfd4e009 Now that the ppc64 and vmx operands of I are always 0, forward substitute
them away.

llvm-svn: 21350
2005-04-19 05:05:22 +00:00
Chris Lattner
e6f7713f03 convert over bform and iform instructions
llvm-svn: 21349
2005-04-19 05:00:59 +00:00
Chris Lattner
3ae0832381 Convert over DForm and DSForm instructions
llvm-svn: 21348
2005-04-19 04:59:28 +00:00
Chris Lattner
4ecf523af4 Convert XLForm and XForm instructions over to use PPC64 when appropriate.
llvm-svn: 21347
2005-04-19 04:51:30 +00:00
Chris Lattner
6a2abe8591 Convert XO XS and XFX forms to use isPPC64
llvm-svn: 21346
2005-04-19 04:40:07 +00:00
Chris Lattner
3cfa7a24cb Turn PPC64 and VMX into classes that can be added to instructions instead of
bits that must be passed up the inheritance hierarchy.  Convert MForm and AForm
instructions over

llvm-svn: 21345
2005-04-19 04:32:54 +00:00
Nate Begeman
3b1c0df702 Next round of PPC CR optimizations. For the following code:
int %bar(float %a, float %b, float %c, float %d) {
entry:
    %tmp.1 = setlt float %a, %d
    %tmp.2 = setlt float %b, %d
    %or = or bool %tmp.1, %tmp.2
    %tmp.3 = setgt float %c, %d
    %tmp.4 = or bool %or, %tmp.3
    %tmp.5 = and bool %tmp.4, true
    %retval = cast bool %tmp.5 to int
    ret int %retval
}

We now emit:

_bar:
.LBB_bar_0:     ; entry
        fcmpu cr0, f1, f4
        fcmpu cr1, f2, f4
        cror 0, 0, 4
        fcmpu cr1, f3, f4
        cror 28, 0, 5
        mfcr r2
        rlwinm r3, r2, 29, 31, 31
        blr

Instead of:

_bar:
.LBB_bar_0:     ; entry
        fcmpu cr7, f1, f4
        mfcr r2
        rlwinm r2, r2, 29, 31, 31
        fcmpu cr7, f2, f4
        mfcr r3
        rlwinm r3, r3, 29, 31, 31
        or r2, r2, r3
        fcmpu cr7, f3, f4
        mfcr r3
        rlwinm r3, r3, 30, 31, 31
        or r3, r2, r3
        blr

llvm-svn: 21321
2005-04-18 07:48:09 +00:00
Nate Begeman
85cd65b389 Change codegen for setcc to read the bit directly out of the condition
register.  Added support in the .td file for the g5-specific variant
  of cr -> gpr moves that executes faster, but we currently don't
  generate it.

llvm-svn: 21314
2005-04-18 02:43:24 +00:00
Chris Lattner
a1fd64a073 Handle ExternalSymbol operands in the PPC JIT
llvm-svn: 21312
2005-04-18 00:46:10 +00:00
Nate Begeman
ecb5b5c028 Make pattern isel default for ppc
Add new ppc beta option related to using condition registers
Make pattern isel control flag (-enable-pattern-isel) global and tristate
  0 == off
  1 == on
  2 == target default

llvm-svn: 21309
2005-04-15 22:12:16 +00:00
Andrew Lenharth
f091300df2 fix calls
llvm-svn: 21303
2005-04-14 17:34:20 +00:00
Andrew Lenharth
23a5d0bba4 a 21264 fix, and fix the operator precidence on an and -> zap check (should fix hundreds of test cases
llvm-svn: 21302
2005-04-14 16:24:00 +00:00
Duraid Madina
0c40c548c0 print negative 64 bit immediates as negative numbers, makes things a little
easier on the eyes, not that numbers like 18446744073709541376 are bad or
anything

llvm-svn: 21300
2005-04-14 10:08:01 +00:00
Duraid Madina
b8dfae92e9 oops, this stopped us turning movl r4=0xFFFFFFFF;; and rX, r4 into zxt4
llvm-svn: 21299
2005-04-14 10:06:35 +00:00
Nate Begeman
604895b03c Implement multi-way branches through logical ops on condition registers.
This can generate considerably shorter code, reducing the size of crafty
by almost 1%.  Also fix the printing of mcrf.  The code is currently
disabled until it gets a bit more testing, but should work as-is.

llvm-svn: 21298
2005-04-14 09:45:08 +00:00
Duraid Madina
eb4c15b42c we have zextloads, not sextloads!
llvm-svn: 21296
2005-04-14 08:37:32 +00:00
Nate Begeman
b707ec16b4 Add the necessary support to codegen condition register logical ops with
register allocated condition registers.  Make sure that the printed
  output is gas compatible.

llvm-svn: 21295
2005-04-14 03:20:38 +00:00
Nate Begeman
99a9840b56 Start allocating condition registers. Almost all explicit uses of CR0 are
now gone.  Next step is to get rid of the remaining ones and then start
allocating bools to CRs where appropriate.

llvm-svn: 21294
2005-04-13 23:15:44 +00:00
Nate Begeman
ae49d52006 Implement the fold shift X, zext(Y) -> shift X, Y at the target level,
where it is safe to do so.

llvm-svn: 21293
2005-04-13 22:14:14 +00:00
Nate Begeman
20b3399465 Disbale the broken fold of shift + sz[ext] for now
Move the transform for select (a < 0) ? b : 0 into the dag from ppc isel
Enable the dag to fold and (setcc, 1) -> setcc for targets where setcc
  always produces zero or one.

llvm-svn: 21291
2005-04-13 21:23:31 +00:00
Andrew Lenharth
cbf7a52768 WOW, function calls still seem to work after this.
llvm-svn: 21286
2005-04-13 17:17:28 +00:00
Andrew Lenharth
d1fee6d24a prepare for func call optimization
llvm-svn: 21285
2005-04-13 16:19:50 +00:00
Duraid Madina
b9d2d9ac63 * add the shladd instruction
* fold left shifts of 1, 2, 3 or 4 bits into adds

  This doesn't save much now, but should get a serious workout once
  multiplies by constants get converted to shift/add/sub sequences.
  Hold on! :)

llvm-svn: 21282
2005-04-13 06:12:04 +00:00
Andrew Lenharth
ec33ab6a2f add matches for SxADDL and company, as well as simplify the SxADDQ code
llvm-svn: 21281
2005-04-13 05:19:55 +00:00
Duraid Madina
67e553e521 * if ANDing with a constant of the form:
0x00000..00FFF..FF
      ^      ^
      ^      ^
    any number of
    0's followed by
    some number of
    1's

    then we use dep.z to just paste zeros over the input. For the special
    cases where this is zxt1/zxt2/zxt4, we use those instructions instead,
    because we're all about readability!!!
    that's what it's about!! readability!

  *twitch* ;D

llvm-svn: 21279
2005-04-13 04:50:54 +00:00
Andrew Lenharth
510db15268 added all flavors of zap for anding
llvm-svn: 21276
2005-04-13 03:47:03 +00:00
Chris Lattner
85c6a7bed0 Fix some mysteriously missing {}'s which cause the miscompilation of
Olden/mst, Ptrdist/bc, Obsequi, etc.

llvm-svn: 21274
2005-04-13 03:29:53 +00:00
Chris Lattner
8489ac991d remove one more occurance of this that snuck in
llvm-svn: 21271
2005-04-13 02:46:17 +00:00
Chris Lattner
5fdb103328 Remove support for ZERO_EXTEND_INREG. This pessimizes code, genering stuff
like this:

        ldah $1,1($31)
        lda $1,-1($1)
        and $0,$1,$24

instead of this:

        zap $0,252,$24

To get this back, the selector should recognize the ISD::AND case where this
happens and emit the appropriate ZAP instruction.

llvm-svn: 21270
2005-04-13 02:43:40 +00:00