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7229 Commits

Author SHA1 Message Date
Eli Friedman
30d557cc28 Make sure we don't combine a large displacement and a frame index in the same addressing mode on x86-64. It can overflow, leading to a crash/miscompile. 
<rdar://problem/9763308>

llvm-svn: 135084
 2011-07-13 21:29:53 +00:00
Eli Friedman
e0a117fbdf Refactor out checking for displacements on x86-64 addressing modes. No functionality change. Refactoring in preparation for an additional safety check in FoldOffsetIntoAddress. 
Part of <rdar://problem/9763308>.

llvm-svn: 135079
 2011-07-13 20:44:23 +00:00
Jim Grosbach
e0fc4019f9 Update MCParsedAsmOperand debug methods. 
Update the debug output interface for MCParsedAsmOperand to have a print()
method which takes an output stream argument, an << operator which invokes
the print method using the given stream, and a dump() method which prints
the operand to the dbgs() stream. This makes the interface more consistent
with the rest of LLVM, and more convenient to use at the debugger command
line.

llvm-svn: 135043
 2011-07-13 15:34:57 +00:00
Bruno Cardoso Lopes
cb49278ad6 AVX Codegen support for 256-bit versions of vandps, vandpd, vorps, vorpd, vxorps, vxorpd 
llvm-svn: 135023
 2011-07-13 01:15:33 +00:00
Bill Wendling
e6de1eeb86 Don't emit the FDE end label if the last thing emitted was a compact unwind and 
not the FDE

llvm-svn: 135020
 2011-07-13 00:49:09 +00:00
Eli Friedman
8c4106f2a5 Add an assert (which should never trigger) that triggers on a testcase I'm looking at. 
llvm-svn: 135018
 2011-07-13 00:44:29 +00:00
Bill Wendling
78fce7597f Assign variable before we test it. 
llvm-svn: 135015
 2011-07-13 00:23:39 +00:00
Bill Wendling
d61dd044e1 Fix obvious think-o. 
llvm-svn: 135014
 2011-07-13 00:20:09 +00:00
Bill Wendling
9e1528dea4 Clean up the handling of an EBP/RBP unwind frame pointer. In particular, don't 
assert when the frame pointer is -1 (i.e., the function is "frameless").

Still to do: "frameless" unwind information.

llvm-svn: 135013
 2011-07-13 00:16:14 +00:00
Evan Cheng
1346a63a0f - Eliminate MCCodeEmitter's dependency on TargetMachine. It now uses MCInstrInfo 
and MCSubtargetInfo.
- Added methods to update subtarget features (used when targets automatically
  detect subtarget features or switch modes).
- Teach X86Subtarget to update MCSubtargetInfo features bits since the
  MCSubtargetInfo layer can be shared with other modules.
- These fixes .code 16 / .code 32 support since mode switch is updated in
  MCSubtargetInfo so MC code emitter can do the right thing.

llvm-svn: 134884
 2011-07-11 03:57:24 +00:00
Evan Cheng
c9e252df68 Change createAsmParser to take a MCSubtargetInfo instead of triple, 
CPU, and feature string. Parsing some asm directives can change
subtarget state (e.g. .code 16) and it must be reflected in other
modules (e.g. MCCodeEmitter). That is, the MCSubtargetInfo instance
must be shared.

llvm-svn: 134795
 2011-07-09 05:47:46 +00:00
Eli Friedman
1f8926e94d Really force on 64bit for 64-bit targets. Should fix remaining failures on unknown x86/non-x86 targets. 
llvm-svn: 134773
 2011-07-08 23:43:01 +00:00
Eli Friedman
6de12d7388 Revert earlier unnecessary hack. Make sure we correctly force on 64bit and cmov for 64-bit targets. 
llvm-svn: 134768
 2011-07-08 23:07:42 +00:00
Evan Cheng
03af99dd82 Restore old behavior. Always auto-detect features unless cpu or features are specified. 
llvm-svn: 134757
 2011-07-08 22:30:25 +00:00
Eli Friedman
0ea2c325a9 Default 64-bit target features and SSE2 on when a triple specifies x86-64. Clean up all the other hacks which are now unnecessary. 
llvm-svn: 134753
 2011-07-08 22:16:47 +00:00
Julien Lerouge
75e462e164 Add _allrem, _aullrem and _allmul to the runtime for MSVC. 
http://llvm.org/bugs/show_bug.cgi?id=10305

llvm-svn: 134744
 2011-07-08 21:40:25 +00:00
Cameron Zwarich
c23366d357 Add an intrinsic and codegen support for fused multiply-accumulate. The intent 
is to use this for architectures that have a native FMA instruction.

llvm-svn: 134742
 2011-07-08 21:39:21 +00:00
Evan Cheng
69f14d6012 For non-x86 host, used generic as CPU name. 
llvm-svn: 134741
 2011-07-08 21:14:14 +00:00
Benjamin Kramer
85b2770a1c Plug a leak by giving the AsmParser ownership of the MCSubtargetInfo. 
Found by valgrind.

llvm-svn: 134738
 2011-07-08 21:06:23 +00:00
Evan Cheng
34f67f2dda TargetAsmParser doesn't need reference to Target. 
llvm-svn: 134721
 2011-07-08 19:33:14 +00:00
Evan Cheng
50f2d8d304 Eliminate asm parser's dependency on TargetMachine: 
- Each target asm parser now creates its own MCSubtatgetInfo (if needed).
- Changed AssemblerPredicate to take subtarget features which tablegen uses
  to generate asm matcher subtarget feature queries. e.g.
  "ModeThumb,FeatureThumb2" is translated to
  "(Bits & ModeThumb) != 0 && (Bits & FeatureThumb2) != 0".

llvm-svn: 134678
 2011-07-08 01:53:10 +00:00
Nick Lewycky
a82f7a687e Let the inline asm 'q' constraint match float, and on 64-bit double too. 
Fixes PR9602!

llvm-svn: 134665
 2011-07-08 00:19:27 +00:00
Eric Christopher
5fb023bb10 Go ahead and emit the barrier on x86-64 even without sse2. The 
processor supports it just fine.

Fixes PR9675 and rdar://9740801

llvm-svn: 134664
 2011-07-08 00:04:56 +00:00
Eric Christopher
96527f39fd Handle fpcr register. 
Part of PR10299 and rdar://9740322

llvm-svn: 134653
 2011-07-07 22:54:12 +00:00
Eric Christopher
b7597bc669 Add support for the X86 'l' constraint. 
Fixes PR10149 and rdar://9738585

llvm-svn: 134648
 2011-07-07 22:29:07 +00:00
Evan Cheng
bbed81df25 Add Mode64Bit feature and sink it down to MC layer. 
llvm-svn: 134641
 2011-07-07 21:06:52 +00:00
Evan Cheng
18acf2200c Compute feature bits at time of MCSubtargetInfo initialization. 
llvm-svn: 134606
 2011-07-07 07:07:08 +00:00
Bill Wendling
2b47bfeaa9 Use ArrayRef instead of a std::vector&. 
llvm-svn: 134595
 2011-07-07 04:42:01 +00:00
Bill Wendling
ba39846c2b Add a target hook to encode the compact unwind information. 
llvm-svn: 134577
 2011-07-07 00:54:13 +00:00
Evan Cheng
b0e0a318b7 Rename files for consistency. 
llvm-svn: 134546
 2011-07-06 22:01:53 +00:00
Bill Wendling
479007f9af Constify getCompactUnwindRegNum. 
llvm-svn: 134527
 2011-07-06 20:33:48 +00:00
Evan Cheng
dcd3ea7062 createMCInstPrinter doesn't need TargetMachine anymore. 
llvm-svn: 134525
 2011-07-06 19:45:42 +00:00
Kevin Enderby
59ba10f2ac Changed the X86 PUSH64i8 record to use the i64i8imm ParserMatchClass so that a 
push with a small constant produces a 2-byte push.

llvm-svn: 134501
 2011-07-06 17:23:46 +00:00
Evan Cheng
1112260be0 Remove the AsmWriterEmitter (unused) feature that rely on TargetSubtargetInfo. 
llvm-svn: 134457
 2011-07-06 02:02:33 +00:00
Eli Friedman
9765ae0015 Add assembler/disassembler support for non-AVX pclmulqdq. While I'm here, use proper aliases for the pclmullqlqdq and friends. PR10269. 
llvm-svn: 134424
 2011-07-05 18:21:20 +00:00
Jakob Stoklund Olesen
4d72701c7e Consistent diagnostic capitalization and redundant context elimination. 
llvm-svn: 134311
 2011-07-02 07:23:40 +00:00
Jakob Stoklund Olesen
c19c47697f Include a source location when complaining about bad inline assembly. 
Add a MI->emitError() method that the backend can use to report errors
related to inline assembly. Call it from X86FloatingPoint.cpp when the
constraints are wrong.

This enables proper clang diagnostics from the backend:

$ clang -c pr30848.c
pr30848.c:5:12: error: Inline asm output regs must be last on the x87 stack
  __asm__ ("" : "=u" (d));  /* { dg-error "output regs" } */
           ^
1 error generated.

llvm-svn: 134307
 2011-07-02 03:53:34 +00:00
Eric Christopher
7260817287 TargetConstant immediates won't be placed into registers so tighten 
up the valid constant check earlier.

rdar://9692967

llvm-svn: 134286
 2011-07-01 23:04:38 +00:00
Evan Cheng
018b2055fc Rename XXXGenSubtarget.inc to XXXGenSubtargetInfo.inc for consistency. 
llvm-svn: 134281
 2011-07-01 22:36:09 +00:00
Evan Cheng
a230202d5e Add MCSubtargetInfo target registry stuff. 
llvm-svn: 134279
 2011-07-01 22:25:04 +00:00
Eli Friedman
c3fee5e2c7 Calling-convention specifications for illegal types are no-ops. Simplify based on this. 
llvm-svn: 134264
 2011-07-01 21:33:28 +00:00
Evan Cheng
e7e74a3250 Rename TargetSubtarget to TargetSubtargetInfo for consistency. 
llvm-svn: 134259
 2011-07-01 21:01:15 +00:00
Evan Cheng
771cdf9b5d - Added MCSubtargetInfo to capture subtarget features and scheduling 
itineraries.
- Refactor TargetSubtarget to be based on MCSubtargetInfo.
- Change tablegen generated subtarget info to initialize MCSubtargetInfo
  and hide more details from targets.

llvm-svn: 134257
 2011-07-01 20:45:01 +00:00
Evan Cheng
157d40fba1 Hide the call to InitMCInstrInfo into tblgen generated ctor. 
llvm-svn: 134244
 2011-07-01 17:57:27 +00:00
Bill Wendling
6aa9fb80dc Use the correct registers on X86_64. 
llvm-svn: 134208
 2011-06-30 23:47:14 +00:00
Jakob Stoklund Olesen
8b22811785 Fix a problem with fast-isel return values introduced in r134018. 
We would put the return value from long double functions in the wrong
register.

This fixes gcc.c-torture/execute/conversion.c

llvm-svn: 134205
 2011-06-30 23:42:18 +00:00
Bill Wendling
28c3cfe015 Add target a target hook to get the register number used by the compact unwind 
encoding for the registers it knows about. Return -1 if it can't handle that
register.

llvm-svn: 134202
 2011-06-30 23:20:32 +00:00
Jakob Stoklund Olesen
074d0abb1a Tweak error messages to match GCC. Should fix gcc.target/i386/pr30848.c 
llvm-svn: 134193
 2011-06-30 21:30:30 +00:00
Evan Cheng
034261674b Fix the ridiculous SubtargetFeatures API where it implicitly expects CPU name to 
be the first encoded as the first feature. It then uses the CPU name to look up
features / scheduling itineray even though clients know full well the CPU name
being used to query these properties.

The fix is to just have the clients explictly pass the CPU name!

llvm-svn: 134127
 2011-06-30 01:53:36 +00:00
Joerg Sonnenberger
708b6e085d Recognize the xstorerng alias for VIA PadLock's xstore instruction. 
llvm-svn: 134126
 2011-06-30 01:38:03 +00:00