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Commit Graph

197458 Commits

Author SHA1 Message Date
Pushpinder Singh
339fbbae32 Remove SVN logic from find_first_existing_vc_file
As LLVM has moved from SVN to git, there is no need to
keep SVN related code. Also, this code piece was never used.

Differential Revision: https://reviews.llvm.org/D79400
2020-05-29 20:31:55 +05:30
Pushpinder Singh
760d781e95 Fix build failure when source is read only
cmake configure fails when it tries to setup target for llvm_vcsrevision_h
This happens only when source is checked out using repo in a read
only filesystem, because cmake tries to create `.git/logs/HEAD` file.

This patch:
  1. Recovers from failure gracefully.
  2. Ensures that VCSRevision.h is successfully created and updated
     in above scenarios.

Differential Revision: https://reviews.llvm.org/D79400
2020-05-29 20:04:22 +05:30
David Sherwood
9a37a41b33 [SVE] Remove getNumElements() calls in visitGetElementPtrInst
Replace calls to getNumElements() with getElementCount() in order
to avoid warnings for scalable vectors. The warnings were discovered
by this existing test:

  test/CodeGen/AArch64/sve-gep.ll

Differential revision: https://reviews.llvm.org/D80782
2020-05-29 15:26:44 +01:00
David Sherwood
d64d828469 [CodeGen] Fix warnings in LowerToPredicatedOp
When creating a new vector type based on another vector type we
should pass in the element count instead of the number of elements
and scalable flag separately.

I encountered this warning whilst compiling this test:

  CodeGen/AArch64/sve-intrinsics-int-compares.ll

Differential revision: https://reviews.llvm.org/D80621
2020-05-29 15:19:03 +01:00
Hendrik Greving
6f64591fa4 [ModuloSchedule] Allow illegal phis to be moved across stages.
Fixes a trivial but impactful bug where we did not move illegal phis across stages. This
led to incorrect mappings in certain cases.
2020-05-29 07:01:27 -07:00
Georgii Rymar
17fec031fa [llvm-readobj] - Cleanup the DwarfCFIEH::PrinterContext class. NFCI.
It would be nice to switch to `reportUniqueWarnings` from
`reportError` in this class, but first of all it needs a cleanup.

This patch:
1) Eliminates autos.
2) Removes code duplication.
3) Changes how the code works with `Expected<>`.
4) Introduces 2 new `using`s to make the code a bit shorter.

Differential revision: https://reviews.llvm.org/D80726
2020-05-29 16:45:18 +03:00
Sanjay Patel
07aa15d865 [DAGCombiner] avoid unnecessary indirection from SDNode/SDValue; NFCI 2020-05-29 09:31:52 -04:00
Igor Kudrin
c2113b68ec [llvm-objcopy][ELF] Fix removing a group member.
When a group member is removed, the corresponding record in the
SHT_GROUP section has to be deleted.

This fixes PR46064.

Differential Revision: https://reviews.llvm.org/D80568
2020-05-29 20:24:53 +07:00
Igor Kudrin
786d96db56 [llvm-objcopy][ELF] Fix removing SHT_GROUP sections.
When a SHT_GROUP section is removed, but other sections of the group are
kept, the SHF_GROUP flag of these sections should be dropped, otherwise
the resulting ELF file will be malformed.

Differential Revision: https://reviews.llvm.org/D80511
2020-05-29 20:24:53 +07:00
Simon Pilgrim
6837e69bdf TextStubCommon.h - move StringSwitch.h include to TextStubCommon.cpp. NFC.
Only TextStubCommon.cpp actually uses StringSwitch
2020-05-29 14:03:15 +01:00
Simon Pilgrim
ed94dab7d0 TextAPIContext.h - remove unused MemoryBuffer.h include. NFC. 2020-05-29 14:03:15 +01:00
Sanjay Patel
c21b619547 [AArch64][x86] add tests for FMA combines; NFC 2020-05-29 08:58:37 -04:00
Florian Hahn
855b755233 [DAGComb] Do not turn insert_elt into shuffle for single elt vectors.
Currently combineInsertEltToShuffle turns insert_vector_elt into a
vector_shuffle, even if the inserted element is a vector with a single
element. In this case, it should be unlikely that the additional shuffle
would be more efficient than a insert_vector_elt.

Additionally, this fixes a infinite cycle in DAGCombine, where
combineInsertEltToShuffle turns a insert_vector_elt into a shuffle,
which gets turned back into a insert_vector_elt/extract_vector_elt by
a custom AArch64 lowering (in visitVECTOR_SHUFFLE).

Such insert_vector_elt and extract_vector_elt combinations can be
lowered efficiently using mov on AArch64.

There are 2 test changes in arm64-neon-copy.ll: we now use one or two
mov instructions instead of a single zip1. The reason that we need a
second mov in ins1f2 is that we have to move the result to the result
register and is not really related to the DAGCombine fold I think.
But in any case, on most uarchs, mov should be cheaper than zip1. On a
Cortex-A75 for example, zip1 is twice as expensive as mov
(https://developer.arm.com/docs/101398/latest/arm-cortex-a75-software-optimization-guide-v20)

Reviewers: spatel, efriedma, dmgreen, RKSimon

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D80710
2020-05-29 13:21:13 +01:00
Xing GUO
8717026000 [ObjectYAML][DWARF] Make the PubSection optional.
This patch helps make the `PubSection` optional in the DWARF structure.

Reviewed By: jhenderson, aprantl

Differential Revision: https://reviews.llvm.org/D80722
2020-05-29 20:11:53 +08:00
Simon Pilgrim
104d358d14 [CGP] Ensure address scaled offset is representable as int64_t
AddressingModeMatcher::matchScaledValue was calling getSExtValue for a constant before ensuring that we can actually represent the value as int64_t

Fixes OSSFuzz#22723 which is a followup to rGc479052a74b2 (PR46004 / OSSFuzz#22357)
2020-05-29 12:25:43 +01:00
Paul Walker
a604bdd390 [SelectionDAG] Update getNode asserts for EXTRACT/INSERT_SUBVECTOR.
Summary:
The description of EXTACT_SUBVECTOR and INSERT_SUBVECTOR has been
changed to accommodate scalable vectors (see ISDOpcodes.h). This
patch updates the asserts used to verify these requirements when
using SelectionDAG's getNode interface.

This patch introduces the MVT function getVectorMinNumElements
that can be used against fixed-length and scalable vectors when
only the known minimum vector length is required.

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D80709
2020-05-29 11:02:18 +00:00
Louis Dionne
47070492b5 [lit] Add an option to print all features used in tests
Lit test suites can tend to accumulate annotations that are not necessarily
relevant as time goes by, for example XFAILS on old compilers or platforms.
To help spot old annotations that can be cleaned up, it can be useful to
look at all features used inside a test suite.

This commit adds a new Lit option '--show-used-features' that prints all
the features used in XFAIL, REQUIRES and UNSUPPORTED of all tests that
are discovered.

Differential Revision: https://reviews.llvm.org/D78589
2020-05-29 07:00:05 -04:00
Florian Hahn
c5b8c59aa2 [SCCP] Switch to widen at PHIs, stores and call edges.
Currently SCCP does not widen PHIs, stores or along call edges
(arguments/return values), but on operations that directly extend ranges
(like binary operators).

This means PHIs, stores and call edges are not pessimized by widening
currently, while binary operators are. The main reason for widening
operators initially was that opting-out for certain operations was
more straight-forward in the initial implementation (and it did not
matter too much, as range support initially was only implemented for a
very limited set of operations.

During the discussion in D78391, it was suggested to consider flipping
widening to PHIs, stores and along call edges. After adding support for
tracking the number of range extensions in ValueLattice, limiting the
number of range extensions per value is straight forward.

This patch introduces a MaxWidenSteps option to the MergeOptions,
limiting the number of range extensions per value. For PHIs, it seems
natural allow an extension for each (active) incoming value plus 1. For
the other cases, a arbitrary limit of 10 has been chosen initially. It would
potentially make sense to set it depending on the users of a
function/global, but that still needs investigating. This potentially
leads to more state-changes and longer compile-times.

The results look quite promising (MultiSource, SPEC):

Same hash: 179 (filtered out)
Remaining: 58
Metric: sccp.IPNumInstRemoved

Program                                        base    widen-phi diff
 test-suite...ks/Prolangs-C/agrep/agrep.test    58.00   82.00    41.4%
 test-suite...marks/SciMark2-C/scimark2.test    32.00   43.00    34.4%
 test-suite...rks/FreeBench/mason/mason.test     6.00    8.00    33.3%
 test-suite...langs-C/football/football.test   104.00  128.00    23.1%
 test-suite...cations/hexxagon/hexxagon.test    36.00   42.00    16.7%
 test-suite...CFP2000/177.mesa/177.mesa.test   214.00  249.00    16.4%
 test-suite...ngs-C/assembler/assembler.test    14.00   16.00    14.3%
 test-suite...arks/VersaBench/dbms/dbms.test    10.00   11.00    10.0%
 test-suite...oxyApps-C++/miniFE/miniFE.test    43.00   47.00     9.3%
 test-suite...ications/JM/ldecod/ldecod.test   179.00  195.00     8.9%
 test-suite...CFP2006/433.milc/433.milc.test   249.00  265.00     6.4%
 test-suite.../CINT2000/175.vpr/175.vpr.test    98.00  104.00     6.1%
 test-suite...peg2/mpeg2dec/mpeg2decode.test    70.00   74.00     5.7%
 test-suite...CFP2000/188.ammp/188.ammp.test    71.00   75.00     5.6%
 test-suite...ce/Benchmarks/PAQ8p/paq8p.test   111.00  117.00     5.4%
 test-suite...ce/Applications/Burg/burg.test    41.00   43.00     4.9%
 test-suite...000/197.parser/197.parser.test    66.00   69.00     4.5%
 test-suite...tions/lambda-0.1.3/lambda.test    23.00   24.00     4.3%
 test-suite...urce/Applications/lua/lua.test   301.00  313.00     4.0%
 test-suite...TimberWolfMC/timberwolfmc.test    76.00   79.00     3.9%
 test-suite...lications/ClamAV/clamscan.test   991.00  1030.00    3.9%
 test-suite...plications/d/make_dparser.test    53.00   55.00     3.8%
 test-suite...fice-ispell/office-ispell.test    83.00   86.00     3.6%
 test-suite...lications/obsequi/Obsequi.test    28.00   29.00     3.6%
 test-suite.../Prolangs-C/bison/mybison.test    56.00   58.00     3.6%
 test-suite.../CINT2000/254.gap/254.gap.test   170.00  176.00     3.5%
 test-suite.../Applications/lemon/lemon.test    30.00   31.00     3.3%
 test-suite.../CINT2000/176.gcc/176.gcc.test   1202.00 1240.00    3.2%
 test-suite...pplications/treecc/treecc.test    79.00   81.00     2.5%
 test-suite...chmarks/MallocBench/gs/gs.test   357.00  366.00     2.5%
 test-suite...eeBench/analyzer/analyzer.test   103.00  105.00     1.9%
 test-suite...T2006/445.gobmk/445.gobmk.test   1697.00 1724.00    1.6%
 test-suite...006/453.povray/453.povray.test   1812.00 1839.00    1.5%
 test-suite.../Benchmarks/Bullet/bullet.test   337.00  342.00     1.5%
 test-suite.../CINT2000/252.eon/252.eon.test   426.00  432.00     1.4%
 test-suite...T2000/300.twolf/300.twolf.test   214.00  217.00     1.4%
 test-suite...pplications/oggenc/oggenc.test   244.00  247.00     1.2%
 test-suite.../CINT2006/403.gcc/403.gcc.test   4008.00 4055.00    1.2%
 test-suite...T2006/456.hmmer/456.hmmer.test   175.00  177.00     1.1%
 test-suite...nal/skidmarks10/skidmarks.test   430.00  434.00     0.9%
 test-suite.../Applications/sgefa/sgefa.test   115.00  116.00     0.9%
 test-suite...006/447.dealII/447.dealII.test   1082.00 1091.00    0.8%
 test-suite...6/482.sphinx3/482.sphinx3.test   141.00  142.00     0.7%
 test-suite...ocBench/espresso/espresso.test   152.00  153.00     0.7%
 test-suite...3.xalancbmk/483.xalancbmk.test   4003.00 4025.00    0.5%
 test-suite...lications/sqlite3/sqlite3.test   548.00  551.00     0.5%
 test-suite...marks/7zip/7zip-benchmark.test   5522.00 5551.00    0.5%
 test-suite...nsumer-lame/consumer-lame.test   208.00  209.00     0.5%
 test-suite...:: External/Povray/povray.test   1556.00 1563.00    0.4%
 test-suite...000/186.crafty/186.crafty.test   298.00  299.00     0.3%
 test-suite.../Applications/SPASS/SPASS.test   2019.00 2025.00    0.3%
 test-suite...ications/JM/lencod/lencod.test   8427.00 8449.00    0.3%
 test-suite...6/464.h264ref/464.h264ref.test   6797.00 6813.00    0.2%
 test-suite...6/471.omnetpp/471.omnetpp.test   431.00  430.00    -0.2%
 test-suite...006/450.soplex/450.soplex.test   446.00  447.00     0.2%
 test-suite...0.perlbench/400.perlbench.test   1729.00 1727.00   -0.1%
 test-suite...000/255.vortex/255.vortex.test   3815.00 3819.00    0.1%

Reviewers: efriedma, nikic, davide

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D79036
2020-05-29 11:59:17 +01:00
Kadir Cetinkaya
6c544d572f [readobj] Fix dangling else warning 2020-05-29 12:55:25 +02:00
David Sherwood
87771f8fd7 [CodeGen] Fix warnings in getZeroExtendInReg
We should be using getVectorElementCount() to assert that two types
have the same numbers of elements. I encountered the warnings while
compiling this test:

  CodeGen/AArch64/sve-intrinsics-ld1.ll

Differential Revision: https://reviews.llvm.org/D80616
2020-05-29 11:51:07 +01:00
Kadir Cetinkaya
714a107e6d Fix broken include 2020-05-29 12:49:11 +02:00
Simon Pilgrim
e8fa8253f9 IPDBLineNumber.h - remove unused includes. NFC. 2020-05-29 11:40:57 +01:00
Simon Pilgrim
3a3e487d2a IPDBInjectedSource.h - remove unused includes and forward declarations. NFC. 2020-05-29 11:40:57 +01:00
Simon Pilgrim
3cf67b5e20 VirtualFileSystem.h - reduce Twine.h include to forward declaration. NFC. 2020-05-29 11:40:56 +01:00
Georgii Rymar
dc3717d064 [llvm-readelf] - --elf-hash-histogram: do not crash when the .gnu.hash goes past the EOF.
llvm-readelf might crash when the .gnu.hash table goes past the EOF.

This patch splits and updates the code of a helper function `checkGNUHashTable`,
which is similar to `checkHashTable` and fixes the issue.

Differential revision: https://reviews.llvm.org/D80215
2020-05-29 13:29:48 +03:00
Georgii Rymar
7e4e60a6b2 [llvm-readobj][test] - unwind.test: add comments, document the current behavior.
Here I've added comments, added testing for llvm-readelf and documented
the behavior that we already have.

It was discussed in the D80380 thread that we want to improve the
"p_memsz does not match p_filesz for GNU_EH_FRAME" message reported
(and probably convert error to a warning). This patch is a preparation
for that.

Differential revision: https://reviews.llvm.org/D80635
2020-05-29 13:04:00 +03:00
Jay Foad
774767acdf [AMDGPU] Better use of llvm::numbers
Tweak a few constant expressions involving numbers::pi etc to avoid
rounding errors. NFCI though it's possible some of these will now be
more accurate in the last bit.
2020-05-29 09:55:36 +01:00
Jay Foad
4efece9a6e [AMDGPU] Use numbers::pi instead of M_PI. NFC. 2020-05-29 09:55:36 +01:00
Kazushi (Jam) Marukawa
e644567ca1 [VE] Implements minimum MC layer for VE (4/4)
Summary:
This patch includes following items.

 - Adds AsmParser and minimum AsmBackend/ELFObjectWriter/MCCodeEmitter to
   support only LEA instruction in order to reduce the size of this patch.
 - Adds regression test of MC layer for a LEA instruction.
 - Relocations are not supported this time to reduce the size of this patch.

Differential Revision: https://reviews.llvm.org/D79546
2020-05-29 10:50:16 +02:00
Sjoerd Meijer
1a234ab7bd [TTI] New target hook emitGetActiveLaneMask
This is split off from D79100 and adds a new target hook emitGetActiveLaneMask
that can be queried to check if the intrinsic @llvm.get.active.lane.mask() is
supported by the backend and if it should be emitted for a given loop.

See also commit rG7fb8a40e5220 and its commit message for more details/context
on this new intrinsic.

Differential Revision: https://reviews.llvm.org/D80597
2020-05-29 09:10:58 +01:00
Sjoerd Meijer
259a327aae New intrinsic @llvm.get.active.lane.mask()
This is split off from D79100 and:
- adds a intrinsic description/definition for @llvm.get.active.lane.mask(), and
- describe its semantics in LangRef.

As described (in more detail) in its LangRef section, it is semantically
equivalent to an icmp with the vector induction variable and the back-edge
taken count, and generates a mask of active/inactive vector lanes.

It will have several use cases. First, it will be used by the
ExpandVectorPredication pass for the VP intrinsics, to expand VP intrinsics for
scalable vectors on targets that do not support the `%evl` parameter, see
D78203.

Also, this is part of, and essential for our ARM MVE tail-predication story:
- this intrinsic will be emitted by the LoopVectorizer in D79100, when
  the scalar epilogue is tail-folded into the vector body. This new intrinsic
  will generate the predicate for the masked loads/stores, and it takes the
  back-edge taken count as an argument. The back-edge taken count represents the
  number of elements processed by the loop, which we need to setup MVE
  tail-predication.
- Emitting the intrinsic is controlled by a new TTI hook, see D80597.
- We pick up this new intrinsic in an ARM MVETailPredication backend pass, see
  D79175, and convert it to a MVE target specific intrinsic/instruction to
  create a tail-predicated loop.

Differential Revision: https://reviews.llvm.org/D80596
2020-05-29 08:51:40 +01:00
David Sherwood
41335fec50 [SVE] Remove getNumElements() warnings in InstCombiner::visitBitCast
Whilst trying to compile this test to assembly:

  CodeGen/aarch64-sve-intrinsics/acle_sve_reinterpret.c

I discovered some warnings were firing in InstCombiner::visitBitCast
due to calls to getNumElements() for scalable vector types. These
calls only really made sense for fixed width vectors so I have fixed
up the code appropriately.

Differential Revision: https://reviews.llvm.org/D80559
2020-05-29 08:00:08 +01:00
David Sherwood
149631f346 [SVE] Fix warnings in SelectInst::areInvalidOperands
We should be comparing the element counts rather than the
numbers of elements.

Differential Revision: https://reviews.llvm.org/D80634
2020-05-29 07:50:47 +01:00
David Sherwood
b0b422a9b8 [CodeGen] Add support for extracting elements of scalable vectors
I have tried to ensure that SelectionDAG and DAGCombiner do
sensible things for scalable vectors, and added support for a
limited number of simple folds. Codegen support for the vector
extract patterns have also been added to the AArch64 backend.

New vector extract tests have been added here:

  CodeGen/AArch64/sve-extract-element.ll

and I have also added new folds using inserts and extracts here:

  CodeGen/AArch64/sve-insert-element.ll

Differential Revision: https://reviews.llvm.org/D80208
2020-05-29 07:49:43 +01:00
Craig Topper
c4baadb60d [X86] Remove MMX isel patterns containing (x86mmx (scalar_to_vector (i32))).
I don't think we can make such a node. I don't think
x86_mmx is considered a vector for the check in getNode.
2020-05-28 23:42:03 -07:00
Amara Emerson
e44063a613 [AArch64][GlobalISel] Enable extending loads combines post-legalization.
During legalization we can end up with extends of loads, which in the case of
zexts causes us to not hit tablegen imported patterns.

The caveat here is that we don't want anyext load forming, since some variants
are illegal. This change also prevents the combine from creating any illegal
loads.

Differential Revision: https://reviews.llvm.org/D80458
2020-05-28 22:48:20 -07:00
LLVM GN Syncbot
b93f22afc2 [gn build] Port a6deaeec370 2020-05-29 03:47:15 +00:00
Lang Hames
9acf657a35 [ORC] Add debugging output for LLJIT construction.
This can be handy for checking whether the LLJIT instance you're constructing
matches your expectations.
2020-05-28 20:31:50 -07:00
Lang Hames
4f5e68aaf3 [JITLink] Improve llvm-jitlink regression testing support for ELF.
This patch adds a jitlink pass, 'registerELFGraphInfo', that records section
and symbol information about each LinkGraph in the llvm-jitlink session object.
This allows symbols and sections to be referred to by name in llvm-jitlink
regression tests. This will enable a testcase to be written for
https://reviews.llvm.org/D80613.
2020-05-28 20:31:50 -07:00
Lang Hames
215d6e9284 [JITLink] Fix 80-column rule violation. 2020-05-28 20:31:50 -07:00
Whitney Tsang
08b0a3b763 [LoopUnroll] Fix not-rotated.ll by adding back a limitation was unintentionally
removed in https://reviews.llvm.org/D80477
2020-05-29 03:05:58 +00:00
Philip Reames
a6f54e0094 [Tests] Migrate more statepoint lowering tests to use operand bundles
Only 2 tests left after this.  They just happen to be the most annoying.
2020-05-28 20:04:24 -07:00
Xing GUO
3fd71cbb6f [ObjectYAML][DWARF] Add DWARF entry in ELFYAML.
This patch adds a new DWARF entry in ELF YAML file.

Reviewed By: grimar

Differential Revision: https://reviews.llvm.org/D80203
2020-05-29 10:57:18 +08:00
Heejin Ahn
432b15ae65 [WebAssembly] Fix a bug in finding matching EH pad
Summary:
`getMatchingEHPad()` in LateEHPrepare is a function to find the nearest
EH pad that dominates the given instruction. This intends to be
lightweight so it does not use full WebAssemblyException scope analysis
or dominator analysis. It simply does backward BFS to its predecessors
and stops at the first EH pad each search path encounters. All search
should end up at the same EH pad, and if not, it returns null.

But it didn't take into account that when there are inner scopes within
the current scope, some path in BFS can hit an inner EH pad first. For
example, in the given diagram, `Inst` belongs to the outer scope and
`getMathingEHPad()` should return 'EHPad 1', but some search path can go
into the inner scope and end up with 'EHPad 2'. The search will return
null because different paths end up with different EH pads.
```
--- EHPad 1 ---
| - EHPad 2 - |
| |         | |
| ----------- |
|   Inst      |
---------------
```

So far this was OK because we haven't tested a case in which a given
instruction is far from its EH pad. Also, this bug does not happen when
the inner EH scope is a cleanup scope, because a cleanup scope ends with
a `cleanupret` whose successor is an EH pad, so the search encounters
that EH pad first before going into the child scope. But this can happen
when the child scope is a catch scope that ends with `catchret`. So this
patch, when doing backward BFS, does not search predecessors that ends
with `catchret`. Because `catchret`s are replaced with `br`s during this
pass, this records BBs that have `catchret`s in the beginning, before
doing any other transformations.

Reviewers: dschuff

Subscribers: sbc100, jgravelle-google, hiraditya, sunfish, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D80571
2020-05-28 19:46:11 -07:00
Heejin Ahn
5afdd92ab6 [WebAssembly] Fix a bug in removing unnecessary branches
Summary:
One of the things `removeUnnecessaryInstrs()` in CFGStackify does is to
remove an unnecessary unconditinal branch before an EH pad. When there
is an unconditional branch right before a catch instruction and it
branches to the end of `end_try` marker, we don't need the branch,
because it there is no exception, the control flow transfers to
that point anyway.
```
bb0:
  try
    ...
    br bb2      <- Not necessary
bb1:
  catch
    ...
bb2:
  end
```

This applies when we have a conditional branch followed by an
unconditional one, in which case we should only remove the unconditional
branch. For example:
```
bb0:
  try
    ...
    br_if someplace_else
    br bb2                 <- Not necessary
bb1:
  catch
    ...
bb2:
  end
```

But `TargetInstrInfo::removeBranch` we used removed all existing
branches when there are multiple ones. This patch fixes it by only
deleting the last (= unconditional) branch manually.

Also fixes some `preds` comments in the test file.

Reviewers: dschuff

Subscribers: sbc100, jgravelle-google, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D80572
2020-05-28 19:44:27 -07:00
Fangrui Song
21504991ec [llvm-xray][test] Fix unsupported-elf32.txt after D80185 2020-05-28 19:16:29 -07:00
Whitney Tsang
5d81253447 [LoopUnroll] Support loops with exiting block that is neither header nor
latch.

Summary: Remove the limitation in LoopUnrollPass that exiting block must
be either header or latch.
Reviewer: dmgreen, jdoerfert, Meinersbur, kbarton, bmahjour, etiotto,
fhahn, efriedma
Reviewed By: etiotto, fhahn, efriedma
Subscribers: efriedma, lkail, xbolva00, hiraditya, zzheng, llvm-commits
Tag: LLVM
Differential Revision: https://reviews.llvm.org/D80477
2020-05-29 01:18:38 +00:00
Tony
614929e040 [AMDGPU] DWARF Proposal For Heterogeneous Debugging
- Add introduction to DWARF Proposal For Heterogeneous Debugging.

Differential Revision: https://reviews.llvm.org/D70523
2020-05-28 20:36:21 -04:00
Valery N Dmitriev
ad3765c441 [NFC][SLP] Add test case exposing SLP cost model bug.
The bug is related to aggregate build cost model adjustment
that adds a bias to cost triggering vectorization of actually
unprofitable to vectorize tree.

Differential Revision: https://reviews.llvm.org/D80682
2020-05-28 17:31:29 -07:00
Matt Arsenault
312b2495ca GlobalISel: Work on improving stock set of legality predicates
I get confused by a lot of the predicate names here, since I would
assume they apply to vectors as well. Rename to reflect they only
apply to scalars.

Also add a few predicates AMDGPU uses that should be generally useful.
Also add any() to complement all. I've wanted to use this a few times
but then worked around it not being there.
2020-05-28 20:28:24 -04:00