1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-20 19:42:54 +02:00
Commit Graph

72582 Commits

Author SHA1 Message Date
Rafael Espindola
33f7d7f9fa Use the dwarf->llvm mapping to print register names in the cfi
directives.

Fixes PR9826.

llvm-svn: 132317
2011-05-30 20:20:15 +00:00
Stuart Hastings
9f37a92c33 (1 - X) * (-2) -> (x - 1) * 2, for all positive nonzero powers of 2
rdar://problem/6501862

llvm-svn: 132316
2011-05-30 20:00:33 +00:00
Rafael Espindola
13607c5e91 Split ppc dwarf regnums into ppc64 and ppc32 flavours.
llvm-svn: 132315
2011-05-30 18:24:44 +00:00
Rafael Espindola
5917c1f6ec Introduce the DwarfRegAlias class for declaring that two registers have the
same dwarf number. This will be used for creating a dwarf number to register
mapping.

The only case that needs this so far is the XMM/YMM registers that unfortunately
do have the same numbers.

llvm-svn: 132314
2011-05-30 17:49:59 +00:00
Rafael Espindola
00ba4a56e0 Mark the 32 bit registers as invalid in 64 bit mode. In 64 bit mode they are
subregisters of the 64 bit ones.

llvm-svn: 132313
2011-05-30 16:04:54 +00:00
Rafael Espindola
33338e912b Remove the DwarfNumbers from the subregisters. They should use DW_OP_bit_piece
and for now the generic dwarf emission will automatically use the superregister
numbers.

llvm-svn: 132312
2011-05-30 15:56:04 +00:00
Chris Lattner
a2c4fe8eea replace the intro tutorial from 2004 with a more recent work.
llvm-svn: 132310
2011-05-30 03:36:58 +00:00
Jakob Stoklund Olesen
1c8d54ed9f Reapply r132245 with a fix for the bug that broke the darwin9/i386 build.
llvm-svn: 132309
2011-05-30 01:33:26 +00:00
John McCall
701020df37 Add the test case for phis in the outer landing pad during the inliner's
forwarding of eh.resume that I promised yesterday.

llvm-svn: 132307
2011-05-30 01:08:04 +00:00
Charles Davis
52d44a8a21 Emit the handler's data area. For GCC-style exceptions under Win64, the
handler's data area starts with a 4-byte reference to the personality
function, followed by the DWARF LSDA.

llvm-svn: 132302
2011-05-30 00:13:34 +00:00
Jakob Stoklund Olesen
939fb6f738 Revert r132245, "Create two BlockInfo entries when a live range is discontinuous through a block."
This commit seems to have broken a darwin 9 tester.

llvm-svn: 132299
2011-05-29 21:24:39 +00:00
Jakob Stoklund Olesen
49bf4dd965 Fix PR10046 by updating LiveVariables kill info when splitting live ranges.
This only affects targets like Mips where branch instructions may kill virtual
registers. Most other targets branch on flag values, so virtual registers are
not involved.

The problem is that MachineBasicBlock::updateTerminator deletes branches and
inserts new ones while LiveVariables keeps a list of pointers to instructions
that kill virtual registers. That list wasn't properly updated in
MBB::SplitCriticalEdge.

llvm-svn: 132298
2011-05-29 20:10:28 +00:00
John McCall
64ff21faa7 On Darwin ARM, set the UNWIND_RESUME libcall to _Unwind_SjLj_Resume.
This is important for the correct lowering of unwind instructions
(which doesn't matter at all) and llvm.eh.resume calls (which does).

Take 2, now with more basic competence.

llvm-svn: 132295
2011-05-29 19:50:32 +00:00
John McCall
645e5b19b7 ...this is not a good commit day for me.
llvm-svn: 132294
2011-05-29 19:44:55 +00:00
John McCall
ffdb2d5e70 I didn't mean to commit these residues of a personal project.
llvm-svn: 132293
2011-05-29 19:41:56 +00:00
Nick Lewycky
e4e6989891 Add testcase for r132290, to check for the crasher caught by the buildbots
doing llvm-gcc selfhost (or cross).

llvm-svn: 132292
2011-05-29 19:41:14 +00:00
John McCall
46c7b963b2 On Darwin ARM, set the UNWIND_RESUME libcall to _Unwind_SjLj_Resume.
This is important for the correct lowering of unwind instructions
(which doesn't matter at all) and llvm.eh.resume calls (which does).

llvm-svn: 132291
2011-05-29 19:39:04 +00:00
Nick Lewycky
58d87d5490 Don't crash owhen ComputeLoadResult can't compute the result of the load.
llvm-svn: 132290
2011-05-29 19:33:36 +00:00
Nick Lewycky
07ed4434b8 Obey the isVolatile bit on memory intrinsics when analyzing uses of a global
variable. Noticed by inspection.

Simulate memset in EvaluateFunction where the target of the memset and the
value we're setting are both the null value. Fixes PR10047!

llvm-svn: 132288
2011-05-29 18:41:56 +00:00
Nadav Rotem
77b328bd14 Fix warnings due to 132263; Thanks rdivacky.
llvm-svn: 132285
2011-05-29 08:10:47 +00:00
Charles Davis
850e4b68b1 When generating against the Win64 EH scheme, set the handler to the GCC-specific
handler.

At this moment, only GCC-style exceptions are supported. Other kinds
of exceptions, including "traditional" SEH and Microsoft Visual C++ exceptions,
need more work--and an compiler exception model that isn't specific to
GCC-style exceptions!

In particular, I imagine that it would be possible to mix "traditional" SEH
with GCC-style EH or Microsoft C++ EH. Currently LLVM has no way (beyond some
target-specific defaults and whole-module compiler switches) of knowing which
scheme to use when.

llvm-svn: 132283
2011-05-29 04:28:35 +00:00
Rafael Espindola
9550e237a8 Use %rbp on a 64 bit test.
llvm-svn: 132279
2011-05-29 04:04:50 +00:00
Rafael Espindola
bfde930279 Fix to match the dwarf register numbers that gdb uses.
llvm-svn: 132278
2011-05-29 03:58:16 +00:00
Rafael Espindola
06c8318a60 Dwarf register 0 is r0, remove incorrect entries.
llvm-svn: 132276
2011-05-29 03:17:01 +00:00
John McCall
233946583f Fix this to work correctly with phis; test case to follow if this successfully
fixes self-host.

llvm-svn: 132275
2011-05-29 03:01:09 +00:00
Rafael Espindola
51a8fe13bc Remove the dwarf numbers from the D registers. They don't have dwarf numbers
and should probably be encoded as

DW_OP_reg 32 DW_OP_piece 4 DW_OP_reg 33

llvm-svn: 132274
2011-05-29 02:21:01 +00:00
Cameron Zwarich
72e034c331 Fix ARM fast isel to correctly flag memory operands to stores. This fixes
-verify-machineinstrs failures on several tests.

llvm-svn: 132268
2011-05-28 20:34:49 +00:00
Nadav Rotem
63c8747adf Refactor the type legalizer. Switch TargetLowering to a new enum - LegalizeTypeAction.
This patch does not change the behavior of the type legalizer. The codegen
produces the same code.
This infrastructural change is needed in order to enable complex decisions
for vector types (needed by the vector-select patch).

llvm-svn: 132263
2011-05-28 17:57:14 +00:00
Benjamin Kramer
ffcbcb72ef Erase instructions _after_ checking their type.
llvm-svn: 132256
2011-05-28 11:48:37 +00:00
Benjamin Kramer
ad67c34014 Move ARM specific test into the ARM subdir.
llvm-svn: 132255
2011-05-28 11:01:30 +00:00
Benjamin Kramer
129192d295 ConstantFoldInstOperands doesn't like compares, hand it off to instsimplify instead.
Fixes PR10040.

llvm-svn: 132254
2011-05-28 10:16:58 +00:00
John McCall
119a0222f5 Implement and document the llvm.eh.resume intrinsic, which is
transformed by the inliner into a branch to the enclosing landing pad
(when inlined through an invoke).  If not so optimized, it is lowered
DWARF EH preparation into a call to _Unwind_Resume (or _Unwind_SjLj_Resume
as appropriate).  Its chief advantage is that it takes both the
exception value and the selector value as arguments, meaning that there
is zero effort in recovering these;  however, the frontend is required
to pass these down, which is not actually particularly difficult.

Also document the behavior of landing pads a bit better, and make it
clearer that it's okay that personality functions don't always land at
landing pads.  This is just a fact of life.  Don't write optimizations that
rely on pushing things over an unwind edge.

llvm-svn: 132253
2011-05-28 07:45:59 +00:00
John McCall
fd85fdee7c Change how tblgen generates attributes for intrinsics to use a single
switch.  With this newfound organization, teach tblgen how not to give
all intrinsics the 'nounwind' attribute.  Introduce a new intrinsic,
llvm.eh.resume, which does not have this attribute.  Documentation and uses
to follow.

llvm-svn: 132252
2011-05-28 06:31:34 +00:00
Charles Davis
6702c786ed When generating code for Win64 EH, emit StartProc and EndProc directives.
llvm-svn: 132250
2011-05-28 04:21:04 +00:00
Bruno Cardoso Lopes
6d5e369a10 Add support for ARM ldrexd/strexd intrinsics. They both use i32 register pairs
to load/store i64 values. Since there's no current support to explicitly
declare such restrictions, implement it by using specific hardcoded register
pairs during isel.

llvm-svn: 132248
2011-05-28 04:07:29 +00:00
Eric Christopher
a2fa6edef9 This actually starts at offset 0, not 1.
llvm-svn: 132246
2011-05-28 03:16:22 +00:00
Jakob Stoklund Olesen
56bd697f79 Create two BlockInfo entries when a live range is discontinuous through a block.
Delete the Kill and Def markers in BlockInfo. They are no longer
necessary when BlockInfo describes a continuous live range.

This only affects the relatively rare kind of basic block where a live
range looks like this:

 |---x   o---|

Now live range splitting can pretend that it is looking at two blocks:

 |---x
         o---|

This allows the code to be simplified a bit.

llvm-svn: 132245
2011-05-28 02:33:00 +00:00
Jakob Stoklund Olesen
394d198d2e Add SplitAnalysis::getNumLiveBlocks().
It is important that this function returns the same number of live blocks as
countLiveBlocks(CurLI) because live range splitting uses the number of live
blocks to ensure it is making progress.

This is in preparation of supporting duplicate UseBlock entries for basic blocks
that have a virtual register live-in and live-out, but not live-though.

llvm-svn: 132244
2011-05-28 02:32:57 +00:00
Akira Hatanaka
45b3f52c41 Change the set of callee-saved registers for non-MIPS32 architectures specified
in MipsRegisterInfo::getCalleeSavedRegs so that both registers paired for a
double precision register get saved.

 

llvm-svn: 132243
2011-05-28 01:41:05 +00:00
Eric Christopher
000dd7d0e6 Implement the 'M' output modifier for arm inline asm. This is fairly
register allocation dependent and will occasionally break. WIP in the
register allocator to model paired/etc registers.

rdar://9119939

llvm-svn: 132242
2011-05-28 01:40:44 +00:00
Chad Rosier
d0a64ab2af Add missing newlines.
llvm-svn: 132241
2011-05-28 01:35:58 +00:00
Akira Hatanaka
1590e4eab1 Define a wrapper node for target constant nodes (tglobaladdr, etc.).
Need this to prevent emitting illegal conditional move instructions. 

llvm-svn: 132240
2011-05-28 01:07:07 +00:00
Devang Patel
93e78e996f Select DW_AT_const_value size based on global variable size.
llvm-svn: 132239
2011-05-28 00:39:18 +00:00
Rafael Espindola
707fa44bc0 Add 132187 back now that the real problem is fixed.
llvm-svn: 132238
2011-05-28 00:24:37 +00:00
Chad Rosier
fbc91cd006 Fix test cases that were previously using grep to use FileCheck
llvm-svn: 132237
2011-05-28 00:15:10 +00:00
Rafael Espindola
386c4259db Fix the root cause of the bootstrap failure:
There was no way to check if a given register/mode pair was valid. We now return
an error code (-2) instead of asserting. If anyone thinks that an assert
at this point  is really needed, we can autogen a hasValidDwarfRegNum instead.

llvm-svn: 132236
2011-05-28 00:13:01 +00:00
Cameron Zwarich
cd3c1b5829 Fix the remaining atomic intrinsics to use the right register classes on Thumb2,
and add some basic tests for them.

llvm-svn: 132235
2011-05-27 23:54:00 +00:00
Charles Davis
cf8d922dbe Stub out support for Win64-style exceptions. Note that this is merely using
the Win64 EH mechanism to implement GCC-style exceptions. LLVM supports
hardly anything else at this point!

llvm-svn: 132234
2011-05-27 23:47:32 +00:00
Bruno Cardoso Lopes
93eae0fd19 ARM asm parser wasn't able to parse a "mov" instruction while in Thumb
mode (only the "mov.w" variant). Now, when parsing "mov" in thumb mode,
default to the Thumb 1 versions/encodings.

llvm-svn: 132233
2011-05-27 23:46:09 +00:00
Rafael Espindola
8ed6285c8d It looks like 132187 might have broken the llvm-gcc bootstrap. Revert while I check.
llvm-svn: 132230
2011-05-27 23:36:02 +00:00