1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-02 00:42:52 +01:00
Commit Graph

7607 Commits

Author SHA1 Message Date
Evan Cheng
84f06f0ee6 Enable cross register class coalescing.
llvm-svn: 76281
2009-07-18 02:10:10 +00:00
Evan Cheng
92fc255bb4 Fix pr4552. Stack slot coloring with register must take care not to generate illegal ams.
llvm-svn: 76258
2009-07-17 22:42:51 +00:00
Daniel Dunbar
ab1316fbaf llvm-mc: Add -triple, and start fetching the target asm printer.
llvm-svn: 76257
2009-07-17 22:38:58 +00:00
Evan Cheng
67ccedff04 Fix x86 inline ams 'q' constraint support. In 32-bit mode, it's just like 'Q', i.e. EAX, EDX, ECX, EBX. In 64-bit mode, it just means all the i64r registers. Yeah, that makes sense.
llvm-svn: 76248
2009-07-17 22:13:25 +00:00
Chris Lattner
fb1ff2b993 rename test.
llvm-svn: 76197
2009-07-17 18:05:55 +00:00
Duncan Sands
c77e727d4f Testcase for PR4214.
llvm-svn: 76174
2009-07-17 11:44:20 +00:00
Eli Friedman
fde598545c Make promotion in operation legalization for SETCC work correctly.
llvm-svn: 76153
2009-07-17 05:16:04 +00:00
Anton Korobeynikov
dc39f4fff8 Emit cross regclass register moves for thumb2.
Minor code duplication cleanup.

llvm-svn: 76124
2009-07-16 23:26:06 +00:00
Dale Johannesen
e08bda67c2 Assume an inline asm might be a call, so we get
stack alignment right when it is.  This is not
ideal but conservatively correct.  Adjust a test
to compensate for changed stack offset value.
gcc.apple/asm-block-57.c

llvm-svn: 76120
2009-07-16 22:34:45 +00:00
David Greene
a2c98dd402 Emit line numbers in asm comments when available.
llvm-svn: 76117
2009-07-16 22:24:20 +00:00
Jakob Stoklund Olesen
4a0d996780 Teach MachineInstr::isRegTiedToDefOperand() to correctly parse inline asm operands.
The inline asm operands must be parsed from the first flag, you cannot assume
that an immediate operand preceeding a register use operand is the flag.
PowerPC "m" operands are represented as (flag, imm, reg) triples.
isRegTiedToDefOperand() would incorrectly interpret the imm as the flag.

llvm-svn: 76101
2009-07-16 20:58:34 +00:00
Evan Cheng
981276bb16 Changed my mind. We now allow remat of instructions whose defs have subreg indices.
llvm-svn: 76100
2009-07-16 20:15:00 +00:00
Chris Lattner
aeeaf805c6 this should be xfailed on darwin. Darwin doesn't use the libstdc++ in the llvm-gcc distro, it uses the system version.
llvm-svn: 76095
2009-07-16 18:45:51 +00:00
Evan Cheng
39e5f6205a With recent MC changes, RIP base register is explicitly modeled. Make sure we add it when x86 V_SET0 / V_SETALLONES (by transforming it into a constpool load) into the use instruction.
llvm-svn: 76094
2009-07-16 18:44:05 +00:00
Dan Gohman
50e65d8c93 Fill in some holes in ScalarEvolution's loop iteration condition
analysis. This allows indvars to emit a simpler loop trip count
expression.

llvm-svn: 76085
2009-07-16 17:34:36 +00:00
Anton Korobeynikov
0d58ad2528 Make xfail proper
llvm-svn: 76065
2009-07-16 14:53:47 +00:00
Anton Korobeynikov
3e8bb65ec8 Temporary disable 16 bit bswap
llvm-svn: 76063
2009-07-16 14:35:57 +00:00
Anton Korobeynikov
e11a89ba74 Add bswap patterns
llvm-svn: 76061
2009-07-16 14:34:52 +00:00
Anton Korobeynikov
94f250ff30 Fix logic inversion for RI-mode address selection
llvm-svn: 76052
2009-07-16 14:31:14 +00:00
Anton Korobeynikov
4bba61182a Unbreak the test
llvm-svn: 76051
2009-07-16 14:30:49 +00:00
Anton Korobeynikov
373515d99e Expand 32-bit bitconverts via memory
llvm-svn: 76050
2009-07-16 14:30:29 +00:00
Anton Korobeynikov
080bdae588 Fix incomin arg stack frame offset in case we need to generate stack frame
llvm-svn: 76049
2009-07-16 14:29:57 +00:00
Anton Korobeynikov
2e8f54d16d Revert the commit, it just hides the real bug
llvm-svn: 76045
2009-07-16 14:28:26 +00:00
Anton Korobeynikov
bbf0fe2a76 Lower anyext to zext, 32-bit stuff does not have any implicit zero-extension side effects
llvm-svn: 76035
2009-07-16 14:24:41 +00:00
Anton Korobeynikov
3e670f38f9 Provide consistent subreg idx scheme. This (hopefully) fixes remaining divide problems
llvm-svn: 76011
2009-07-16 14:18:17 +00:00
Anton Korobeynikov
b3af53a626 Implement 'large' PIC model
llvm-svn: 76006
2009-07-16 14:16:05 +00:00
Anton Korobeynikov
2889a28adb Implement shifts properly (hopefilly - finally!)
llvm-svn: 76005
2009-07-16 14:15:24 +00:00
Anton Korobeynikov
f48e88136e Properly handle divides. As a bonus - implement memory versions of them.
llvm-svn: 76003
2009-07-16 14:14:33 +00:00
Anton Korobeynikov
e6b7c15a63 32 bit shifts have only 12 bit displacements
llvm-svn: 76000
2009-07-16 14:13:24 +00:00
Anton Korobeynikov
6c1091e7f3 Consolidate reg-imm / reg-reg-imm address mode selection logic in one place.
llvm-svn: 75990
2009-07-16 14:10:17 +00:00
Anton Korobeynikov
9a1ad49207 Add support for 12 bit displacements
llvm-svn: 75988
2009-07-16 14:09:35 +00:00
Anton Korobeynikov
a809635fc8 Emit proper lowering of load from arg stack slot
llvm-svn: 75986
2009-07-16 14:08:42 +00:00
Anton Korobeynikov
9013a1ee39 Implement dynamic allocas
llvm-svn: 75985
2009-07-16 14:08:15 +00:00
Anton Korobeynikov
ee8ce5b760 Add jump tables
llvm-svn: 75984
2009-07-16 14:07:50 +00:00
Anton Korobeynikov
ab90a05ff3 Add rotates
llvm-svn: 75981
2009-07-16 14:06:49 +00:00
Anton Korobeynikov
ff5b07e994 Add patterns for integer negate
llvm-svn: 75980
2009-07-16 14:06:27 +00:00
Anton Korobeynikov
335aeecedc Provide proper patterns for and with imm instructions. Tune the tests accordingly.
llvm-svn: 75979
2009-07-16 14:06:00 +00:00
Anton Korobeynikov
49d065e9c9 Add 32 bit and reg-imm and disable invalid patterns for now
llvm-svn: 75978
2009-07-16 14:05:32 +00:00
Anton Korobeynikov
c9778b81c9 Add z9 and z10 target processors. Mark z10-only instructions as such.
llvm-svn: 75977
2009-07-16 14:05:00 +00:00
Anton Korobeynikov
1e1f1a789b Proper lower 'small' results
llvm-svn: 75962
2009-07-16 13:58:24 +00:00
Anton Korobeynikov
db9fb21b48 Completel forgot about unconditional branches
llvm-svn: 75961
2009-07-16 13:57:52 +00:00
Anton Korobeynikov
ce2b70586e Lower addresses of globals
llvm-svn: 75960
2009-07-16 13:57:27 +00:00
Anton Korobeynikov
9a57aa9c54 Test (incomplete) for easy muls
llvm-svn: 75959
2009-07-16 13:57:03 +00:00
Anton Korobeynikov
d984dc6c9d Provide "wide" muls and divs/rems
llvm-svn: 75958
2009-07-16 13:56:42 +00:00
Anton Korobeynikov
aad6f1c75a Tests for cmp / br_cc / select_cc
llvm-svn: 75949
2009-07-16 13:53:15 +00:00
Anton Korobeynikov
b4a6f3c467 Emit callee-saved regs spills / restores
llvm-svn: 75943
2009-07-16 13:51:12 +00:00
Anton Korobeynikov
4fcadd1a7d Some preliminary call lowering
llvm-svn: 75941
2009-07-16 13:50:21 +00:00
Anton Korobeynikov
f4257ba74e Prologue / epilogue emission
llvm-svn: 75940
2009-07-16 13:49:49 +00:00
Anton Korobeynikov
dd60515f11 Add simple frame index elimination
llvm-svn: 75939
2009-07-16 13:49:25 +00:00
Anton Korobeynikov
40a891deef Provide proper test :)
llvm-svn: 75938
2009-07-16 13:48:59 +00:00
Anton Korobeynikov
5e1fa67a23 Add address computation stuff
llvm-svn: 75935
2009-07-16 13:47:59 +00:00
Anton Korobeynikov
47c086cc6b Add mem-imm stores
llvm-svn: 75933
2009-07-16 13:47:14 +00:00
Anton Korobeynikov
b88da5c190 Add stores and truncstores
llvm-svn: 75931
2009-07-16 13:45:00 +00:00
Anton Korobeynikov
b262cec2d0 Add patterns for various extloads
llvm-svn: 75930
2009-07-16 13:44:30 +00:00
Anton Korobeynikov
f080a4a0bd Add shifts and reg-imm address matching
llvm-svn: 75927
2009-07-16 13:43:18 +00:00
Anton Korobeynikov
de69aad588 Add bunch of 32-bit patterns... Uffff :)
llvm-svn: 75926
2009-07-16 13:42:31 +00:00
Rafael Espindola
9541db227e Add tests for fixes I committed earlier to the C++ FE.
llvm-svn: 75924
2009-07-16 13:35:42 +00:00
Anton Korobeynikov
f63382b52b Add bunch of reg-imm movs
llvm-svn: 75921
2009-07-16 13:34:50 +00:00
Anton Korobeynikov
dcc7d19ef3 Provide masked reg-imm 'or' and 'and'
llvm-svn: 75919
2009-07-16 13:33:57 +00:00
Anton Korobeynikov
4b8ed9f263 Fix test running lines
llvm-svn: 75918
2009-07-16 13:33:21 +00:00
Anton Korobeynikov
c98835c743 Add reg-reg and pattern
llvm-svn: 75917
2009-07-16 13:32:49 +00:00
Anton Korobeynikov
2688d3c0a7 Add sub reg-reg pattern
llvm-svn: 75916
2009-07-16 13:32:16 +00:00
Anton Korobeynikov
2dd607fca7 Add xor reg-reg pattern
llvm-svn: 75915
2009-07-16 13:31:28 +00:00
Anton Korobeynikov
66b2612946 Add or reg-reg pattern.
llvm-svn: 75914
2009-07-16 13:30:53 +00:00
Anton Korobeynikov
ca9c5365ac Add add reg-reg and reg-imm patterns
llvm-svn: 75913
2009-07-16 13:30:15 +00:00
Anton Korobeynikov
7b8aec2c40 Add simple reg-reg and reg-imm moves
llvm-svn: 75912
2009-07-16 13:29:38 +00:00
Anton Korobeynikov
7fe1d9c90e Minimal lowering for formal_arguments / ret
llvm-svn: 75911
2009-07-16 13:28:59 +00:00
Anton Korobeynikov
8b299e2ae4 Add testsuite dir for systemz stuff
llvm-svn: 75910
2009-07-16 13:28:22 +00:00
Richard Osborne
ee0ad3d09b Combine an unaligned store of unaligned load into a memmove.
llvm-svn: 75908
2009-07-16 12:50:48 +00:00
Richard Osborne
0d65748f8f Expand unaligned 32 bit loads from an address which is a constant
offset from a 32 bit aligned base as follows:

  ldw low, base[offset >> 2]
  ldw high, base[(offset >> 2) + 1]
  shr low_shifted, low, (offset & 0x3) * 8
  shl high_shifted, high, 32 - (offset & 0x3) * 8
  or result, low_shifted, high_shifted

Expand 32 bit loads / stores with 16 bit alignment into two 16 bit
loads / stores.

llvm-svn: 75902
2009-07-16 10:42:35 +00:00
Richard Osborne
eb8036be44 Custom lower unaligned 32 bit stores and loads into libcalls. This is
a big code size win since before they were expanding to upto 16
instructions.

llvm-svn: 75901
2009-07-16 10:21:18 +00:00
Evan Cheng
7a6b20df7f Let callers decide the sub-register index on the def operand of rematerialized instructions.
Avoid remat'ing instructions whose def have sub-register indices for now. It's just really really hard to get all the cases right.

llvm-svn: 75900
2009-07-16 09:20:10 +00:00
Chris Lattner
4939bd13ad implement .include in the lexer/parser instead of passing it into the streamer.
llvm-svn: 75896
2009-07-16 06:14:39 +00:00
Eli Friedman
6aa39dcd93 Switch invars away from using isTrapping when it really shouldn't be
using it.

llvm-svn: 75852
2009-07-15 22:48:29 +00:00
Eli Friedman
048d13f9bb Don't restrict the set of instructions where we try to constant-fold the
operands; it's possible to end up with a constant-foldable operand to 
most instructions, even those which can't trap.

llvm-svn: 75845
2009-07-15 22:13:34 +00:00
Evan Cheng
83b99bb014 ShortenDeadCopySrcLiveRange needs to be more conservative in multi-kill situations.
llvm-svn: 75838
2009-07-15 21:39:50 +00:00
Dale Johannesen
8c76f8296b Fix test so it works on systems where wchar_t != int.
llvm-svn: 75827
2009-07-15 20:40:53 +00:00
Dale Johannesen
82f85c6a29 Test for llvm-gcc patch 75822.
llvm-svn: 75824
2009-07-15 20:27:44 +00:00
Dan Gohman
8d6df1287d Apparently Darwin doesn't have /dev/full :-(.
llvm-svn: 75809
2009-07-15 18:41:11 +00:00
Richard Osborne
bdd120fbdb Fix pattern for LD16S_3r, add basic tests to check load / store instructions
are being properly selected.

llvm-svn: 75797
2009-07-15 17:06:59 +00:00
Dan Gohman
afe44327d4 Add a testcase for raw_ostream error checking.
llvm-svn: 75795
2009-07-15 16:47:02 +00:00
Richard Osborne
589cb93199 Fix XCoreTargetLowering::isLegalAddressingMode to handle non simple VTs.
llvm-svn: 75788
2009-07-15 15:46:56 +00:00
Kevin Enderby
312f8559cb Added llvm-mc support for parsing the .dump and .load directives.
llvm-svn: 75786
2009-07-15 15:30:11 +00:00
Duncan Sands
7dfdc32405 String constants are now output with private linkage.
llvm-svn: 75777
2009-07-15 12:09:18 +00:00
Chris Lattner
499fe29f12 fix an arm codegen bug (the same as PR4482 on ppc) where available_externally
symbols were not getting stubs.  While I'm at it, add a big testcase for
stub generation to make sure I don't break anything.

llvm-svn: 75737
2009-07-15 04:12:33 +00:00
Chris Lattner
0c13774a29 get the PPC stub temporary label from the mangler instead of
using horrible string hacking.  This gives us a different label,
but it's just an assembler temporary, so the name doesn't matter.

llvm-svn: 75733
2009-07-15 02:56:53 +00:00
Chris Lattner
1c4b831cb2 convert this to filecheck style and make it a test of darwin/PPC's
extremely elaborate pic/nopic stubs.

llvm-svn: 75726
2009-07-15 01:43:31 +00:00
Chris Lattner
6f7ab678c9 simplify this test to test the esentials.
llvm-svn: 75725
2009-07-15 01:32:33 +00:00
Kevin Enderby
3e47cf1dda Added llvm-mc support for parsing the .include directive.
llvm-svn: 75711
2009-07-14 23:21:55 +00:00
Kevin Enderby
5821cee99b Added llvm-mc support for parsing the .lsym directive.
llvm-svn: 75685
2009-07-14 21:35:03 +00:00
Dan Gohman
5329511fae Fix the expansion of umax and smax in the case where one or more of
the operands have pointer type, so that the resulting type matches
the original SCEV type, and so that unnecessary ptrtoints are
avoided in common cases.

llvm-svn: 75680
2009-07-14 20:57:04 +00:00
Chris Lattner
9f8b22c8ff convert to filecheck style, simplify RUN line, and add comment.
llvm-svn: 75667
2009-07-14 19:49:11 +00:00
Chris Lattner
7799b65baa convert this test to filecheck style
llvm-svn: 75663
2009-07-14 18:57:40 +00:00
Torok Edwin
bbccd95874 Introduce a pointertracking pass.
For now this only computes the allocated size of the memory pointed to by a
pointer, and offset a pointer from allocated pointer.
The actual checkLimits part will come later, after another round of review.

llvm-svn: 75657
2009-07-14 18:44:28 +00:00
Chris Lattner
987c69b426 Testcase for PR4556
llvm-svn: 75655
2009-07-14 18:42:24 +00:00
Chris Lattner
6ec578688d Reapply my previous asmprinter changes now with more testing and two
additional bug fixes:

1. The bug that everyone hit was a problem in the asmprinter where it
   would remove $stub but keep the L prefix on a name when emitting the
   indirect symbol.  This is easy to fix by keeping the name of the stub
   and the name of the symbol in a StringMap instead of just keeping a
   StringSet and trying to reconstruct it late.

2. There was a problem printing the personality function.  The current
   logic to print out the personality function from the DWARF information
   is a bit of a cesspool right now that duplicates a bunch of other 
   logic in the asm printer.  The short version of it is that it depends
   on emitting both the L and _ prefix for symbols (at least on darwin)
   and until I can untangle it, it is best to switch the mangler back to
   emitting both prefixes.

llvm-svn: 75646
2009-07-14 18:17:16 +00:00
Kevin Enderby
0b1331c43b Added llvm-mc support for parsing the .desc directive.
llvm-svn: 75645
2009-07-14 18:17:10 +00:00
Dan Gohman
9525cf679f Add a testcase for a bug fixed by r75634.
llvm-svn: 75644
2009-07-14 18:15:00 +00:00
Dale Johannesen
35fc3243a8 Revert 75571; I'm convinced this isn't the right thing to do.
llvm-svn: 75642
2009-07-14 17:48:25 +00:00
Daniel Dunbar
3d0c94fbbc Revert r75610 (and r75620, which was blocking the revert), in the hopes of
unbreaking llvm-gcc (on Darwin).

--- Reverse-merging r75620 into '.':
U    include/llvm/Support/Mangler.h
--- Reverse-merging r75610 into '.':
U    test/CodeGen/X86/loop-hoist.ll
G    include/llvm/Support/Mangler.h
U    lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp
U    lib/VMCore/Mangler.cpp

llvm-svn: 75636
2009-07-14 15:57:55 +00:00
Chris Lattner
b0e0d16efb Change the X86 asmprinter to use the mangler to apply suffixes like "$non_lazy_ptr"
to symbols instead of doing it with "printSuffixedName".  This gets us to the point
where there is a real separation between computing a symbol name and printing it,
something I need for MC printer stuff.

This patch also fixes a corner case bug where unnamed private globals wouldn't get
the private label prefix.

Next up, rename all uses of getValueName -> getMangledName for better greppability,
and then tackle the ppc/arm backends to eliminate "printSuffixedName".

llvm-svn: 75610
2009-07-14 06:04:35 +00:00
Chris Lattner
2a6bb9bc51 Change the internal interface to makeNameProper to take a bool that
indicates whether the label is private or not, instead of taking
prefix stuff.  One effect of this is that symbols will be generated
with *just* the private prefix, instead of both the private prefix
*and* the user-label-prefix, but this doesn't matter as long as it
is consistent.  For example we'll now get "Lfoo" instead of "L_foo".
These are just assembler temporary labels anyway, so they never even
make it into the .o file.

llvm-svn: 75607
2009-07-14 04:50:12 +00:00
Eli Friedman
63028801b8 Fix trivial todo in instcombine.
llvm-svn: 75586
2009-07-14 02:01:53 +00:00
Dan Gohman
493855541b Update LoopSimplify and LoopUnswitch to use the new makeLoopInvariant
function.

llvm-svn: 75584
2009-07-14 01:37:59 +00:00
Dan Gohman
b9f3a3c96b Fix indvars to not assume that a loop with a single unique exit
block has a single unique exiting block.

llvm-svn: 75579
2009-07-14 01:09:02 +00:00
David Goodwin
88f38c0380 Fix detection of valid BFC immediates.
llvm-svn: 75576
2009-07-14 00:57:56 +00:00
Bill Wendling
0751c92127 Check for the correct unnamed name.
llvm-svn: 75573
2009-07-14 00:53:58 +00:00
Dale Johannesen
de1ed58935 Don't delete asm's just because their inputs are undefined;
xor R, R is a common and valid idiom for zeroing a register, for example.

llvm-svn: 75571
2009-07-14 00:45:38 +00:00
Kevin Enderby
af095fcfb8 Added llvm-mc support for parsing the .abort directive.
llvm-svn: 75545
2009-07-13 23:15:14 +00:00
Dan Gohman
66e40e59e0 Check in a reduced version of this testcase.
llvm-svn: 75544
2009-07-13 23:04:44 +00:00
Chris Lattner
1ab26071d4 Two changes:
1) unique globals with the existing "Count" local in Mangler, not with
atomic nonsense.  Using atomics will give us nondeterminstic output
from the compiler when using multiple threads, which is bad.

2) Do not mangle an unknown global name with a type suffix.  We don't
   need this anymore now that llvm ir doesn't have type planes.

llvm-svn: 75541
2009-07-13 22:48:46 +00:00
Eli Friedman
a6c7a3d44e PR4548: optimize zext+udiv+trunc to udiv.
llvm-svn: 75539
2009-07-13 22:46:01 +00:00
Eli Friedman
47839d3dec Fix bug in run-line.
llvm-svn: 75534
2009-07-13 22:31:30 +00:00
Dan Gohman
5d53d0b73b Add testcases for PR4538, PR4537, and PR4534.
llvm-svn: 75533
2009-07-13 22:30:31 +00:00
Eli Friedman
6b51ac6728 Canonicalize boolean +/- a constant to a select.
(I think it's reasonably clear that we want to have a canonical form for 
constructs like this; if anyone thinks that a select is not the best 
canonical form, please tell me.)

llvm-svn: 75531
2009-07-13 22:27:52 +00:00
Dan Gohman
a9953c0a28 Reapply 75252, with a fix to avoid the infinite recursion case. The
check for avoiding re-analyzing a widening cast needed to happen
earlier, as getSCEV itself may result in a isLoopGuardedByCond query.

llvm-svn: 75511
2009-07-13 21:35:55 +00:00
Kevin Enderby
a461788d6a add llvm-mc support for parsing the .subsections_via_symbols directive.
llvm-svn: 75500
2009-07-13 21:03:15 +00:00
Chris Lattner
b4bd955891 Move the re-sort of invalidated NonLocalPointerDeps cache earlier
so that all code paths get it.  PR4256 was about a case where the
phi translation loop would find all preds in the Visited cache, so
it could get by without re-sorting the NonLocalPointerDeps cache.
Fix this by resorting it earlier, there is no reason not to do this.

This patch inspired by Jakub Staszak's patch.

llvm-svn: 75476
2009-07-13 17:14:23 +00:00
Chris Lattner
b8dac327a7 remove tests for removed intrinsics.
llvm-svn: 75433
2009-07-12 21:30:06 +00:00
Chris Lattner
35e5cff316 add nounwind
llvm-svn: 75407
2009-07-12 00:46:16 +00:00
Nick Lewycky
e5c1852b69 Darwin prepends an _ to internal globals, Linux doesn't.
llvm-svn: 75405
2009-07-11 23:48:59 +00:00
Chris Lattner
a54c70286c fix x86-64 static codegen to materialize the address of a global with movl instead
of lea.  It is better for code size (and presumably efficiency) to use:

  movl $foo, %eax

rather than:

  leal foo, eax

Both give a nice zero extending "move immediate" instruction, the former is just
smaller.  Note that global addresses should be handled different by the x86
backend, but I chose to follow the style already in place and add more fixme's.

llvm-svn: 75403
2009-07-11 23:17:29 +00:00
Chris Lattner
7015283356 this test was incorrect for x86-64 static. It passed on darwin, because darwin
doesn't have static x86-64 mode.

llvm-svn: 75392
2009-07-11 22:30:05 +00:00
Nick Lewycky
d3d5cfa475 Revert r75252 which was causing some crashes at compile time.
llvm-svn: 75384
2009-07-11 20:38:25 +00:00
Chris Lattner
496f872969 Fix PR4533, which is about buggy codegen in x86-64 -static mode.
Basically, using:
  lea symbol(%rip), %rax

is not valid in -static mode, because the current RIP may not be
within 32-bits of "symbol" when an app is built partially pic and
partially static.  The fix for this is to compile it to:

  lea symbol, %rax

It would be better to codegen this as:

  movq $symbol, %rax

but that will come next.


The hard part of fixing this bug was fixing abi-isel, which was actively
testing for the wrong behavior.  Also, the RUN lines are completely impossible
to understand what they are testing.  To help with this, convert the -static 
x86-64 codegen tests to use filecheck.  This is much more stable and makes it
more clear what the codegen is expected to be.

llvm-svn: 75382
2009-07-11 20:29:19 +00:00
Chris Lattner
6bfeeb798a We get the P modifier wrong in a lot of cases, just add some more rigorous testing.
In addition to fixing this, I still need to do some more testing on darwin.

llvm-svn: 75362
2009-07-11 08:30:22 +00:00
Evan Cheng
20086680b0 Don't put IT instruction before conditional branches.
llvm-svn: 75361
2009-07-11 07:26:20 +00:00
Evan Cheng
03d981d91b Smarter isel of ldrsb / ldrsh. Only make use of these when [r,r] address is feasible.
llvm-svn: 75360
2009-07-11 07:08:13 +00:00
Evan Cheng
268b47b1fb Major changes to Thumb (not Thumb2). Many 16-bit instructions either modifies CPSR when they are outside the IT blocks, or they can predicated when in Thumb2. Move the implicit def of CPSR to an optional def which defaults CPSR. This allows the 's' bit to be toggled dynamically.
A side-effect of this change is asm printer is now using unified assembly. There are some minor clean ups and fixes as well.

llvm-svn: 75359
2009-07-11 06:43:01 +00:00
Chris Lattner
84bf9fed2b add support for .zerofill, patch by Kevin Enderby!
llvm-svn: 75301
2009-07-10 22:20:30 +00:00
Chris Lattner
2bdd9c7807 convert test to use FileCheck, which is much more precise and faster than
the previous RUN lines.  Hopefully this will be an inspiration for future
tests :)

llvm-svn: 75261
2009-07-10 18:34:47 +00:00
Dan Gohman
404a92e330 Generalize ScalarEvolution's cast-folding code to support more kinds
of loops. Add several new functions to for working with ScalarEvolution's
add-hoc value-range analysis functionality.

llvm-svn: 75252
2009-07-10 16:42:52 +00:00
Evan Cheng
24f2aefc87 Add a thumb2 pass to insert IT blocks.
llvm-svn: 75218
2009-07-10 01:54:42 +00:00
Evan Cheng
4249ad4c00 Remove a bogus assertion.
llvm-svn: 75206
2009-07-10 00:23:48 +00:00
Bob Wilson
f5f52fa9d6 Handle 'a' modifier on inline assembly operands.
This is part of the fix for pr4521.

llvm-svn: 75201
2009-07-09 23:54:51 +00:00
Eli Friedman
08991c716a Make EXTRACT_VECTOR_ELT a bit more flexible in terms of the returned
value.  Adjust other code to deal with that correctly.  Make 
DAGTypeLegalizer::PromoteIntRes_EXTRACT_VECTOR_ELT take advantage of 
this new flexibility to simplify the code and make it deal with unusual 
vectors (like <4 x i1>) correctly.  Fixes PR3037.

llvm-svn: 75176
2009-07-09 22:01:03 +00:00
Chris Lattner
56638bb644 add llvm-mc support for parsing the .lcomm directive, patch by Kevin Enderby!
llvm-svn: 75148
2009-07-09 17:25:12 +00:00
Nick Lewycky
c707d9c60d There's no need to consider PHI nodes in the same block as the instruction
we're inserting sigma/phi functions for. Patch by Andre Tavares.

llvm-svn: 75138
2009-07-09 15:59:27 +00:00
Evan Cheng
4f87295872 Targets sometimes assign fixed stack object to spill certain callee-saved
registers based on dynamic conditions. For example, X86 EBP/RBP, when used as
frame register has to be spilled in the first fixed object. It should inform
PEI this so it doesn't get allocated another stack object. Also, it should not
be spilled as other callee-saved registers but rather its spilling and restoring
are being handled by emitPrologue and emitEpilogue. Avoid spilling it twice.

llvm-svn: 75116
2009-07-09 06:53:48 +00:00
Lang Hames
ceb80b14d3 Improved tracking of value number kills. VN kills are now represented
as an (index,bool) pair. The bool flag records whether the kill is a
PHI kill or not. This code will be used to enable splitting of live
intervals containing PHI-kills.

A slight change to live interval weights introduced an extra spill
into lsr-code-insertion (outside the critical sections). The test 
condition has been updated to reflect this.

llvm-svn: 75097
2009-07-09 03:57:02 +00:00
Chris Lattner
ee12a671e5 remove eh, convert to FileCheck style
llvm-svn: 75087
2009-07-09 01:07:22 +00:00
Chris Lattner
9aa10daa2d we have no tests for dllimport/export. Add one.
llvm-svn: 75085
2009-07-09 00:53:44 +00:00
Chris Lattner
f321f1f93f * add some assertions for sanity checking.
* remove some old code that was needed when we'd put ESP in the scale instead of 
  the base of some instructions.
* Fix a bug with the P modifier in inline asm that caused us to drop it.

llvm-svn: 75077
2009-07-09 00:27:29 +00:00
Chris Lattner
8747eae8e9 add a test for dale's recent change.
llvm-svn: 75074
2009-07-09 00:00:16 +00:00
Chris Lattner
0122ff1be6 switch test to FileCheck-style and test the P and non-P cases.
llvm-svn: 75071
2009-07-08 23:44:06 +00:00
Chris Lattner
ddf2433b7b rename a test to make it a feature test.
llvm-svn: 75070
2009-07-08 23:40:57 +00:00
David Goodwin
49fbd8d6b7 Use common code for both ARM and Thumb-2 instruction and register info.
llvm-svn: 75067
2009-07-08 23:10:31 +00:00
Devang Patel
23e55694c5 Drop "constant" from
!0 = constant metadata !{...}

llvm-svn: 75057
2009-07-08 21:57:07 +00:00
Devang Patel
cbb39980cf Update SLotTracker to handle MDNode slots.
Simplify MDNode printing.

llvm-svn: 75053
2009-07-08 21:44:25 +00:00
Chris Lattner
d0323fb481 Switch all the MC tests to use FileCheck.
llvm-svn: 75039
2009-07-08 20:50:34 +00:00
Chris Lattner
e71de71abc convert to FileCheck style.
llvm-svn: 75038
2009-07-08 20:40:54 +00:00
Bob Wilson
8d4a8b9370 Implement NEON vst1 instruction.
llvm-svn: 75037
2009-07-08 20:32:02 +00:00
Devang Patel
530fc78aec Support MDNode forward reference.
llvm-svn: 75031
2009-07-08 19:23:54 +00:00
Chris Lattner
1eeea0d262 add some more check for vector compares.
llvm-svn: 75024
2009-07-08 18:51:25 +00:00
Chris Lattner
182817004d convert a test to "FileCheck" style.
llvm-svn: 75023
2009-07-08 18:48:24 +00:00
Bob Wilson
3809b333de Implement NEON vld1 instructions.
llvm-svn: 75019
2009-07-08 18:11:30 +00:00
David Goodwin
d19a9aa207 Add rev16 test... xfail for now
llvm-svn: 75012
2009-07-08 16:15:06 +00:00
David Goodwin
5bdef4b3f7 Checkpoint Thumb2 Instr info work. Generalized base code so that it can be shared between ARM and Thumb2. Not yet activated because register information must be generalized first.
llvm-svn: 75010
2009-07-08 16:09:28 +00:00
Nick Lewycky
d46a7b2d22 Remove the vicmp and vfcmp instructions. Because we never had a release with
these instructions, no autoupgrade or backwards compatibility support is
provided.

llvm-svn: 74991
2009-07-08 03:04:38 +00:00
Chris Lattner
c153b998d9 eliminate the v[if]cmp versions of these tests, now that [if]cmp+sext works.
llvm-svn: 74980
2009-07-08 00:49:35 +00:00
Chris Lattner
2939f0a318 Change these tests to use [fi]cmp+sext instead of v[fi]cmp. No
functionality change.

llvm-svn: 74979
2009-07-08 00:46:57 +00:00
Chris Lattner
ea7bd9b484 dag combine sext(setcc) -> vsetcc before legalize. To make this safe,
VSETCC must define all bits, which is different than it was documented
to before.  Since all targets that implement VSETCC already have this
behavior, and we don't optimize based on this, just change the 
documentation.  We now get nice code for vec_compare.ll

llvm-svn: 74978
2009-07-08 00:31:33 +00:00
Chris Lattner
e2435c4f6f add support for legalizing an icmp where the result is illegal (4xi1) but
the input is legal (4 x i32)

llvm-svn: 74964
2009-07-07 23:03:54 +00:00
Chris Lattner
1de1b3155b add a trivial test that vector compares work.
llvm-svn: 74963
2009-07-07 22:51:09 +00:00
Chris Lattner
a754f344b2 implement support for spliting and scalarizing vector setcc's. This
finishes off enough support for vector compares to get the icmp/fcmp
version of 2008-07-23-VSetCC.ll passing.

llvm-svn: 74961
2009-07-07 22:47:46 +00:00
Chris Lattner
573a3eeda2 verify that the fcmp version of this works just as well as the
vfcmp version.  We actually get better code for this silly testcase.

llvm-svn: 74954
2009-07-07 22:07:47 +00:00
Evan Cheng
393e38e44b Add Thumb2 movcc instructions.
llvm-svn: 74946
2009-07-07 20:39:03 +00:00
Evan Cheng
37abb8fc28 Add missing tests.
llvm-svn: 74945
2009-07-07 20:38:08 +00:00
Chris Lattner
2bea79b45b Implement parsing support for the .comm directive. Patch by
Kevin Enderby!

llvm-svn: 74944
2009-07-07 20:30:46 +00:00
Evan Cheng
fa864ab886 Add Thumb2 pkhbt / pkhtb.
llvm-svn: 74895
2009-07-07 05:35:52 +00:00
Evan Cheng
46b98516f6 Add some more Thumb2 multiplication instructions.
llvm-svn: 74889
2009-07-07 01:17:28 +00:00
Evan Cheng
5a279bb4b2 Add bfc to armv6t2.
llvm-svn: 74868
2009-07-06 22:23:46 +00:00
Evan Cheng
2570d8b541 Added ARM::mls for armv6t2.
llvm-svn: 74866
2009-07-06 22:05:45 +00:00
Evan Cheng
29ce3bfbb8 Avoid adding a duplicate def. This fixes PR4478.
llvm-svn: 74857
2009-07-06 21:34:05 +00:00
Stuart Hastings
7ab35df2d2 Mark this test as Darwin only. Patch by Bill Wendling.
llvm-svn: 74829
2009-07-06 15:36:23 +00:00
Nick Lewycky
d9573d899d When comparing constants, consider a less wide constant to be "less complex"
than a wider one, before trying to compare their contents which will crash
if their sizes are different.

llvm-svn: 74792
2009-07-04 17:24:52 +00:00
Evan Cheng
f20e4fba49 Add thumb2 sign / zero extend with rotate instructions.
llvm-svn: 74755
2009-07-03 01:43:10 +00:00
Evan Cheng
162bd9cead Added indexed stores.
llvm-svn: 74740
2009-07-03 00:06:39 +00:00
Evan Cheng
fcab8e743a Sign extending pre/post indexed loads.
llvm-svn: 74736
2009-07-02 23:16:11 +00:00
Chris Lattner
54c0359890 do not try to analyze bitcasts from i64 to <2 x i32> in ComputedMaskedBits. While
we could do this, doing so requires adjusting the demanded mask and the code isn't 
doing that yet.  This fixes PR4495

llvm-svn: 74699
2009-07-02 16:04:08 +00:00
Evan Cheng
dad6a41d14 Thumb2 pre/post indexed loads.
llvm-svn: 74696
2009-07-02 07:28:31 +00:00
Chris Lattner
4cddab0f14 @GOTPCREL is also rip-relative. Fix fast-isel to do the right thing.
This fixes an llvm-gcc bootstrap problem I introduced.

llvm-svn: 74691
2009-07-02 04:22:01 +00:00
Chris Lattner
e703feb0ac Fix yet-another bug I introduced into fastisel, this time handling
constant pool references that weren't getting properly rip-relative.

llvm-svn: 74689
2009-07-02 03:14:25 +00:00
Daniel Dunbar
298ac2d87c llvm-mc/x86: Test case for x86 operand parsing.
llvm-svn: 74688
2009-07-02 02:28:23 +00:00
Dan Gohman
e3b1f9e14b Fix an instcombine abort on a scalar-to-vector bitcast. This fixes PR4487.
llvm-svn: 74646
2009-07-01 21:38:46 +00:00
Devang Patel
86e8a3a0a8 new test case
llvm-svn: 74633
2009-07-01 19:40:59 +00:00
Devang Patel
905d32435c Support stand alone metadata syntax.
!0 = constant metadata !{i32 21, i32 22}
@llvm.blah = constant metadata !{i32 1000, i16 200, metadata !0}

llvm-svn: 74630
2009-07-01 19:21:12 +00:00
Chris Lattner
b51c7950bf Fix codegen for references to available_externally symbols. This fixes
PR4482.

llvm-svn: 74613
2009-07-01 16:53:44 +00:00
Stuart Hastings
4db03551ba Insure that __block_holder_tmp is allocated on the stack when a byref
variable is present.

llvm-svn: 74610
2009-07-01 15:40:10 +00:00
Evan Cheng
e6989735a6 CommuteChangesDestination() should check if to-be-commuted instruction defines any register. Also teaches the default commuteInstruction() to commute instruction without definitions (e.g. X86::test / ARM::tsp).
llvm-svn: 74602
2009-07-01 08:29:08 +00:00
Evan Cheng
7d78cb531e Remove special handling of implicit_def. Fix a couple more bugs in liveintervalanalysis and coalescer handling of implicit_def.
Note, isUndef marker must be placed even on implicit_def def operand or else the scavenger will not ignore it. This is necessary because -O0 path does not use liveintervalanalysis, it treats implicit_def just like any other def.

llvm-svn: 74601
2009-07-01 08:19:36 +00:00
Chris Lattner
2bbdc61f92 Fix some fast-isel problems selecting global variable addressing in
pic mode.

llvm-svn: 74582
2009-07-01 03:27:19 +00:00
Evan Cheng
37503e9671 Handle IMPLICIT_DEF with isUndef operand marker, part 2. This patch moves the code to annotate machineoperands to LiveIntervalAnalysis. It also add markers for implicit_def that define physical registers. The rest, is just a lot of details.
llvm-svn: 74580
2009-07-01 01:59:31 +00:00
David Goodwin
19aa5c7d51 Add PIC load and store patterns for Thumb-2.
llvm-svn: 74577
2009-07-01 00:01:13 +00:00
Daniel Dunbar
d0589c59b3 llvm-mc: Symbols in a relocatable expression of the (a - b + cst) form are
allowed to be undefined when the expression is seen, we cannot enforce the
same-section requirement until the entire assembly file has been seen.

llvm-svn: 74565
2009-06-30 22:49:27 +00:00
David Goodwin
5805e9aef5 Add thumb-2 store word, halfword, and byte.
llvm-svn: 74555
2009-06-30 22:11:34 +00:00
David Goodwin
aad223dd8a Improve Thumb-2 jump table support.
llvm-svn: 74549
2009-06-30 19:50:22 +00:00
Rafael Espindola
340632e814 Fix PR4485.
Avoid unnecessary duplication of operand 0 of X86::FpSET_ST0_80. This duplication would
cause one register to remain on the stack at the function return.

llvm-svn: 74534
2009-06-30 16:40:03 +00:00
Rafael Espindola
33b0aa0274 Fix PR4484.
This was caused by me confounding FP0 and ST(0).

llvm-svn: 74523
2009-06-30 12:18:16 +00:00
Evan Cheng
28b9e77f19 Temporarily restore the scavenger implicit_def checking code. MachineOperand isUndef mark is not being put on implicit_def of physical registers (created for parameter passing, etc.).
llvm-svn: 74519
2009-06-30 09:19:42 +00:00
Evan Cheng
c6c942b70f Add a bit IsUndef to MachineOperand. This indicates the def / use register operand is defined by an implicit_def. That means it can def / use any register and passes (e.g. register scavenger) can feel free to ignore them.
The register allocator, when it allocates a register to a virtual register defined by an implicit_def, can allocate any physical register without worrying about overlapping live ranges. It should mark all of operands of the said virtual register so later passes will do the right thing.

This is not the best solution. But it should be a lot less fragile to having the scavenger try to track what is defined by implicit_def.

llvm-svn: 74518
2009-06-30 08:49:04 +00:00
Evan Cheng
2a527c3419 A few more load instructions.
llvm-svn: 74500
2009-06-30 02:15:48 +00:00
Andreas Bolka
71ef361d1d Array accesses are independent if the underlying arrays differ.
llvm-svn: 74499
2009-06-30 02:12:10 +00:00
Daniel Dunbar
2d92d62fb2 llvm-mc: Accept relocatable expressions for .org, assignments, .byte, etc.
llvm-svn: 74498
2009-06-30 02:10:03 +00:00
David Goodwin
6ed9f9c9c5 Enhance tests to include shifted-register operand testing.
llvm-svn: 74490
2009-06-30 01:02:20 +00:00
Daniel Dunbar
e4fd18eda8 llvm-mc: Parse symbol attribute directives.
llvm-svn: 74487
2009-06-30 00:33:19 +00:00
Daniel Dunbar
72c0434597 llvm-mc: Parse .{,b,p2}align{,w,l} directives.
llvm-svn: 74478
2009-06-29 23:46:59 +00:00
David Goodwin
4f53387d26 Add Thumb-2 support for TEQ amd TST.
llvm-svn: 74468
2009-06-29 22:49:42 +00:00
David Goodwin
e7df96eedf Thumb-2 tests
llvm-svn: 74464
2009-06-29 22:25:22 +00:00
Daniel Dunbar
fca88cf26b llvm-mc: Recognize C++ style comments.
llvm-svn: 74463
2009-06-29 22:00:57 +00:00
Daniel Dunbar
ade4f03bd0 MC: Improve expression parsing and implement evaluation of absolute expressions.
llvm-svn: 74448
2009-06-29 20:37:27 +00:00
Dan Gohman
d496b35af0 Don't cache PHI exit values from exhaustive evaluations, because
an individual exhaustive evaluation reflects only the exit value
implied by an individual exit, which may differ from the actual
exit value of the loop if there are other exits. This fixes PR4477.

llvm-svn: 74447
2009-06-29 20:34:13 +00:00
Rafael Espindola
a0fdda93be FIX PR 4459.
Not sure I understand how the temp register gets used,
but this fixes a bug and introduces no regressions.

llvm-svn: 74446
2009-06-29 20:29:59 +00:00
David Greene
f39b82b3b3 Add some tests of advanced TableGen list functionality.
llvm-svn: 74445
2009-06-29 20:07:17 +00:00
David Goodwin
9e1280adf3 Rename ARMcmpNZ to ARMcmpZ and use it to represent comparisons that set only the Z flag (i.e. eq and ne). Make ARMcmpZ commutative.
llvm-svn: 74423
2009-06-29 15:33:01 +00:00
Evan Cheng
093adf3ff9 Implement Thumb2 ldr.
After much back and forth, I decided to deviate from ARM design and split LDR into 4 instructions (r + imm12, r + imm8, r + r << imm12, constantpool). The advantage of this is 1) it follows the latest ARM technical manual, and 2) makes it easier to reduce the width of the instruction later. The down side is this creates more inconsistency between the two sub-targets. We should split ARM LDR instruction in a similar fashion later. I've added a README entry for this.

llvm-svn: 74420
2009-06-29 07:51:04 +00:00
Andreas Bolka
bed5622fb7 Print pairwise dependence results, add testcases.
llvm-svn: 74402
2009-06-28 00:35:22 +00:00
Dan Gohman
28702fab4e Don't try to split a loop when the controlling icmp instruction
doesn't have an IV-based operand. This fixes PR4471.

llvm-svn: 74399
2009-06-27 22:58:27 +00:00
Dan Gohman
8d2a45fadb Teach LoopSimplify how to merge multiple loop exits into a single exit,
when one of them can be converted to a trivial icmp and conditional
branch.

This addresses what is essentially a phase ordering problem.
SimplifyCFG knows how to do this transformation, but it doesn't do so
if the primary block has any instructions in it other than an icmp and
a branch. In the given testcase, the block contains other instructions,
however they are loop-invariant and can be hoisted. SimplifyCFG doesn't
have LoopInfo though, so it can't hoist them. And, it's important that
the blocks be merged before LoopRotation, as it doesn't support
multiple-exit loops.

llvm-svn: 74396
2009-06-27 21:30:38 +00:00
Dan Gohman
4acfd5098d When a value is used multiple times within a single PHI, instructions
inserted to replace that value must dominate all of of the basic
blocks associated with the uses of the value in the PHI, not just
one of them.

llvm-svn: 74376
2009-06-27 05:16:57 +00:00
Chris Lattner
e711b85035 factor some logic out into a helper function, allow remat of loads from constant
globals.  This implements remat-constant.ll even without aggressive-remat.

llvm-svn: 74373
2009-06-27 04:38:55 +00:00
Chris Lattner
19eb0dad26 Reimplement rip-relative addressing in the X86-64 backend. The new
implementation primarily differs from the former in that the asmprinter
doesn't make a zillion decisions about whether or not something will be
RIP relative or not.  Instead, those decisions are made by isel lowering
and propagated through to the asm printer.  To achieve this, we:

1. Represent RIP relative addresses by setting the base of the X86 addr
   mode to X86::RIP.
2. When ISel Lowering decides that it is safe to use RIP, it lowers to
   X86ISD::WrapperRIP.  When it is unsafe to use RIP, it lowers to
   X86ISD::Wrapper as before.
3. This removes isRIPRel from X86ISelAddressMode, representing it with
   a basereg of RIP instead.
4. The addressing mode matching logic in isel is greatly simplified.
5. The asmprinter is greatly simplified, notably the "NotRIPRel" predicate
   passed through various printoperand routines is gone now.
6. The various symbol printing routines in asmprinter now no longer infer
   when to emit (%rip), they just print the symbol.

I think this is a big improvement over the previous situation.  It does have
two small caveats though: 1. I implemented a horrible "no-rip" modifier for
the inline asm "P" constraint modifier.  This is a short term hack, there is
a much better, but more involved, solution.  2. I had to xfail an 
-aggressive-remat testcase because it isn't handling the use of RIP in the
constant-pool reading instruction.  This specific test is easy to fix without
-aggressive-remat, which I intend to do next.

llvm-svn: 74372
2009-06-27 04:16:01 +00:00
Chris Lattner
aef726f8b9 remove some unneeded eh info.
llvm-svn: 74371
2009-06-27 04:07:31 +00:00
Chris Lattner
3e94ce2426 testcase for PR4466
llvm-svn: 74367
2009-06-27 01:33:35 +00:00
David Goodwin
90fc344e41 When possible, use "mvn ra, rb" instead of "eor ra, rb, -1" because mvn has a narrow version and eor(i) does not.
llvm-svn: 74355
2009-06-26 23:13:13 +00:00
Dan Gohman
49b2ecafe7 Add some testcases for some of the recent ScalarEvolution bug fixes.
llvm-svn: 74353
2009-06-26 22:54:11 +00:00
David Goodwin
4997a459c7 Thumb-2 tests
llvm-svn: 74345
2009-06-26 22:37:07 +00:00
Chris Lattner
4384816259 remove unwind info, add test for asmprinting of jump table labels with (%rip)
llvm-svn: 74337
2009-06-26 22:16:49 +00:00
Evan Cheng
016ed65455 Add x86 support for 'n' inline asm modifier. This will be handled target independently as part of MC work.
llvm-svn: 74336
2009-06-26 22:00:19 +00:00
David Goodwin
921faa64cd Thumb-2 has CLZ.
llvm-svn: 74322
2009-06-26 20:47:43 +00:00
David Goodwin
9da977f216 Use "adcs/sbcs" only when the carry-out is live, otherwise use "adc/sbc".
llvm-svn: 74321
2009-06-26 20:45:56 +00:00
Daniel Dunbar
23337e07ce More spelling Count as count.
llvm-svn: 74306
2009-06-26 18:35:07 +00:00
Daniel Dunbar
fa37f8bf95 Spell Count as count.
llvm-svn: 74298
2009-06-26 18:21:54 +00:00
David Goodwin
4a98908300 Add Thumb-2 tests.
llvm-svn: 74295
2009-06-26 18:10:30 +00:00
David Goodwin
46eb5a7a2d ADC used to implement adde should use "adcs" opcode instead of "adc".
llvm-svn: 74293
2009-06-26 18:07:25 +00:00
David Goodwin
b2c485c6bd ORN and BIC tests.
llvm-svn: 74289
2009-06-26 16:20:06 +00:00
David Goodwin
877790aa5f Currently there is a pattern for the thumb-2 MOV 16-bit immediate instruction. That instruction cannot write the flags so it should use T2I instead of T2sI.
Also, added a pattern for the thumb-2 MOV of shifted immediate since that can encode immediates not encodable by the 16-bit immediate.

llvm-svn: 74288
2009-06-26 16:10:07 +00:00
Evan Cheng
7883ae3121 Fix tests: Count -> count.
llvm-svn: 74282
2009-06-26 07:05:57 +00:00
Evan Cheng
da10be895c Fix a CodeGenDAGPatterns bug. Check if top level predicates match when it's looking for duplicates.
llvm-svn: 74276
2009-06-26 05:59:16 +00:00
Shantonu Sen
eb968301d7 Clarify how to configure llvm-gcc-4.2 for use with
test suite. Remove documentation for --with-f2c, which
is no longer supported. Remove information about obtaining
tcl/expect, which ship with Mac OS X by default since
10.4.

llvm-svn: 74271
2009-06-26 05:44:53 +00:00
Devang Patel
a7a5664fbb Let's ignore MDStrings also!
llvm-svn: 74255
2009-06-26 02:26:12 +00:00
Daniel Dunbar
be7f3311ad Fix spelling of 'count'
llvm-svn: 74249
2009-06-26 01:33:02 +00:00
Dan Gohman
ba8760719f Fix LCSSA to avoid emitting a PHI node for the unwind destination of
an invoke instruction, since the value isn't really live across that
edge.

llvm-svn: 74242
2009-06-26 00:31:13 +00:00
Evan Cheng
4ac765118d Select ADC, SBC, and RSC instead of the ADCS, SBCS, and RSCS when the carry bit def is not used.
llvm-svn: 74228
2009-06-25 23:34:10 +00:00
David Goodwin
74414108e9 Use MVN for ~t2_so_imm immediates.
llvm-svn: 74223
2009-06-25 23:11:21 +00:00
Daniel Dunbar
bfc585a86e MC: Parse .org directives.
llvm-svn: 74218
2009-06-25 22:44:51 +00:00
Bill Wendling
f962a1df07 Don't grep the -debug output. This isn't the way to test changes.
llvm-svn: 74211
2009-06-25 21:59:32 +00:00
Daniel Dunbar
d7a883b5e5 MC: Parse .set and assignments.
llvm-svn: 74208
2009-06-25 21:56:11 +00:00
Chris Lattner
f035685176 down with unwind info :)
llvm-svn: 74206
2009-06-25 21:48:17 +00:00
Evan Cheng
0cced3daa8 ISD::ADDE / ISD::SUBE updates the carry bit so they should isle to ADCS and SBCS / RSCS.
llvm-svn: 74200
2009-06-25 20:59:23 +00:00
Devang Patel
d98b076409 No need to code gen MDNodes
llvm-svn: 74150
2009-06-25 00:47:42 +00:00
Evan Cheng
e8c58ee743 Add Thumb2 pc relative add.
llvm-svn: 74141
2009-06-24 23:47:58 +00:00
Daniel Dunbar
5cf59dd842 Basic .s parsing for .asci[iz], .fill, .space, {.byte, .short, ... }
- Includes some DG tests in test/MC/AsmParser, which are rather primitive since
   we don't have a -verify mode yet.

llvm-svn: 74139
2009-06-24 23:30:00 +00:00
Evan Cheng
f7814163db We should run these tests as well.
llvm-svn: 74121
2009-06-24 21:36:26 +00:00
Chris Lattner
6e06dc1168 unwind info not needed.
llvm-svn: 74112
2009-06-24 19:48:04 +00:00
Dan Gohman
b4e1f166e1 Simplify [su]max(MAX, n) to MAX. This comes up in loop tripcount
computations in loops with multiple exits.

Adjust the testcase for PR4436 so that the relevant portion isn't
optimized away.

llvm-svn: 74073
2009-06-24 14:46:22 +00:00
Dan Gohman
c2c1e1ff38 When inserting code into a loop preheader, insert it before the
terminator, instead of after the last phi. This fixes a bug
exposed by ScalarEvolution analyzing more kinds of loops.
This fixes PR4436.

llvm-svn: 74072
2009-06-24 14:31:06 +00:00
Evan Cheng
b4139189b0 Move thumb and thumb2 tests into separate directories.
llvm-svn: 74068
2009-06-24 06:36:07 +00:00
Evan Cheng
7292cadf06 Fix support for inline asm input / output operand tying when operand spans across multiple registers (e.g. two i64 operands in 32-bit mode).
llvm-svn: 74053
2009-06-24 02:05:51 +00:00
Dan Gohman
60844e20f0 Add a testcase demoing some of ScalarEvolution's new trip count logic.
llvm-svn: 74049
2009-06-24 01:22:30 +00:00
Dan Gohman
4f4bda36df Extend ScalarEvolution's multiple-exit support to compute exact
trip counts in more cases.

Generalize ScalarEvolution's isLoopGuardedByCond code to recognize
And and Or conditions, splitting the code out into an
isNecessaryCond helper function so that it can evaluate Ands and Ors
recursively, and make SCEVExpander be much more aggressive about
hoisting instructions out of loops.

test/CodeGen/X86/pr3495.ll has an additional instruction now, but
it appears to be due to an arbitrary register allocation difference.

llvm-svn: 74048
2009-06-24 01:18:18 +00:00
Devang Patel
13317bfc64 upgrade
llvm-svn: 74016
2009-06-23 22:11:37 +00:00
Evan Cheng
eaad82627b Proper patterns for thumb2 shift and rotate instructions.
llvm-svn: 73987
2009-06-23 19:39:13 +00:00
Dale Johannesen
5b05728e00 The correct values here (as defined by gcc-4.2) are
different for ppc; add another version of the test.

llvm-svn: 73983
2009-06-23 18:42:26 +00:00
Dale Johannesen
9f516abaa5 This test only works on ppc32 if some optimization is done before
generating LLVM IR; it is correct in the code as written
to use 8-byte-aligned operations to copy Key in bar.  Formerly
the gcc inliner was run, now it isn't.  I don't think it's
possible to preserve this as a pure FE test.  Adding -O2 lets
the llvm optimizers get rid of the 8-byte-aligned stores, at least.

llvm-svn: 73981
2009-06-23 18:34:37 +00:00
Dale Johannesen
3550840eb3 See test. Judging from PR 1278, at the time the test was committed, the
generated code was apparently doing stores directly into the return value
aggregate; now, it's doing a copy from a compiler-generated static object.
That object is initialized using [4 x i8] which breaks the test.  I believe
this change preserves the original point of the test.

Of course it would be better for the code to do stores directly into the
return aggregate, but that is not what happens at -O0; the llvm optimizers
seem to do that on x86 but not on ppc32, possibly because of the explicit
padding (which is unavoidable).  I think it must have been being done by
a gcc optimizer pass before.

llvm-svn: 73972
2009-06-23 18:03:49 +00:00
Dan Gohman
058143a236 Fix a bug in the trip-count computation with And/Or. If either of the
sides is CouldNotCompute, the resulting exact count must be CouldNotCompute.

llvm-svn: 73920
2009-06-22 23:28:56 +00:00
Bob Wilson
6db76aaf10 Add support for ARM's Advanced SIMD (NEON) instruction set.
This is still a work in progress but most of the NEON instruction set
is supported.

llvm-svn: 73919
2009-06-22 23:27:02 +00:00
Dan Gohman
b85ac02513 Fix llvm::ComputeNumSignBits to handle pointer types
conservatively correctly, instead of aborting.

llvm-svn: 73908
2009-06-22 22:02:32 +00:00
Evan Cheng
2814371831 It's coalescer, not coaleser.
llvm-svn: 73902
2009-06-22 21:09:17 +00:00
Bob Wilson
0c2c5f65e2 For Darwin on ARMv6 and newer, make register r9 available for use as a
caller-saved register.

llvm-svn: 73901
2009-06-22 21:01:46 +00:00
Evan Cheng
2410955c62 Fix another register coalescer crash: forgot to check if the instruction being updated has already been coalesced.
llvm-svn: 73898
2009-06-22 20:49:32 +00:00
Evan Cheng
b37e7e24d0 hasFP should return true if frame address is taken.
llvm-svn: 73893
2009-06-22 18:38:48 +00:00
Dale Johannesen
bb07cd38e3 Testcase for (llvm-gcc) 73873. Usually
std::pair<double, float*>
is 16 bytes on darwin-powerpc, but not always.
See testcase for full weirdness.

llvm-svn: 73874
2009-06-22 04:47:32 +00:00
Dan Gohman
db7860aa40 Teach ScalarEvolution how to analyze loops with multiple exit
blocks, and also exit blocks with multiple conditions (combined
with (bitwise) ands and ors). It's often infeasible to compute an
exact trip count in such cases, but a useful upper bound can often
be found.

llvm-svn: 73866
2009-06-22 00:31:57 +00:00
Dan Gohman
eb0a67278b Fix ScalarEvolution's backedge-taken count computations to check for
overflow when computing a integer division to round up.

Thanks to Nick Lewycky for noticing this!

llvm-svn: 73862
2009-06-21 23:46:38 +00:00
Rafael Espindola
373c6bdbc5 Fix PR4185.
Handle FpSET_ST0_80 being used when ST0 is still alive.

llvm-svn: 73850
2009-06-21 12:02:51 +00:00
Nick Lewycky
4020821885 Expand this test to handle more cases (remainder and shifts) of zero.
llvm-svn: 73839
2009-06-21 01:56:41 +00:00
Chris Lattner
affcc71da2 implement PR4424: 0/x is always 0 for integer division.
llvm-svn: 73835
2009-06-21 01:15:55 +00:00
Chris Lattner
580eecebbd change TLS_ADDR lowering to lower to a real mem operand, instead of matching as
a global with that gets printed with the :mem modifier.  All operands to lea's 
should be handled with the lea32mem operand kind, and this allows the TLS stuff
to do this.  There are several better ways to do this, but I went for the minimal
change since I can't really test this (beyond make check).

This also makes the use of EBX explicit in the operand list in the 32-bit, 
instead of implicit in the instruction.

llvm-svn: 73834
2009-06-20 20:38:48 +00:00
Chris Lattner
965cc0e45b no need for unwind info
llvm-svn: 73832
2009-06-20 19:48:26 +00:00
Chris Lattner
33d1976328 no need for unwind info here.
llvm-svn: 73831
2009-06-20 19:43:09 +00:00
Evan Cheng
b45918e5bb Fix PR4419: handle defs of partial uses.
llvm-svn: 73816
2009-06-20 04:34:51 +00:00
Dan Gohman
b60dedbf0a Tweak this test to be a little less unusual.
llvm-svn: 73808
2009-06-20 00:40:56 +00:00
Dan Gohman
29100270c0 Generalize isLoopGuardedByCond's checking to consider two
SCEVUnknowns with identical Instructions to be equal. This allows
it to analze cases such as the attached testcase, where the front-end
has cloned the loop controlling expression. Along with r73805, this
lets IndVarSimplify eliminate all the sign-extend casts in the
loop in the attached testcase.

llvm-svn: 73807
2009-06-20 00:35:32 +00:00
Dan Gohman
651faa1905 Re-apply r73718, now that the fix in r73787 is in, and add a
hand-crafted testcase which demonstrates the bug that was exposed
in 254.gap.

llvm-svn: 73793
2009-06-19 23:23:27 +00:00
Evan Cheng
f18de63563 Enable arm pre-allocation load / store multiple optimization pass.
llvm-svn: 73791
2009-06-19 23:17:27 +00:00
Evan Cheng
b90241ac42 Revert 73718. It's breaking 254.gap.
llvm-svn: 73783
2009-06-19 21:15:06 +00:00
Dan Gohman
d920fdb643 Don't (unconditionally) use getSCEVAtScope to simplify the step
expression in IVUsers, because in the case of a use of a non-linear
addrec outside of a loop, this causes the addrec to be evaluated as
a linear addrec.

llvm-svn: 73774
2009-06-19 17:33:15 +00:00
Chris Lattner
8f6f044afd make jump threading handle lexically identical compare instructions
as if they were multiple uses of the same instruction.  This interacts
well with the existing loadpre that j-t does to open up many new jump
threads earlier.

llvm-svn: 73768
2009-06-19 16:27:56 +00:00
Eli Friedman
5cccb60bad Fix for PR2484: add an SSE1 pattern for a shuffle we normally prefer to
handle with an SSE2 instruction.

llvm-svn: 73760
2009-06-19 07:00:55 +00:00
Nick Lewycky
a5f89b09c6 Teach jump threading to look at comparisons between phi nodes and non-constants.
llvm-svn: 73755
2009-06-19 04:56:29 +00:00
Chris Lattner
8ddc06469c Improve tail call elim to move loads above readonly calls
when it allows forming a tail call.  Patch by Frits van
Bommel.  This implements PR4323.

llvm-svn: 73752
2009-06-19 04:22:16 +00:00
Chris Lattner
3a683c551f part of PR4405: disable a contentious optimization for
strcmp -> memcmp when the lengths of the strings are unknown.

Patch by Nick Lewycky!

llvm-svn: 73751
2009-06-19 04:17:36 +00:00
Eli Friedman
003abaa60d Mark a few Thumb instructions commutable; just happened to spot this
while experimenting.  I'm reasonably sure this is correct, but please 
tell me if these instructions have some strange property which makes this
change unsafe.

llvm-svn: 73746
2009-06-19 01:43:08 +00:00
Chris Lattner
cce5b90ede new testcase for rdar://6983634
llvm-svn: 73729
2009-06-18 22:53:26 +00:00
Evan Cheng
6c1c55f942 On Darwin, ams printer should output a second label before a jump table so the linker knows it's a new atom. But this is only needed if the jump table is put in a separate section from the function body.
llvm-svn: 73720
2009-06-18 20:37:15 +00:00
Dan Gohman
da82dc2ec1 Generalize LSR's OptimizeSMax to handle unsigned max tests as well
as signed max tests. Along with r73717, this helps CodeGen avoid
emitting code for a maximum operation for this class of loop.

llvm-svn: 73718
2009-06-18 20:23:18 +00:00
Dan Gohman
fd857b0406 Remove the code from IVUsers that attempted to handle
casted induction variables in cases where the cast
isn't foldable. It ended up being a pessimization in
many cases. This could be fixed, but it would require
a bunch of complicated code in IVUsers' clients. The
advantages of this approach aren't visible enough to
justify it at this time.

llvm-svn: 73706
2009-06-18 16:54:06 +00:00
Dan Gohman
dc884a7830 Generalize the zext(trunc(t) & C) instcombine to work even with
C is not a low-bits mask, and add a similar instcombine for
zext((trunc(t) & C) ^ C).

llvm-svn: 73705
2009-06-18 16:30:21 +00:00