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3a017e8abd
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6139 Commits

Author SHA1 Message Date
Evan Cheng
3a017e8abd Fix a bug in SelectScalarSSELoad. Since the load is wrapped in a 
SCALAR_TO_VECTOR, even if the hasOneUse() check pass we may end up folding
the load into two instructions. Make sure we check the SCALAR_TO_VECTOR
has only one use as well.

llvm-svn: 31641
 2006-11-10 21:23:04 +00:00
Chris Lattner
5e975945a5 dform 8/9 are identical to dform 1 
llvm-svn: 31637
 2006-11-10 17:51:02 +00:00
Evan Cheng
de7ff3fa3d Fix a potential bug. 
llvm-svn: 31634
 2006-11-10 09:13:37 +00:00
Evan Cheng
013597778d Add implicit def / use operands to MachineInstr. 
llvm-svn: 31633
 2006-11-10 08:43:01 +00:00
Chris Lattner
1604b6a873 add an initial cut at preinc loads for ppc32. This is broken for ppc64 
(because the 64-bit reg target versions aren't implemented yet), doesn't
support r+r addr modes, and doesn't handle stores, but it works otherwise. :)

This is disabled unless -enable-ppc-preinc is passed to llc for now.

llvm-svn: 31621
 2006-11-10 02:08:47 +00:00
Chris Lattner
15c49af63f add note about ugly codegen with preinc 
llvm-svn: 31617
 2006-11-10 01:33:53 +00:00
Evan Cheng
6f0095807e Use TargetInstrInfo::getNumOperands() instead of MachineInstr::getNumOperands(). In preparation for implicit reg def/use changes. 
llvm-svn: 31616
 2006-11-10 01:28:43 +00:00
Anton Korobeynikov
23ffdb1971 Fixing PR990: http://llvm.org/PR990. 
This should unbreak csretcc on Linux & mingw targets. Several tests from
llvm-test should be also restored (fftbench, bigfib).

llvm-svn: 31613
 2006-11-10 00:48:11 +00:00
Chris Lattner
48d2b0af37 add a note about viterbi 
llvm-svn: 31612
 2006-11-10 00:23:26 +00:00
Evan Cheng
d7df1a37bc PPC supports i32 / i64 pre-inc load / store. 
llvm-svn: 31599
 2006-11-09 19:11:50 +00:00
Evan Cheng
22bb3ba200 Rename ISD::MemOpAddrMode to ISD::MemIndexedMode 
llvm-svn: 31596
 2006-11-09 18:44:21 +00:00
Evan Cheng
89ee587963 Rename ISD::MemOpAddrMode to ISD::MemIndexedMode 
llvm-svn: 31595
 2006-11-09 17:55:04 +00:00
Rafael Espindola
5daebfdae0 implement load effective address similar to the alpha backend 
remove lea_addri and the now unused memri addressing mode

llvm-svn: 31592
 2006-11-09 13:58:55 +00:00
Evan Cheng
8743c67826 Remove M_2_ADDR_FLAG. 
llvm-svn: 31583
 2006-11-09 02:22:54 +00:00
Evan Cheng
019b921f3b Added indexed store node and patfrag's. 
llvm-svn: 31576
 2006-11-08 23:02:11 +00:00
Evan Cheng
2edeb17aed Use movl+xchgl instead of pushl+popl. 
llvm-svn: 31572
 2006-11-08 20:35:37 +00:00
Evan Cheng
736a8eb3cd Match tblegen changes. 
llvm-svn: 31571
 2006-11-08 20:34:28 +00:00
Rafael Espindola
f7b898d497 initial implementation of addressing mode 2 
TODO: fix lea_addri

llvm-svn: 31552
 2006-11-08 17:07:32 +00:00
Reid Spencer
da1f5b882a For PR950: 
This patch converts the old SHR instruction into two instructions,
AShr (Arithmetic) and LShr (Logical). The Shr instructions now are not
dependent on the sign of their operands.

llvm-svn: 31542
 2006-11-08 06:47:33 +00:00
Chris Lattner
bd39c99fd1 Refactor all the addressing mode selection stuff into the isel lowering 
class, where it can be used for preinc formation.

llvm-svn: 31536
 2006-11-08 02:15:41 +00:00
Chris Lattner
35fb10e1a4 correct the (currently unused) pattern for lwzu. 
llvm-svn: 31535
 2006-11-08 02:13:12 +00:00
Evan Cheng
7ca1f47a96 Fixed a bug which causes x86 be to incorrectly match 
shuffle v, undef, <2, ?, 3, ?>
to movhlps
It should match to unpckhps instead.

Added proper matching code for
shuffle v, undef, <2, 3, 2, 3>

llvm-svn: 31519
 2006-11-07 22:14:24 +00:00
Chris Lattner
f64e5f5f3e add a note from viterbi 
llvm-svn: 31506
 2006-11-07 18:30:21 +00:00
Chris Lattner
bed20e1a25 fix encoding of BLR 
llvm-svn: 31485
 2006-11-07 01:51:50 +00:00
Chris Lattner
c3e6822514 add a note 
llvm-svn: 31477
 2006-11-06 21:26:49 +00:00
Jeff Cohen
e1003da1a2 Unbreak VC++ build. 
llvm-svn: 31464
 2006-11-05 19:31:28 +00:00
Reid Spencer
be216ad603 Fix a bug in the last patch and convert to && instead of & for logical expr. 
llvm-svn: 31463
 2006-11-05 19:26:37 +00:00
Reid Spencer
f88c9b1dfc Implement the -enabled-cbe-printf-a feature. 
llvm-svn: 31462
 2006-11-05 17:09:41 +00:00
Chris Lattner
a193c9c977 encode BLR predicate info for the JIT 
llvm-svn: 31450
 2006-11-04 05:42:48 +00:00
Chris Lattner
a7687f805c Go through all kinds of trouble to mark 'blr' as having a predicate operand 
that takes a register and condition code.  Print these pieces of BLR the
right way, even though it is currently set to 'always'.

Next up: get the JIT encoding right, then enhance branch folding to produce
predicated blr for simple examples.

llvm-svn: 31449
 2006-11-04 05:27:39 +00:00
Chris Lattner
db04ba8502 Describe PPC predicates, which are a pair of CR# and condition. 
llvm-svn: 31438
 2006-11-03 23:53:25 +00:00
Chris Lattner
4296d2e0fa initial steps to getting the predicate on PPC::BLR right. 
llvm-svn: 31437
 2006-11-03 23:52:18 +00:00
Chris Lattner
f9394871ff remove dead var 
llvm-svn: 31436
 2006-11-03 23:50:15 +00:00
Chris Lattner
7c265ad682 remove dead/redundant vars 
llvm-svn: 31435
 2006-11-03 23:48:56 +00:00
Chris Lattner
a69c6416ca remove redundant/dead vars 
llvm-svn: 31434
 2006-11-03 23:47:20 +00:00
Chris Lattner
5f953f0927 remove dead vars 
llvm-svn: 31433
 2006-11-03 23:46:45 +00:00
Chris Lattner
2cb1391e09 add a note 
llvm-svn: 31429
 2006-11-03 22:27:39 +00:00
Rafael Espindola
3459a4b85b revert previous patch 
llvm-svn: 31411
 2006-11-03 03:08:28 +00:00
Evan Cheng
54c4be233e Dead code. 
llvm-svn: 31405
 2006-11-03 02:08:41 +00:00
Rafael Espindola
5cfe91aaca add createCFGSimplificationPass to ARMTargetMachine::addInstSelector 
llvm-svn: 31400
 2006-11-03 01:39:25 +00:00
Chris Lattner
294085b9be silence warning 
llvm-svn: 31395
 2006-11-03 01:19:31 +00:00
Chris Lattner
13ae6835d9 silence warnings. 
llvm-svn: 31394
 2006-11-03 01:18:29 +00:00
Chris Lattner
24e8fdc1f6 silence warning 
llvm-svn: 31393
 2006-11-03 01:13:15 +00:00
Chris Lattner
71ce2c5de5 silence warnings 
llvm-svn: 31392
 2006-11-03 01:11:05 +00:00
Reid Spencer
524974949d Make CBackend -pedantic clean. 
llvm-svn: 31388
 2006-11-03 00:00:57 +00:00
Chris Lattner
d0b2340384 fix a bug reid noticed 
llvm-svn: 31385
 2006-11-02 23:39:53 +00:00
Reid Spencer
4bafa71dc1 For PR786: 
Turn on -Wunused and -Wno-unused-parameter. Clean up most of the resulting
fall out by removing unused variables. Remaining warnings have to do with
unused functions (I didn't want to delete code without review) and unused
variables in generated code. Maintainers should clean up the remaining
issues when they see them. All changes pass DejaGnu tests and Olden.

llvm-svn: 31380
 2006-11-02 20:25:50 +00:00
Rafael Espindola
04afe6eb37 move ARMCondCodeToString to ARMAsmPrinter.cpp 
remove unused variables from lowerCall

llvm-svn: 31378
 2006-11-02 15:00:02 +00:00
Andrew Lenharth
c43c2d6966 fix 2006-11-01-vastart.ll 
llvm-svn: 31371
 2006-11-02 03:05:26 +00:00
Reid Spencer
1abf69e923 For PR950: 
Replace the REM instruction with UREM, SREM and FREM.

llvm-svn: 31369
 2006-11-02 01:53:59 +00:00