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Commit Graph

80756 Commits

Author SHA1 Message Date
Ahmed Bougacha
a463777c40 [CodeGenPrepare] Generalize inserted set from truncs to any inst.
It's been used before to avoid infinite loops caused by separate CGP
optimizations undoing one another.  We found one more such issue
caused by r238054.  To avoid it, generalize the "InsertedTruncs"
set to any inst, and use it to avoid touching those again.

llvm-svn: 239938
2015-06-17 20:44:32 +00:00
Rafael Espindola
f57f465bdf Move IsUsedInReloc from MCSymbolELF to MCSymbol.
There is a free bit is MCSymbol and MachO needs the same information.

llvm-svn: 239933
2015-06-17 20:08:20 +00:00
Peter Collingbourne
e555c294f0 LowerBitSets: Do not assign names to aliases of unnamed bitset element objects.
The restriction on unnamed aliases was removed in r239921. Mostly reverts
r239590, but we keep the test.

llvm-svn: 239923
2015-06-17 18:31:02 +00:00
Rafael Espindola
8f8f980667 Allow aliases to be unnamed.
If globals can be unnamed, there is no reason for aliases to be different.

The restriction was there since the original implementation in r36435. I
can only guess it was there because of the old bison parser for the old
alias syntax.

llvm-svn: 239921
2015-06-17 17:53:31 +00:00
Rafael Espindola
329b306f61 Use a range loop. NFC.
llvm-svn: 239919
2015-06-17 17:33:37 +00:00
Sanjay Patel
ba4efc1160 fix typos in comments; NFC
llvm-svn: 239916
2015-06-17 16:34:48 +00:00
Diego Novillo
8ef76ca78f Add documentation for new backedge mass propagation in irregular loops.
Tweak test cases and rename headerIndexFor -> getHeaderIndex.

llvm-svn: 239915
2015-06-17 16:28:22 +00:00
Rafael Espindola
d2efd01e25 Use named temporaries for directional labels.
Directional labels can show up in symbol tables (and we have a llvm-mc test for
that). Given that, we need to make sure they are named.

With that out of the way, use setUseNamesOnTempLabels in llvm-mc so that it
too benefits from the memory saving.

llvm-svn: 239914
2015-06-17 16:26:47 +00:00
Benjamin Kramer
44bf0bddeb [ArchiveWriter] Use EndianStream. No functional change intended.
llvm-svn: 239913
2015-06-17 16:02:56 +00:00
Benjamin Kramer
caf0e3931e [MC/Dwarf] Encode DW_CFA_advance_loc in target endianess.
This matches GNU as output.

llvm-svn: 239911
2015-06-17 15:14:35 +00:00
Toma Tabacu
90971b6321 [mips] [IAS] Add support for expanding LASym with a source register operand.
Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D9348

llvm-svn: 239910
2015-06-17 14:31:51 +00:00
James Y Knight
8fdb2dc157 Tweak wording of alignment static_assert messages.
llvm-svn: 239907
2015-06-17 13:53:12 +00:00
Toma Tabacu
7f7d164c31 [mips] [IAS] Add support for the B{L,G}{T,E}(U) branch pseudo-instructions.
Summary:
This does not include support for the immediate variants of these pseudo-instructions.
Fixes llvm.org/PR20968.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: seanbruno, emaste, llvm-commits

Differential Revision: http://reviews.llvm.org/D8537

llvm-svn: 239905
2015-06-17 13:20:24 +00:00
Toma Tabacu
c82a70e0d2 [mips] [IAS] Fix LA with relative label operands.
Summary:
Call MCSymbolRefExpr::create() with a MCSymbol* argument, not with a StringRef
of the Symbol's name, in order to avoid creating invalid temporary symbols for
relative labels (e.g. {$,.L}tmp00, {$,.L}tmp10 etc.).

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10498

llvm-svn: 239901
2015-06-17 12:30:37 +00:00
Toma Tabacu
8afae2abae [mips] [IAS] Fix LW with relative label operands.
Summary:
Previously, MCSymbolRefExpr::create() was called with a StringRef of the symbol
name, which it would then search for in the Symbols StringMap (from MCContext).

However, relative labels (which are temporary symbols) are apparently not stored
in the Symbols StringMap, so we end up creating a new {$,.L}tmp symbol
({$,.L}tmp00, {$,.L}tmp10 etc.) each time we create an MCSymbolRefExpr by
passing in the symbol name as a StringRef.

Fortunately, there is a version of MCSymbolRefExpr::create() which takes an
MCSymbol* and we already have an MCSymbol* at that point, so we can just pass
that in instead of the StringRef.

I also removed the local StringRef calls to MCSymbolRefExpr::create() from
expandMemInst(), as those cases can be handled by evaluateRelocExpr() anyway.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D9938

llvm-svn: 239897
2015-06-17 10:43:45 +00:00
Igor Breger
545927df8a AVX-512: cvtusi2ss/d intrinsics.
Change builtin function name and signature ( add third parameter - rounding mode ).
Added tests for intrinsics.

Differential Revision: http://reviews.llvm.org/D10473

llvm-svn: 239888
2015-06-17 07:23:57 +00:00
Chandler Carruth
a277e65c74 [PM/AA] Suffix lots of member variables that directly use enumeration
names for counts with the word 'Count' to make them less ambiguous.

This will be an actual error if we use unscoped enums for any of these,
and generally this seems much clearer to read.

Also, use clang-format to normalize the formatting of this code which
seems to have been needlessly odd.

No functionality changed here.

llvm-svn: 239887
2015-06-17 07:21:41 +00:00
Chandler Carruth
aa98916d54 [PM/AA] Remove the UnknownSize static member from AliasAnalysis.
This is now living in MemoryLocation, which is what it pertains to. It
is also an enum there rather than a static data member which is left
never defined.

llvm-svn: 239886
2015-06-17 07:21:38 +00:00
Chandler Carruth
cc1aae13e7 [PM/AA] Remove the Location typedef from the AliasAnalysis class now
that it is its own entity in the form of MemoryLocation, and update all
the callers.

This is an entirely mechanical change. References to "Location" within
AA subclases become "MemoryLocation", and elsewhere
"AliasAnalysis::Location" becomes "MemoryLocation". Hope that helps
out-of-tree folks update.

llvm-svn: 239885
2015-06-17 07:18:54 +00:00
Chandler Carruth
6ac32c5879 [PM/AA] Split the location computation out of getArgLocation so the
virtual interface on AliasAnalysis only deals with ModRef information.

This interface was both computing memory locations by using TLI and
other tricks to estimate the size of memory referenced by an operand,
and computing ModRef information through similar investigations. This
change narrows the scope of the virtual interface on AliasAnalysis
slightly.

Note that all of this code could live in BasicAA, and be done with
a single investigation of the argument, if it weren't for the fact that
the generic code in AliasAnalysis::getModRefBehavior for a callsite
calls into the virtual aspect of (now) getArgModRefInfo. But this
patch's arrangement seems a not terrible way to go for now.

The other interesting wrinkle is how we could reasonably extend LLVM
with support for custom memory location sizes and mod/ref behavior for
library routines. After discussions with Hal on the review, the
conclusion is that this would be best done by fleshing out the much
desired support for extensions to TLI, and support these types of
queries in that interface where we would likely be doing other library
API recognition and analysis.

Differential Revision: http://reviews.llvm.org/D10259

llvm-svn: 239884
2015-06-17 07:12:40 +00:00
Matthias Braun
53746a75e4 Revert "AArch64: Use CMP;CCMP sequences for and/or/setcc trees."
The patch triggers a miscompile on SPEC 2006 403.gcc with the (ref)
200.i and scilab.i inputs. I opened PR23866 to track analysis of this.

This reverts commit r238793.

llvm-svn: 239880
2015-06-17 04:02:32 +00:00
Colin LeMahieu
c9da0caf08 [Hexagon] Adding MC ELF streamer and updating addend relocation test which shows correct ELF symbol.
llvm-svn: 239876
2015-06-17 03:06:16 +00:00
James Y Knight
f3c63ab09b Fix alignment issues in LLVM.
Adds static_asserts to ensure alignment of concatenated objects is
correct, and fixes them where they are not.

Also changes the definition of AlignOf to use constexpr, except on
MSVC, to avoid enum comparison warnings from GCC.

(There's not too much of this in llvm itself, most of the fun is in
clang).

This seems to make LLVM actually work without Bus Error on 32bit
sparc.

Differential Revision: http://reviews.llvm.org/D10271

llvm-svn: 239872
2015-06-17 01:21:20 +00:00
Rafael Espindola
c12bb2a353 Handle forward referenced function when streaming bitcode.
Without this the included unit test would assert in

  assert(BasicBlockFwdRefs.empty() && "Unresolved blockaddress fwd references");

llvm-svn: 239871
2015-06-17 01:15:47 +00:00
Rafael Espindola
14bbdde4f5 Handle MaterializeAll in getLazyBitcodeModuleImpl. NFC.
This just handles both cases in the same place.

Extracted from a patch by Karl Schimpf.

llvm-svn: 239870
2015-06-17 00:40:56 +00:00
Rafael Espindola
ac851b9af7 Use std::unique_ptr to manage the DataStreamer in bitcode parsing.
We were already deleting it, this just makes it explicit.

llvm-svn: 239867
2015-06-16 23:29:49 +00:00
Rafael Espindola
5c0ce7ad5b Rename and improve emitSectionOffset.
Different object formats represent references from dwarf in different ways.

ELF uses a relocation to the referenced point (except for .dwo) and
COFF/MachO use the offset of the referenced point inside its section.

This patch renames emitSectionOffset because

* It doesn't produce an offset on ELF.
* It changes behavior depending on how DWARF is represented, so adding
dwarf to its name is probably a good thing.

The patch also adds an option to force the use of offsets.That avoids
funny looking code like

  if (!UseOffsets)
    Asm->emitSectionOffset....

It was correct, but read as if the ! was inverted.

llvm-svn: 239866
2015-06-16 23:22:02 +00:00
Tyler Nowicki
a672c833b7 Refactor RecurrenceInstDesc
Moved RecurrenceInstDesc into RecurrenceDescriptor to simplify the namespaces.

llvm-svn: 239862
2015-06-16 22:59:45 +00:00
Rafael Espindola
980b007510 Return a unique_ptr from getLazyBitcodeModule and parseBitcodeFile. NFC.
llvm-svn: 239858
2015-06-16 22:27:55 +00:00
Simon Pilgrim
cfcaa0aa93 [X86][SSE] Vectorize v2i32 to v2f64 conversions
This patch enables support for the conversion of v2i32 to v2f64 to use the CVTDQ2PD xmm instruction and stay on the SSE unit instead of scalarizing, sign extending to i64 and using CVTSI2SDQ scalar conversions.

Differential Revision: http://reviews.llvm.org/D10433

llvm-svn: 239855
2015-06-16 21:40:28 +00:00
Sanjay Patel
d6ce3c90d7 rename variables; NFC
...because I see 'StoreBW' and read it as 'store bandwidth'

llvm-svn: 239850
2015-06-16 20:47:19 +00:00
Philip Reames
fc6ddd62bf Reapply 239795 - [InstCombine] Propagate non-null facts to call parameters
The original change broke clang side tests.  I will be submitting those momentarily.  This change includes post commit feedback on the original change from from Pete Cooper.

Original Submission comments:
If a parameter to a function is known non-null, use the existing parameter attributes to record that fact at the call site. This has no optimization benefit by itself - that I know of - but is an enabling change for http://reviews.llvm.org/D9129.

Differential Revision: http://reviews.llvm.org/D9132

llvm-svn: 239849
2015-06-16 20:24:25 +00:00
Sanjay Patel
e37856c85e extract some code into a helper function for MergeConsecutiveStores(); NFCI
llvm-svn: 239847
2015-06-16 20:05:00 +00:00
Rafael Espindola
0eb007e8d1 Improve handling of end of file in the bitcode reader.
Before this patch the bitcode reader would read a module from a file
that contained in order:

* Any number of non MODULE_BLOCK sub blocks.
* One MODULE_BLOCK
* Any number of non MODULE_BLOCK sub blocks.
* 4 '\n' characters to handle OS X's ranlib.

Since we support lazy reading of modules, any information that is relevant
for the module has to be in the MODULE_BLOCK or before it. We don't gain
anything from checking what is after.

This patch then changes the reader to stop once the MODULE_BLOCK has been
successfully parsed.

This avoids the ugly special case for .bc files in an archive and makes it
easier to embed bitcode files.

llvm-svn: 239845
2015-06-16 20:03:39 +00:00
Diego Novillo
8e90e86295 Fix PR 23525 - Separate header mass propagation in irregular loops.
Summary:
When propagating mass through irregular loops, the mass flowing through
each loop header may not be equal. This was causing wrong frequencies
to be computed for irregular loop headers.

Fixed by keeping track of masses flowing through each of the headers in
an irregular loop. To do this, we now keep track of per-header backedge
weights. After the loop mass is distributed through the loop, the
backedge weights are used to re-distribute the loop mass to the loop
headers.

Since each backedge will have a mass proportional to the different
branch weights, the loop headers will end up with a more approximate
weight distribution (as opposed to the current distribution that assumes
that every loop header is the same).

Reviewers: dexonsmith

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10348

llvm-svn: 239843
2015-06-16 19:10:58 +00:00
Matthias Braun
2054e7965f VirtRegMap: Add undef flag when reading undefined subregisters.
While completely undefined registers are easy to catch and get their
<undef> flag early in ProcessImplicitDefs/RegisterCoalescer reading from
a partially defined register where just the subreg happens to be
undefined is harder to catch so we only add the undef flag in the
virtual register rewriting step.

No testcase as I cannot reproduce the problem on any of the in-tree targets at
the moment.

This fixes rdar://21387089

Differential Revision: http://reviews.llvm.org/D10470

llvm-svn: 239838
2015-06-16 18:22:28 +00:00
Matthias Braun
c47ad67935 TargetRegisterInfo: Make the concept of imprecise lane masks explicit
LaneMasks as given by getSubRegIndexLaneMask() have a limited number of
of bits, so for targets with more than 31 disjunct subregister there may
be cases where:

   getSubReg(Reg,A) does not overlap getSubReg(Reg,B)

but we still have

   (getSubRegIndexLaneMask(A) & getSubRegIndexLaneMask(B)) != 0.

I had hoped to keep this an implementation detail of the tablegen but as
my next commit shows we can avoid unnecessary imp-defs operands if we
know that the lane masks in use are precise.

This is in preparation to http://reviews.llvm.org/D10470.

llvm-svn: 239837
2015-06-16 18:22:26 +00:00
Reid Kleckner
d17a99c66d [X86] Rename some frame lowering variables
Old names, new names, and what they really mean:

- IsWin64 -> IsWin64CC: This is true on non-Windows x86_64 platforms
  when the ms_abi calling convention is used.
- IsWinEH -> IsWin64Prologue: True when the target is Win64, regardless
  of calling convention. Changes the prologue to obey the constraints of
  the Win64 unwinder.
- NeedsWinEH -> NeedsWinCFI: We're using the win64 prologue *and* the we
  want .xdata unwind tables. Analogous to NeedsDwarfCFI.

NFC

llvm-svn: 239836
2015-06-16 18:08:57 +00:00
Tyler Nowicki
0f2cf63b01 Rename Reduction variables/structures to Recurrence.
A reduction is a special kind of recurrence. In the loop vectorizer we currently
identify basic reductions. Future patches will extend this to identifying basic
recurrences.

llvm-svn: 239835
2015-06-16 18:07:34 +00:00
Frederic Riss
7782d32f12 Have MachOObjectFile::isValidArch() accept armv7
llvm-svn: 239833
2015-06-16 17:37:03 +00:00
Alex Lorenz
0c956ce7da MIR Parser: Report an error when a machine function doesn't have a corresponding function.
This commit reports an error when a machine function from a MIR file that contains
LLVM IR can't find a function with the same name in the loaded LLVM IR module.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10468

llvm-svn: 239831
2015-06-16 17:06:29 +00:00
Sanjay Patel
ace9860241 propagate IR-level fast-math-flags to DAG nodes, disabled by default
This is an updated version of the patch that was checked in at:
http://reviews.llvm.org/rL237046

but subsequently reverted because it exposed a bug in the DAG Combiner:
http://reviews.llvm.org/D9893

This time, there's an enablement flag ("EnableFMFInDAG") around the code in
SelectionDAGBuilder where we copy the set of FP optimization flags from IR
instructions to DAG nodes. So, in theory, there should be no functional change
from this patch as-is, but it will allow testing with the added functionality
to proceed via "-enable-fmf-dag" passed to llc.

This patch adds the minimum plumbing necessary to use IR-level
fast-math-flags (FMF) in the backend without actually using
them for anything yet. This is a follow-on to:
http://reviews.llvm.org/rL235997

Differential Revision: http://reviews.llvm.org/D10403

llvm-svn: 239828
2015-06-16 16:25:43 +00:00
Kit Barton
12e4595b58 Properly handle the mftb instruction.
The mftb instruction was incorrectly marked as deprecated in the PPC
Backend. Instead, it should not be treated as deprecated, but rather be
implemented using the mfspr instruction. A similar patch was put into GCC last
year. Details can be found at:

https://sourceware.org/ml/binutils/2014-11/msg00383.html.
This change will replace instances of the mftb instruction with the mfspr
instruction for all CPUs except 601 and pwr3. This will also be the default
behaviour.

Additional details can be found in:

https://llvm.org/bugs/show_bug.cgi?id=23680

Phabricator review: http://reviews.llvm.org/D10419

llvm-svn: 239827
2015-06-16 16:01:15 +00:00
Colin LeMahieu
765eef8121 [Hexagon] Alphabetical ordering of functions, NFC.
llvm-svn: 239826
2015-06-16 15:59:53 +00:00
Matt Arsenault
fbfa66ae3c Revert "Revert "Fix merges of non-zero vector stores""
Reapply r239539. Don't assume the collected number of
stores is the same vector size. Just take the first N
stores to fill the vector.

llvm-svn: 239825
2015-06-16 15:51:48 +00:00
Daniel Sanders
134c99480b Clean up redundant copies of Triple objects. NFC
Summary:

Reviewers: rengolin

Reviewed By: rengolin

Subscribers: llvm-commits, rengolin, jholewinski

Differential Revision: http://reviews.llvm.org/D10382

llvm-svn: 239823
2015-06-16 15:44:21 +00:00
Benjamin Kramer
ed6c97dbb7 [InstSimplify] Allow folding of fdiv X, X with just NaNs ignored
Any combination of +-inf/+-inf is NaN so it's already ignored with
nnan and we can skip checking for ninf. Also rephrase logic in comments
a bit.

llvm-svn: 239821
2015-06-16 14:57:29 +00:00
Daniel Sanders
3469cb7a94 [mips][ias] Expand on r238751 to cover as many relocs as possible.
Summary:
Relocs that can be converted from absolute to PC-relative now do so if IsPCRel
is true. Relocs that require PC-relative now call llvm_unreachable() if IsPCRel
is false and similarly those that require absolute assert that IsPCRel is false.

Note that while it looks like some relocs (e.g. R_MIPS_26) can be converted into
the MIPS32r6/MIPS64r6 relocs (R_MIPS_PC*_S2), it isn't actually valid to do so.

Placeholders have been left in the testcase for unsupported relocs and relocs
that cannot be generated at the moment.

Reviewers: vkalintiris

Reviewed By: vkalintiris

Subscribers: llvm-commits, rafael

Differential Revision: http://reviews.llvm.org/D10184

llvm-svn: 239817
2015-06-16 13:46:26 +00:00
Daniel Sanders
df4e26d91a Replace string GNU Triples with llvm::Triple in TargetMachine::getTargetTriple(). NFC.
Summary:
This continues the patch series to eliminate StringRef forms of GNU triples
from the internals of LLVM that began in r239036.

Reviewers: rengolin

Reviewed By: rengolin

Subscribers: llvm-commits, rengolin

Differential Revision: http://reviews.llvm.org/D10381

llvm-svn: 239815
2015-06-16 13:15:50 +00:00
Aaron Ballman
a1543a9359 Silence an MSVC warning about not all control paths returning a value; NFC.
llvm-svn: 239814
2015-06-16 13:14:59 +00:00
Daniel Sanders
4f36d138c9 Recommit r239721: Replace string GNU Triples with llvm::Triple in InitMCObjectFileInfo. NFC.
Summary:
This affects other tools so the previous C++ API has been retained as a
deprecated function for the moment. Clang has been updated with a trivial
patch (not covered by the pre-commit review) to avoid breaking -Werror builds.
Other in-tree tools will be fixed with similar patches.

This continues the patch series to eliminate StringRef forms of GNU triples
from the internals of LLVM that began in r239036.

The first time this was committed it accidentally fixed an inconsistency in
triples in llvm-mc and this caused a failure. This inconsistency was fixed in
r239808.

Reviewers: rengolin

Reviewed By: rengolin

Subscribers: llvm-commits, rengolin

Differential Revision: http://reviews.llvm.org/D10366

llvm-svn: 239812
2015-06-16 12:18:07 +00:00
Toma Tabacu
3bbc325a64 [mips] [IAS] Refactor symbol-address loading code into a helper function. NFC.
Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D9523

llvm-svn: 239811
2015-06-16 12:16:24 +00:00
Arnaud A. de Grandmaison
661e791e77 [MachineSink] Address post-commit review comments
The successors cache is now a local variable, making it more visible that it
is only valid for the MBB being processed.

llvm-svn: 239807
2015-06-16 08:57:21 +00:00
Asaf Badouh
9879449284 [AVX512] add integer min/max intrinsics support.
review:
http://reviews.llvm.org/D10439

llvm-svn: 239806
2015-06-16 08:39:27 +00:00
Elena Demikhovsky
7cf9dd07b7 X86: optimized i64 vector multiply with constant
When we multiply two 64-bit vectors, we extract lower and upper part and use the PMULUDQ instruction.
When one of the operands is a constant, the upper part may be zero, we know this at compile time.
Example: %a = mul <4 x i64> %b, <4 x i64> < i64 5, i64 5, i64 5, i64 5>.
I'm checking the value of the upper part and prevent redundant "multiply", "shift" and "add" operations.

llvm-svn: 239802
2015-06-16 06:07:24 +00:00
Philip Reames
2aad4769d2 Revert 239795
I forgot to update some clang test cases.  I'll fix and resubmit tomorrow.

llvm-svn: 239800
2015-06-16 01:20:53 +00:00
Ahmed Bougacha
e339d025d2 [AArch64] Generalize extract-high DUP extension to MOVI/MVNI.
These are really immediate DUPs, and suffer from the same problem
with long instructions with a high/2 variant (e.g. smull).

By extending a MOVI (or DUP, before this patch), we can avoid an ext
on the other operand of the long instruction, e.g. turning:
    ext.16b v0, v0, v0, #8
    movi.4h v1, #0x53
    smull.4s  v0, v0, v1
into:
    movi.8h v1, #0x53
    smull2.4s  v0, v0, v1

While there, add a now-necessary combine to fold (VT NVCAST (VT x)).

llvm-svn: 239799
2015-06-16 01:18:14 +00:00
Philip Reames
d5e8ff17a6 Move logic from JumpThreading into LazyValue info to simplify caller.
This change is hopefully NFC. The only tricky part is that I changed the context instruction being used to the branch rather than the comparison. I believe both to be correct, but the branch is strictly more powerful. With the moved code, using the branch instruction is required for the basic block comparison test to return the same result. The previous code was able to directly access both the branch and the comparison where the revised code is not.

Differential Revision: http://reviews.llvm.org/D9652

llvm-svn: 239797
2015-06-16 00:49:59 +00:00
Duncan P. N. Exon Smith
28058eb1bf modules: Add explicit dependency on intrinsics_gen
`LLVM_ENABLE_MODULES` builds sometimes fail because `Intrinsics.td`
needs to regenerate `Instrinsics.h` before anyone can include anything
from the LLVM_IR module.  Represent the dependency explicitly to prevent
that.

llvm-svn: 239796
2015-06-16 00:44:12 +00:00
Philip Reames
54716a6f5b [InstCombine] Propagate non-null facts to call parameters
If a parameter to a function is known non-null, use the existing parameter attributes to record that fact at the call site. This has no optimization benefit by itself - that I know of - but is an enabling change for http://reviews.llvm.org/D9129.

Differential Revision: http://reviews.llvm.org/D9132

llvm-svn: 239795
2015-06-16 00:43:54 +00:00
Alex Lorenz
0686df9bd6 MIR Serialization: Print and parse simple machine function attributes.
This commit serializes the simple, scalar attributes from the 
'MachineFunction' class.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10449

llvm-svn: 239790
2015-06-16 00:10:47 +00:00
Alex Lorenz
afd4fe4e6c MIR Serialization: move the MIR printer out of the MIR printing pass.
This commit decouples the MIR printer and the MIR printing pass so
that it will be possible to move the MIR printer into a separate 
machine IR library later on.

Reviewers: Duncan P. N. Exon Smith
llvm-svn: 239788
2015-06-15 23:52:35 +00:00
Reid Kleckner
b0f9490716 [X86] Try to shorten dwarf CFI emission
llvm-svn: 239786
2015-06-15 23:45:08 +00:00
Adrian Prantl
5862854484 Debug Info IR: Switch DIObjCProperty to use DITypeRef.
This is a prerequisite for turning on ODR type uniquing for ObjC++.

rdar://problem/21377883

llvm-svn: 239780
2015-06-15 23:18:03 +00:00
Alex Lorenz
2bb5b54b20 MIR Serialization: Create dummy functions when the MIR file doesn't have LLVM IR.
This commit creates a dummy LLVM IR function with one basic block and an unreachable
instruction for each parsed machine function when the MIR file doesn't have LLVM IR.
This change is required as the machine function analysis pass creates machine
functions only for the functions that are defined in the current LLVM module.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10135

llvm-svn: 239778
2015-06-15 23:07:38 +00:00
Alex Lorenz
188c86c010 MIR Serialization: Report an error when machine functions have the same name.
This commit reports an error when the MIR parser encounters a machine
function with the name that is the same as the name of a different
machine function.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10130

llvm-svn: 239774
2015-06-15 22:23:23 +00:00
Colin LeMahieu
454daa07b2 [Hexagon] PC-relative offsets are relative to packet start rather than the offset of the relocation. Set relocation addend and check it's correct in the ELF.
llvm-svn: 239769
2015-06-15 21:52:13 +00:00
Peter Collingbourne
ea9bf98c05 Protection against stack-based memory corruption errors using SafeStack
This patch adds the safe stack instrumentation pass to LLVM, which separates
the program stack into a safe stack, which stores return addresses, register
spills, and local variables that are statically verified to be accessed
in a safe way, and the unsafe stack, which stores everything else. Such
separation makes it much harder for an attacker to corrupt objects on the
safe stack, including function pointers stored in spilled registers and
return addresses. You can find more information about the safe stack, as
well as other parts of or control-flow hijack protection technique in our
OSDI paper on code-pointer integrity (http://dslab.epfl.ch/pubs/cpi.pdf)
and our project website (http://levee.epfl.ch).

The overhead of our implementation of the safe stack is very close to zero
(0.01% on the Phoronix benchmarks). This is lower than the overhead of
stack cookies, which are supported by LLVM and are commonly used today,
yet the security guarantees of the safe stack are strictly stronger than
stack cookies. In some cases, the safe stack improves performance due to
better cache locality.

Our current implementation of the safe stack is stable and robust, we
used it to recompile multiple projects on Linux including Chromium, and
we also recompiled the entire FreeBSD user-space system and more than 100
packages. We ran unit tests on the FreeBSD system and many of the packages
and observed no errors caused by the safe stack. The safe stack is also fully
binary compatible with non-instrumented code and can be applied to parts of
a program selectively.

This patch is our implementation of the safe stack on top of LLVM. The
patches make the following changes:

- Add the safestack function attribute, similar to the ssp, sspstrong and
  sspreq attributes.

- Add the SafeStack instrumentation pass that applies the safe stack to all
  functions that have the safestack attribute. This pass moves all unsafe local
  variables to the unsafe stack with a separate stack pointer, whereas all
  safe variables remain on the regular stack that is managed by LLVM as usual.

- Invoke the pass as the last stage before code generation (at the same time
  the existing cookie-based stack protector pass is invoked).

- Add unit tests for the safe stack.

Original patch by Volodymyr Kuznetsov and others at the Dependable Systems
Lab at EPFL; updates and upstreaming by myself.

Differential Revision: http://reviews.llvm.org/D6094

llvm-svn: 239761
2015-06-15 21:07:11 +00:00
Rafael Espindola
1ac4925391 Don't indent inside a namespace. NFC.
llvm-svn: 239760
2015-06-15 21:04:27 +00:00
Rafael Espindola
c547b8123f Replace @ with the more common \. NFC.
llvm-svn: 239759
2015-06-15 21:02:49 +00:00
Rafael Espindola
176f434362 Don't repeat names in comments and start functions with a lower case letter.
llvm-svn: 239756
2015-06-15 20:55:37 +00:00
Alex Lorenz
2e08d769c3 MIR Serialization: Connect the machine function analysis pass to the MIR parser.
This commit connects the machine function analysis pass (which creates machine
functions) to the MIR parser, which will initialize the machine functions 
with the state from the MIR file and reconstruct the machine IR.

This commit introduces a new interface called 'MachineFunctionInitializer',
which can be used to provide custom initialization for the machine functions.

This commit also introduces a new diagnostic class called 
'DiagnosticInfoMIRParser' which is used for MIR parsing errors.
This commit modifies the default diagnostic handling in LLVMContext - now the
the diagnostics are printed directly into llvm::errs() so that the MIR parsing 
errors can be printed with colours.  

Reviewers: Justin Bogner

Differential Revision: http://reviews.llvm.org/D9928

llvm-svn: 239753
2015-06-15 20:30:22 +00:00
Eric Christopher
b7f0e9d828 Remove duplicate conditional in if-stmt.
Fixes PR23839.

llvm-svn: 239751
2015-06-15 20:16:53 +00:00
Rafael Espindola
25d2a4fa0c Cleanup the constructor of BitcodeReader. NFC.
Use the same argument names as the members.
Use default member initializes.

Extracted from a patch by Karl Schimpf.

llvm-svn: 239749
2015-06-15 20:08:17 +00:00
Sanjoy Das
a95063f8bb Unbreak the build from r239740.
Do not re-use an enum name as a field name.  Some bots don't like this.

llvm-svn: 239746
2015-06-15 19:29:44 +00:00
Colin LeMahieu
d0b4dab4b6 [Hexagon] Moving pass declarations out of header and in to implementation files. Removing unused function getSubtargetInfo from HexagonMCCodeEmitter.cpp Removing deletion of copy construction and assignment operator since parent already deletes it.
llvm-svn: 239744
2015-06-15 19:05:35 +00:00
Sanjoy Das
cc16b02fd5 [CodeGen] Add a pass to fold null checks into nearby memory operations.
Summary:
This change adds an "ImplicitNullChecks" target dependent pass.  This
pass folds null checks into memory operation using the FAULTING_LOAD
pseudo-op introduced in previous patches.

Depends on D10197
Depends on D10199
Depends on D10200

Reviewers: reames, rnk, pgavlin, JosephTremoulet, atrick

Reviewed By: atrick

Subscribers: ab, JosephTremoulet, llvm-commits

Differential Revision: http://reviews.llvm.org/D10201

llvm-svn: 239743
2015-06-15 18:44:27 +00:00
Sanjoy Das
f1dab90647 [TargetInstrInfo] Add new hook: AnalyzeBranchPredicate.
Summary:
NFC: no one uses AnalyzeBranchPredicate yet.

Add TargetInstrInfo::AnalyzeBranchPredicate and implement for x86.  A
later change adding support for page-fault based implicit null checks
depends on this.

Reviewers: reames, ab, atrick

Reviewed By: atrick

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10200

llvm-svn: 239742
2015-06-15 18:44:21 +00:00
Sanjoy Das
ce0590cf7a [TargetInstrInfo] Rename getLdStBaseRegImmOfs and implement for x86.
Summary:

TargetInstrInfo::getLdStBaseRegImmOfs to
TargetInstrInfo::getMemOpBaseRegImmOfs and implement for x86.  The
implementation only handles a few easy cases now and will be made more
sophisticated in the future.

This is NFCI: the only user of `getLdStBaseRegImmOfs` (now
`getmemOpBaseRegImmOfs`) is `LoadClusterMotion` and `LoadClusterMotion`
is disabled for x86.

Reviewers: reames, ab, MatzeB, atrick

Reviewed By: MatzeB, atrick

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10199

llvm-svn: 239741
2015-06-15 18:44:14 +00:00
Sanjoy Das
b396b9e375 [CodeGen] Introduce a FAULTING_LOAD_OP pseudo-op.
Summary:
This instruction encodes a loading operation that may fault, and a label
to branch to if the load page-faults.  The locations of potentially
faulting loads and their "handler" destinations are recorded in a
FaultMap section, meant to be consumed by LLVM's clients.

Nothing generates FAULTING_LOAD_OP instructions yet, but they will be
used in a future change.

The documentation (FaultMaps.rst) needs improvement and I will update
this diff with a more expanded version shortly.

Depends on D10196

Reviewers: rnk, reames, AndyAyers, ab, atrick, pgavlin

Reviewed By: atrick, pgavlin

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10197

llvm-svn: 239740
2015-06-15 18:44:08 +00:00
Sanjoy Das
dc981cb399 [NFC] Extract X86MCInstLower::LowerMachineOperand.
Summary: Refactoring-only change that will be used later.

Reviewers: reames, atrick

Reviewed By: atrick

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10196

llvm-svn: 239739
2015-06-15 18:44:01 +00:00
Yaron Keren
fd88932f59 De-duplicate common expression, NFC.
llvm-svn: 239736
2015-06-15 17:03:35 +00:00
Yaron Keren
8c25ff7ebc Rangify several for loops, NFC.
llvm-svn: 239733
2015-06-15 16:20:16 +00:00
Evgeny Astigeevich
0dabab1ee4 On behalf of Alexandros Lamprineas:
LLVM targeting aarch64 doesn't correctly produce aligned accesses for non-aligned
data at -O0/fast-isel (-mno-unaligned-access).
The root cause seems to be in fast-isel not producing unaligned access correctly
for -mno-unaligned-access.

The patch just aborts fast-isel for loads and stores when -mno-unaligned-access is
present. 
The regression test is updated to check this new test case (-mno-unaligned-access 
together with fast-isel).

Differential Revision: http://reviews.llvm.org/D10360

llvm-svn: 239732
2015-06-15 15:48:44 +00:00
Daniel Sanders
52648be0df Revert r239721 - Replace string GNU Triples with llvm::Triple in InitMCObjectFileInfo. NFC.
It appears to cause sparc-little-endian.s to assert on Windows and Darwin.

llvm-svn: 239724
2015-06-15 10:34:38 +00:00
Daniel Sanders
15d01ae3f0 Replace string GNU Triples with llvm::Triple in InitMCObjectFileInfo. NFC.
Summary:
This affects other tools so the previous C++ API has been retained as a
deprecated function for the moment. Clang has been updated with a trivial
patch (not covered by the pre-commit review) to avoid breaking -Werror builds.
Other in-tree tools will be fixed with similar trivial patches.

This continues the patch series to eliminate StringRef forms of GNU triples
from the internals of LLVM that began in r239036.

Reviewers: rengolin

Reviewed By: rengolin

Subscribers: llvm-commits, rengolin

Differential Revision: http://reviews.llvm.org/D10366

llvm-svn: 239721
2015-06-15 09:19:41 +00:00
Arnaud A. de Grandmaison
dd364adbdb [MachineSink] Improve runtime performance. NFC.
This patch fixes a compilation time issue, when MachineSink faces PHIs
with a huge number of operands. This can happen for example in goto table
based interpreters, where some basic blocks can have several of those PHIs,
each one with several hundreds operands. MachineSink was spending a
significant time re-building and re-sorting the list of successors of
the current MachineBasicBlock. The computing and sorting of the current
MachineBasicBlock successors is now cached.

llvm-svn: 239720
2015-06-15 09:09:06 +00:00
Jingyue Wu
88ed36369b [ValueTracking] do not overwrite analysis results already computed
Summary:
ValueTracking used to overwrite the analysis results computed from
assumes and dominating conditions. This patch fixes this issue.

Test Plan: test/Analysis/ValueTracking/assume.ll

Reviewers: hfinkel, majnemer

Reviewed By: majnemer

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10283

llvm-svn: 239718
2015-06-15 05:46:29 +00:00
Hao Liu
27ebfb93f8 [AArch64] Delete two empty files, which should be removed by r239713.
llvm-svn: 239715
2015-06-15 02:56:40 +00:00
Hao Liu
98f2c1622d [AArch64] Revert r239711 again. We need to discuss how to share code between AArch64 and ARM backend.
llvm-svn: 239713
2015-06-15 01:56:40 +00:00
Hao Liu
3a81303ff9 [AArch64] Match interleaved memory accesses into ldN/stN instructions.
Re-commit after adding "-aarch64-neon-syntax=generic" to fix the failure on OS X.
This patch was firstly committed in r239514, then reverted in r239544 because of a syntax incompatible failure on OS X.

llvm-svn: 239711
2015-06-15 01:35:49 +00:00
Benjamin Kramer
ea33a66cc1 [InstSimplify] fsub nnan x, x -> 0.0 is valid without ninf
Both inf - inf and (-inf) - (-inf) are NaN, so it's already covered by
nnan.

llvm-svn: 239702
2015-06-14 21:01:20 +00:00
Benjamin Kramer
fea304711c [InstSimplify] Add self-fdiv identities for -ffinite-math-only.
When NaNs and Infs are ignored we can fold
 X /  X -> 1.0
-X /  X -> -1.0
 X / -X -> -1.0

llvm-svn: 239701
2015-06-14 18:53:58 +00:00
Igor Breger
bf950bad09 AVX-512: Implemented DAG lowering for shuff62x2/shufi62x2 instuctions ( Shuffle Packed Values at 128-bit Granularity )
Tests added , vector-shuffle-512-v8.ll test re-generated.

Differential Revision: http://reviews.llvm.org/D10300

llvm-svn: 239697
2015-06-14 13:07:47 +00:00
Michael Kuperstein
915c69271d Add support for parsing the XOR operator in Intel syntax inline assembly.
Differential Revision: http://reviews.llvm.org/D10385
Patch by marina.yatsina@intel.com

llvm-svn: 239695
2015-06-14 12:59:45 +00:00
Igor Breger
f163333815 AVX-512: Implemented cvtsi2ss/d cvtusi2ss/d instructions with round control for KNL.
Added intrinsics for cvtsi2ss/d instructions.
Added tests for intrinsics and encoding.

Differential Revision: http://reviews.llvm.org/D10430

llvm-svn: 239694
2015-06-14 12:44:55 +00:00
NAKAMURA Takumi
0edb1f8355 AsmPrinter.cpp: Avoid crashes for targeting like "arm-mingw32". CurrentFnSym might not be <MCSymbolELF> here.
llvm-svn: 239692
2015-06-14 00:23:40 +00:00
NAKAMURA Takumi
1b0f1c8f9b Reformat.
llvm-svn: 239691
2015-06-14 00:23:33 +00:00
Benjamin Kramer
4cf983b4ff [Statepoints] Skip a vector copy when uniquing values.
No functionality change intended.

llvm-svn: 239688
2015-06-13 19:50:38 +00:00
Benjamin Kramer
3dd5c1fd9a [ExecutionEngine] ArrayRefize argument passing.
No functionality change intended.

llvm-svn: 239687
2015-06-13 19:50:29 +00:00
Yaron Keren
485ad12f68 C++11 Rangify loops in AssemblyWriter::printModule, NFC.
llvm-svn: 239686
2015-06-13 17:50:47 +00:00
Rafael Espindola
da86c89e4a Don't use std::errc.
As noted on Errc.h:

// * std::errc is just marked with is_error_condition_enum. This means that
//   common patters like AnErrorCode == errc::no_such_file_or_directory take
//   4 virtual calls instead of two comparisons.

And on some libstdc++ those virtual functions conclude that

------------------------
int main() {
  std::error_code foo = std::make_error_code(std::errc::no_such_file_or_directory);
  return foo == std::errc::no_such_file_or_directory;
}
-------------------------

should exit with 0.

llvm-svn: 239683
2015-06-13 17:23:04 +00:00
Simon Pilgrim
8e1425876a [DAGCombiner] Added BSWAP(BSWAP(x)) -> x combine pattern.
llvm-svn: 239682
2015-06-13 16:25:12 +00:00
Sanjay Patel
fbf2cb2852 hoist loop-invariant; NFCI
llvm-svn: 239681
2015-06-13 15:33:15 +00:00
Sanjay Patel
240207c1c1 remove function names from comments and clean up; NFC
llvm-svn: 239680
2015-06-13 15:32:45 +00:00
Simon Pilgrim
9be291c83a [SelectionDAG] Added assertions + UNDEF handling for BSWAP node creation.
llvm-svn: 239679
2015-06-13 15:23:58 +00:00
Sanjay Patel
377794fb38 remove unnecessary casts; NFCI
llvm-svn: 239678
2015-06-13 15:06:33 +00:00
Simon Pilgrim
bbad42fdb3 [DAGCombiner] Added BSWAP vector constant folding support.
llvm-svn: 239675
2015-06-13 14:08:15 +00:00
Simon Pilgrim
663e69fd66 Stripped trailing whitespace. NFC.
llvm-svn: 239674
2015-06-13 12:57:36 +00:00
Simon Pilgrim
0f06a86b5d Stripped trailing whitespace. NFC.
llvm-svn: 239672
2015-06-13 12:51:39 +00:00
Rafael Espindola
3e9c3a2ef1 Bring in a BumpPtrStringSaver from lld and simplify the interface.
StringSaver now always saves to a BumpPtrAllocator.

The only reason for having the virtual saveImpl is so lld can have a
thread safe version.

The reason for the distinct BumpPtrStringSaver class is to avoid the
virtual destructor.

llvm-svn: 239669
2015-06-13 12:49:52 +00:00
Tom Stellard
665c24e443 AMDGPU: s/R600/AMDGPU/ in the Makefiles
Now the library names in the Makefiles match the library names in
LLVMBuild.txt.

This should hopefully fix the remaining bot failures.

llvm-svn: 239661
2015-06-13 05:11:14 +00:00
Matthias Braun
729d1d707d Rename TargetSubtargetInfo::enablePostMachineScheduler() to enablePostRAScheduler()
r213101 changed the behaviour of this method to not only affect the
PostMachineScheduler scheduler but also the PostRAScheduler scheduler,
renaming should make this fact clear. Also document that the preferred
way is to specify this in the scheduling model instead of overriding
this method.

Differential Revision: http://reviews.llvm.org/D10427

llvm-svn: 239659
2015-06-13 03:42:16 +00:00
Matthias Braun
e311841a60 MachineLICM: Use TargetSchedModel instead of just itineraries
This will use Itinieraries if available, but will also work if just a
MCSchedModel is available.

Differential Revision: http://reviews.llvm.org/D10428

llvm-svn: 239658
2015-06-13 03:42:11 +00:00
Tom Stellard
3f1708598e R600 -> AMDGPU rename
llvm-svn: 239657
2015-06-13 03:28:10 +00:00
Matt Wala
15e876374e Revert 239644.
llvm-svn: 239650
2015-06-13 01:08:00 +00:00
Tim Northover
ddc656df8e AArch64: map bare-metal arm64-macho triple to MachO MC layer.
Far better than an assertion about expecting ELF.

llvm-svn: 239647
2015-06-12 23:37:11 +00:00
Eli Bendersky
e0af51f2dc Fix returning error message in LLVMLinkModules
On error, the temporary output stream wouldn't be flushed and therefore the
caller would see an empty error message.

Patch by Antoine Pitrou

Differential Revision: http://reviews.llvm.org/D10241 

llvm-svn: 239646
2015-06-12 23:26:42 +00:00
Matt Wala
aa0a67fb77 [Scalarizer] Fix potential for stale data in Scattered across invocations
Summary:
Scalarizer has two data structures that hold information about changes
to the function, Gathered and Scattered. These are cleared in finish()
at the end of runOnFunction() if finish() detects any changes to the
function. 

However, finish() was checking for changes by only checking if
Gathered was non-empty. The function visitStore() only modifies
Scattered without touching Gathered. As a result, Scattered could have
ended up having stale data if Scalarizer only scalarized store
instructions. Since the data in Scattered is used during the execution
of the pass, this introduced dangling pointer errors. 

The fix is to check whether both Scattered and Gathered are empty
before deciding what to do in finish().

Reviewers: srhines

Reviewed By: srhines

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10422

llvm-svn: 239644
2015-06-12 22:49:11 +00:00
Lang Hames
920fcbb99b [Orc] Fix a bug in the CompileOnDemand layer where stub decls were not cloned
into partitions. Also, add an option to clone stub definitions (not just decls)
into partitions: these definitions could be inlined in some places to avoid the
overhead of calling via the stub.

Found by inspection - no test case yet, although I plan to add a unit test for
this once the CompileOnDemand layer refactoring settles down.

llvm-svn: 239640
2015-06-12 21:31:15 +00:00
Tom Stellard
2b78afe7cf R600/SI: Add assembler support for FLAT instructions
- Add glc, slc, and tfe operands to flat instructions
- Add missing flat instructions
- Fix the encoding of flat_load_dwordx3 and flat_store_dwordx3.

llvm-svn: 239637
2015-06-12 20:47:06 +00:00
Yaron Keren
5e21e81e4e Rangify several for loops in ValueEnumerator constructor.
llvm-svn: 239636
2015-06-12 20:18:20 +00:00
Colin LeMahieu
68ef17e4c2 [Hexagon] Making intrinsic tests agnostic to register allocation. Narrowing intrinsic parameters to appropriate width.
llvm-svn: 239634
2015-06-12 19:57:32 +00:00
Douglas Katzman
5eb858225c Wrap some long lines in LLVMBuild files. NFC
As suggested by jroelofs in a prior review (D9752),
it makes sense to generally prefer multi-line format.

llvm-svn: 239632
2015-06-12 18:44:57 +00:00
Douglas Katzman
be1678072c Add 'shave' processor name to Triple
Based on ArchType, Clang's driver can select a non-Clang compiler.
String parsing in Clang would have sufficed if it were only that,
however this change anticipates true llvm support.

Differential Revision: http://reviews.llvm.org/D10413

llvm-svn: 239631
2015-06-12 18:31:38 +00:00
David Blaikie
b564d5b7e0 Refix a use of explicit pointer types in GEP constant folding
In the glorious future of opaque pointer types, it won't be possible to
retrieve the pointee type of a pointer type which is what's being done
in this GEP loop - but the first iteration is always a pointer type and
the loop doesn't care about that case, except whether or not the index
is a constant.

So pull that special case out before the loop and start at the second
iteration (index 1) instead.

Originally committed in r236670 and reverted with a test case in
r239015. This change keeps the test case working while also avoiding
depending on pointee types.

llvm-svn: 239629
2015-06-12 18:22:03 +00:00
Matt Wala
59a43c7756 Fix a typo in a comment in MemCpyOpt (test commit)
llvm-svn: 239628
2015-06-12 18:16:51 +00:00
Yaron Keren
932d716783 Rangify two for loops in BitcodeReader.cpp.
llvm-svn: 239627
2015-06-12 18:13:20 +00:00
Pete Cooper
a9c553dd18 Move OperandList to be allocated prior to User for hung off subclasses.
For hung off uses, we need a Use* to tell use where the operands are.
This was User::OperandList but we want to remove that to save space
of all subclasses which aren't making use of 'hung off uses'.

Hung off uses now allocate their own 'OperandList' Use* in the
User::new which they call.

getOperandList() now uses the hung off uses bit to work out where the
Use* for the OperandList lives.  If a User has hung off uses, then this
bit tells them to go back a single Use* from the User* and use that
value as the OperandList.

If a User has no hung off uses, then we get the first operand by
subtracting (NumOperands * sizeof(Use)) from the User this pointer.

This saves a pointer from User and all subclasses.  Given the average
size of a subclass of User is 112 or 128 bytes, this saves around 7% of space
With malloc tending to align to 16-bytes the real saving is typically more like 3.5%.

On 'opt -O2 verify-uselistorder.lto.bc', peak memory usage prior to this change
is 149MB and after is 143MB so the savings are around 2.5% of peak.

Looking at some passes which allocate many Instructions and Values, parseIR drops
from 54.25MB to 52.21MB while the Inliner calls to Instruction::clone() drops
from 28.20MB to 27.05MB.

Reviewed by Duncan Exon Smith.

llvm-svn: 239623
2015-06-12 17:48:18 +00:00
Pete Cooper
fe53a1ccb4 Added a version of User::new for hung off uses.
There are now 2 versions of User::new.  The first takes a size_t and is the current
implementation for subclasses which need 0 or more Use's allocated for their operands.

The new version takes no extra arguments to say that this subclass needs 'hung off uses'.
The HungOffUses bool is now set in this version of User::new and we can assert in
allocHungOffUses that we are allowed to have hung off uses.
This ensures we call the correct version of User::new for subclasses which need hung off uses.

A future commit will then allocate space for a single Use* which will be used
in place of User::OperandList once that field has been removed.

Reviewed by Duncan Exon Smith.

llvm-svn: 239622
2015-06-12 17:48:14 +00:00
Pete Cooper
eeab7b6f62 Rename NumOperands to make it clear its managed by the User. NFC.
This is to try make it very clear that subclasses shouldn't be changing
the value directly.  Now that OperandList for normal instructions is computed
using the NumOperands, its critical that the NumOperands is accurate or we
could compute the wrong offset to the first operand.

I looked over all places which update NumOperands and they are all safe.
Hung off use User's don't use NumOperands to compute the OperandList so they
are safe to continue to manipulate it.  The only other User which changed it
was GlobalVariable which has an optional init list but always allocated space
for a single Use.  It was correctly setting NumOperands to 1 before setting an
initializer, and setting it to 0 after clearing the init list, so the order was safe.

Added some comments to that code to make sure that this isn't changed in future
without being aware of this constraint.

Reviewed by Duncan Exon Smith.

llvm-svn: 239621
2015-06-12 17:48:10 +00:00
Pete Cooper
7cf957b205 Replace all accesses to User::OperandList with getter and setter methods. NFC.
We don't want anyone to access OperandList directly as its going to be removed
and computed instead.  This uses getter's and setter's instead in which we
can later change the underlying implementation of OperandList.

Reviewed by Duncan Exon Smith.

llvm-svn: 239620
2015-06-12 17:48:05 +00:00
Pete Cooper
6223a0cd29 Don't create instructions from ConstantExpr's in CFLAliasAnalysis.
The CFLAA code currently calls ConstantExpr::getAsInstruction which creates an instruction from a constant expr.

We then pass that instruction to the InstVisitor to analyze it.

Its not necessary to create these instructions as we can just cast from Constant to Operator in the visitor.  This is how other InstVisitor’s such as SelectionDAGBuilder handle ConstantExpr.

llvm-svn: 239616
2015-06-12 16:13:54 +00:00
Rafael Espindola
12677ab0cc Remove a hack that tries to align '*'.
The alignment is not required, so we can just remove it for now.

The old code is a hack as it depends on the buffer management to find
the current column.

If the alignment is really desirable, the proper way to do it is
to pass in a formatted_raw_stream that knows the current column.

llvm-svn: 239603
2015-06-12 12:42:13 +00:00
Alexander Potapenko
97b6209299 [ASan] format AddressSanitizer.cpp with clang-format -style=Google, NFC
llvm-svn: 239601
2015-06-12 11:27:06 +00:00
John Brawn
f1e8c53b00 [ARM] Disabling vfp4 should disable fp16
ARMTargetParser::getFPUFeatures should disable fp16 whenever it
disables vfp4, as otherwise something like -mcpu=cortex-a7 -mfpu=none
leaves us with fp16 enabled (though the only effect that will have is
a wrong build attribute).

Differential Revision: http://reviews.llvm.org/D10397

llvm-svn: 239599
2015-06-12 09:38:51 +00:00
Yaron Keren
ce4e895f75 Rangify for loops, NFC.
llvm-svn: 239596
2015-06-12 05:15:27 +00:00
Peter Collingbourne
06ca544fd2 LowerBitSets: Give names to aliases of unnamed bitset element objects.
It is valid for globals to be unnamed, but aliases must have a name. To avoid
creating invalid IR, we need to assign names to any aliases we create that
point to unnamed objects that have been moved into combined globals.

llvm-svn: 239590
2015-06-12 03:25:05 +00:00
Teresa Johnson
a9e6ea6582 Revert commit r239480 as it causes https://code.google.com/p/chromium/issues/detail?id=499508#c3.
llvm-svn: 239589
2015-06-12 03:12:00 +00:00
Alexey Samsonov
c3fcad0f70 [SanitizerCoverage] Use llvm::getDISubprogram() to get location of the entry basic block.
DebugLoc::getFnDebugLoc() should soon be removed. Also,
getDISubprogram() might become more effective soon and wouldn't need to
scan debug locations at all, if function-level metadata would be emitted
by Clang.

llvm-svn: 239586
2015-06-12 01:48:47 +00:00
Alexey Samsonov
1cd725e476 [GVN] Use a simpler form of IRBuilder constructor.
Summary:
A side effect of this change is that it IRBuilder now automatically
created debug info locations for new instructions, which is the
same as debug location of insertion point. This is fine for the
functions in questions (GetStoreValueForLoad and
GetMemInstValueForLoad), as they are used in two situations:
  * GVN::processLoad, which tries to eliminate a load. In this case
    new instructions would have the same debug location as the load they
    eventually replace;
  * MaterializeAdjustedValue, which adds new instructions to the end
    of the basic blocks, which could later be used to replace the load
    definition. In this case we don't yet know the way the load would
    be eventually replaced (either by assembling the precomputed values
    via PHI, or by using them directly), so just using the basic block
    strategy seems to be reasonable. There is also a special case
    in the code that *would* adjust the location of the last
    instruction replacing the load definition to the location of the
    load.

Test Plan: regression test suite

Reviewers: echristo, dberlin, dblaikie

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10405

llvm-svn: 239585
2015-06-12 01:39:48 +00:00
Alexey Samsonov
4af470ba98 [GVN] Use IRBuilder more actively instead of creating instructions manually.
llvm-svn: 239584
2015-06-12 01:39:45 +00:00
Reid Kleckner
2ccc557010 [WinEH] Put finally pointers in the handler scope table field
We were putting them in the filter field, which is correct for 64-bit
but wrong for 32-bit.

Also switch the order of scope table entry emission so outermost entries
are emitted first, and fix an obvious state assignment bug.

llvm-svn: 239574
2015-06-11 23:37:18 +00:00
Juergen Ributzka
372830c96f [Stackmaps][X86] Remove EFLAGS and IP registers from the live-out mask.
Remove the EFLAGS from the stackmap live-out mask. The EFLAGS register is not
supposed to be part of that set, because the X86 calling conventions mark the
register as NOT preserved.

Also remove the IP registers, since spilling and restoring those doesn't really
make any sense.

Related to rdar://problem/21019635.

llvm-svn: 239568
2015-06-11 22:40:04 +00:00
Reid Kleckner
493c014968 [WinEH] Create an llvm.x86.seh.exceptioninfo intrinsic
This intrinsic is like framerecover plus a load. It recovers the EH
registration stack allocation from the parent frame and loads the
exception information field out of it, giving back a pointer to an
EXCEPTION_POINTERS struct. It's designed for clang to use in SEH filter
expressions instead of accessing the EXCEPTION_POINTERS parameter that
is available on x64.

This required a minor change to MC to allow defining a label variable to
another absolute framerecover label variable.

llvm-svn: 239567
2015-06-11 22:32:23 +00:00
Reid Kleckner
9c758c45a6 [Support] Fix a race initializing a static local in MSVC
static local initialization isn't thread safe with MSVC and a race was
reported in PR23817. We can't use std::atomic because it's not trivially
constructible, so instead do some lame volatile global integer
manipulation.

llvm-svn: 239566
2015-06-11 22:22:45 +00:00
Michael Zolotukhin
54608771b4 Update stale comment before analyzeLoopUnrollCost. NFC.
llvm-svn: 239565
2015-06-11 22:17:39 +00:00
Peter Collingbourne
f328508805 Object: Prepend __imp_ when mangling a dllimport symbol in IRObjectFile.
We cannot prepend __imp_ in the IR mangler because a function reference may
be emitted unmangled in a constant initializer. The linker is expected to
resolve such references to thunks. This is covered by the new test case.

Strictly speaking we ought to emit two undefined symbols, one with __imp_ and
one without, as we cannot know which symbol the final object file will refer
to. However, this would require rather intrusive changes to IRObjectFile,
and lld works fine without it for now.

This reimplements r239437, which was reverted in r239502.

Differential Revision: http://reviews.llvm.org/D10400

llvm-svn: 239560
2015-06-11 21:42:18 +00:00
Peter Collingbourne
3148fd7add LTO: expose LTO_SYMBOL_COMDAT flag, which indicates that the definition is part of a comdat group.
Reviewers: rafael

Subscribers: llvm-commits, ruiu

Differential Revision: http://reviews.llvm.org/D10330

llvm-svn: 239559
2015-06-11 21:41:27 +00:00
Daniel Sanders
ac381fec59 Replace string GNU Triples with llvm::Triple in TargetMachine. NFC.
Summary:
For the moment, TargetMachine::getTargetTriple() still returns a StringRef.

This continues the patch series to eliminate StringRef forms of GNU triples
from the internals of LLVM that began in r239036.

Reviewers: rengolin

Reviewed By: rengolin

Subscribers: ted, llvm-commits, rengolin, jholewinski

Differential Revision: http://reviews.llvm.org/D10362

llvm-svn: 239554
2015-06-11 19:41:26 +00:00
Ahmed Bougacha
ee490f0abc [CodeGen] ArrayRef'ize cond/pred in various TII APIs. NFC.
llvm-svn: 239553
2015-06-11 19:30:37 +00:00
Rafael Espindola
de719b03f3 Generalize emitAbsoluteSymbolDiff.
This makes emitAbsoluteSymbolDiff always succeed and moves logic from the asm
printer to it.

The object one now also works on ELF. If two symbols are in the same fragment,
we will never move them apart.

llvm-svn: 239552
2015-06-11 18:58:08 +00:00
Alexey Samsonov
feef58cbe5 Set proper debug location for branch added in BasicBlock::splitBasicBlock().
This improves debug locations in passes that do a lot of basic block
transformations. Important case is LoopUnroll pass, the test for correct
debug locations accompanies this change.

Test Plan: regression test suite

Reviewers: dblaikie, sanjoy

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10367

llvm-svn: 239551
2015-06-11 18:25:54 +00:00
Alexey Samsonov
0f73d0bb04 [LoopUnroll] Use IRBuilder to create branch instructions.
Use IRBuilder::Create(Cond)?Br instead of constructing instructions
manually with BranchInst::Create(). It's consistent with other
uses of IRBuilder in this pass, and has an additional important
benefit:

Using IRBuilder will ensure that new branch instruction will get
the same debug location as original terminator instruction it will
eventually replace.

For now I'm not adding a testcase, as currently original terminator
instruction also lack debug location due to missing debug location
propagation in BasicBlock::splitBasicBlock. That is, the testcase
will accompany the fix for the latter I'm going to mail soon.

llvm-svn: 239550
2015-06-11 18:25:44 +00:00
Benjamin Kramer
c27bb5919b Replace an instance of custom atomics with standard ones.
Eventually I want to get rid of them entirely, but Statistic.h is still blocked
on MSVC bugs. No functionality change.

llvm-svn: 239545
2015-06-11 17:30:34 +00:00
Rafael Espindola
4973f5abd5 This reverts commit r239529 and r239514.
Revert "[AArch64] Match interleaved memory accesses into ldN/stN instructions."
Revert "Fixing MSVC 2013 build error."

The  test/CodeGen/AArch64/aarch64-interleaved-accesses.ll test was failing on OS X.

llvm-svn: 239544
2015-06-11 17:30:33 +00:00
Reid Kleckner
eabb3bf9db Revert "Fix merges of non-zero vector stores"
This reverts commit r239539.

It was causing SDAG assertions while building freetype.

llvm-svn: 239543
2015-06-11 17:25:24 +00:00
Matt Arsenault
f40c082c04 SLSR: Pass address space to isLegalAddressingMode
This only updates one of the uses. The other is used in cases
that may never touch memory, so I'm not sure why this is even
calling it. Perhaps there should be a new, similar hook for such
cases or pass -1 for unknown address space.

llvm-svn: 239540
2015-06-11 16:13:39 +00:00
Matt Arsenault
a574c653c9 Fix merges of non-zero vector stores
Now actually stores the non-zero constant instead of 0.
I somehow forgot to include this part of r238108.

The test change was just an independent instruction order swap,
so just add another check line to satisfy CHECK-NEXT.

llvm-svn: 239539
2015-06-11 16:03:52 +00:00
Daniel Sanders
b5daf5341a Replace string GNU Triples with llvm::Triple in computeDataLayout(). NFC.
Summary:
This continues the patch series to eliminate StringRef forms of GNU triples
from the internals of LLVM that began in r239036.

Reviewers: rengolin

Reviewed By: rengolin

Subscribers: llvm-commits, jfb, rengolin

Differential Revision: http://reviews.llvm.org/D10361

llvm-svn: 239538
2015-06-11 15:34:59 +00:00
Tom Stellard
3bff6f7e5e R600/SI: Define latency for flat instructions
llvm-svn: 239535
2015-06-11 14:51:50 +00:00
Tom Stellard
3b8fa5b676 R600/SI: Move flat instruction defs to CIInstructions.td
llvm-svn: 239534
2015-06-11 14:51:49 +00:00
Sanjay Patel
1ac7cac81b remove function names from comments; NFC
llvm-svn: 239532
2015-06-11 14:26:49 +00:00
Aaron Ballman
34bd3c1b27 Fixing MSVC 2013 build error.
llvm-svn: 239529
2015-06-11 13:06:02 +00:00
Toma Tabacu
69851ca2cd Recommit "[mips] [IAS] Add support for BNE and BEQ with an immediate operand." (r239396).
Apparently, Arcanist didn't include some of my local changes in my previous
commit attempt.

llvm-svn: 239523
2015-06-11 10:36:10 +00:00
Zoran Jovanovic
cee7a90cff [mips][microMIPS] Implement ERET and ERETNC instructions
http://reviews.llvm.org/D10091

llvm-svn: 239522
2015-06-11 10:22:46 +00:00
Zoran Jovanovic
16ce288b93 [mips] Change existing uimm10 operand to restrict the accepted immediates
http://reviews.llvm.org/D10312

llvm-svn: 239520
2015-06-11 09:51:58 +00:00
Hao Liu
f9679d4c2b [LoopVectorize] Revert the enabling of interleaved memory access in Loop Vectorizor, which was wrongly committed in r239514.
llvm-svn: 239515
2015-06-11 09:18:07 +00:00
Hao Liu
3ad5dd3f0c [AArch64] Match interleaved memory accesses into ldN/stN instructions.
Add a pass AArch64InterleavedAccess to identify and match interleaved memory accesses. This pass transforms an interleaved load/store into ldN/stN intrinsic. As Loop Vectorizor disables optimization on interleaved accesses by default, this optimization is also disabled by default. To enable it by "-aarch64-interleaved-access-opt=true"

E.g. Transform an interleaved load (Factor = 2):
       %wide.vec = load <8 x i32>, <8 x i32>* %ptr
       %v0 = shuffle %wide.vec, undef, <0, 2, 4, 6>  ; Extract even elements
       %v1 = shuffle %wide.vec, undef, <1, 3, 5, 7>  ; Extract odd elements
     Into:
       %ld2 = { <4 x i32>, <4 x i32> } call aarch64.neon.ld2(%ptr)
       %v0 = extractelement { <4 x i32>, <4 x i32> } %ld2, i32 0
       %v1 = extractelement { <4 x i32>, <4 x i32> } %ld2, i32 1

E.g. Transform an interleaved store (Factor = 2):
       %i.vec = shuffle %v0, %v1, <0, 4, 1, 5, 2, 6, 3, 7>  ; Interleaved vec
       store <8 x i32> %i.vec, <8 x i32>* %ptr
     Into:
       %v0 = shuffle %i.vec, undef, <0, 1, 2, 3>
       %v1 = shuffle %i.vec, undef, <4, 5, 6, 7>
       call void aarch64.neon.st2(%v0, %v1, %ptr)

llvm-svn: 239514
2015-06-11 09:05:02 +00:00
Arnaud A. de Grandmaison
eb77bb4c66 [LiveVariables] Improve isLiveOut runtime performances. NFC.
On large goto table based interpreters, where phi nodes can have (very) large
fan-ins, isLiveOut exhibited poor performances: about 40% of the full
codegen time was spent in PHIElim, sorting MachineBasicBlock addresses.

This patch improve the performances for such cases, and does not show
compile time regressions on the LNT, at bootstrap (llvm+clang+lldb) or
any other benchmarks we have in-house.

llvm-svn: 239510
2015-06-11 07:50:21 +00:00
Simon Pilgrim
c3425b72b9 [X86][SSE] Vectorized i8 and i16 shift operators
This patch ensures that SHL/SRL/SRA shifts for i8 and i16 vectors avoid scalarization. It builds on the existing i8 SHL vectorized implementation of moving the shift bits up to the sign bit position and separating the 4, 2 & 1 bit shifts with several improvements:

1 - SSE41 targets can use (v)pblendvb directly with the sign bit instead of performing a comparison to feed into a VSELECT node.
2 - pre-SSE41 targets were masking + comparing with an 0x80 constant - we avoid this by using the fact that a set sign bit means a negative integer which can be compared against zero to then feed into VSELECT, avoiding the need for a constant mask (zero generation is much cheaper).
3 - SRA i8 needs to be unpacked to the upper byte of a i16 so that the i16 psraw instruction can be correctly used for sign extension - we have to do more work than for SHL/SRL but perf tests indicate that this is still beneficial.

The i16 implementation is similar but simpler than for i8 - we have to do 8, 4, 2 & 1 bit shifts but less shift masking is involved. SSE41 use of (v)pblendvb requires that the i16 shift amount is splatted to both bytes however.

Tested on SSE2, SSE41 and AVX machines.

Differential Revision: http://reviews.llvm.org/D9474

llvm-svn: 239509
2015-06-11 07:46:37 +00:00
Arnaud A. de Grandmaison
15dd6a1961 [PHIElim] Use ranges and const-ify, NFC.
llvm-svn: 239508
2015-06-11 07:45:05 +00:00
Nemanja Ivanovic
d737ff7af7 LLVM support for vector quad bit permute and gather instructions through builtins
This patch corresponds to review:
http://reviews.llvm.org/D10096

This is the back end portion of the patch related to D10095.
The patch adds the instructions and back end intrinsics for:
vbpermq
vgbbd

llvm-svn: 239505
2015-06-11 06:21:25 +00:00
Reid Kleckner
8d217e6b48 Revert "Move dllimport name mangling to IR mangler."
This reverts commit r239437.

This broke clang-cl self-hosts. We'd end up calling the __imp_ symbol
directly instead of using it to do an indirect function call.

llvm-svn: 239502
2015-06-11 01:31:48 +00:00
Pete Cooper
8328fce315 Remove MachineModuleInfo::UsedFunctions as it has no users.
It hasn't been used since r130964.

This also removes MachineModuleInfo::isUsedFunction and
MachineModuleInfo::AnalyzeModule, both of which were only
there to support UsedFunctions.

llvm-svn: 239501
2015-06-11 01:04:56 +00:00
Sanjay Patel
8266e384a1 change assert that will never fire to llvm_unreachable
llvm-svn: 239497
2015-06-10 23:27:33 +00:00
Pete Cooper
24aea91aca Stop returning a Use* from allocHungOffUses.
This always just set the User::OperandList which is now set
in that method instead of being returned.

Reviewed by Duncan Exon Smith.

llvm-svn: 239493
2015-06-10 22:38:46 +00:00
Pete Cooper
f609d284a0 Add User::growHungoffUses and use it to grow the hung off uses. NFC.
PhiNode, SwitchInst, LandingPad and IndirectBr all had virtually identical
logic for growing the hung off uses.
Move it to User so that they can all call a single shared implementation.

Their destructors were all empty after this change and were deleted.  They all
have virtual clone_impl methods which can be used as vtable anchors.

Reviewed by Duncan Exon Smith.

llvm-svn: 239492
2015-06-10 22:38:41 +00:00
Pete Cooper
f944a82ef6 Delete User::dropHungOffUses and move it in to ~User which is the only caller. NFC.
Now that the subclasses which care about hung off uses let ~User clean it up,
there's no need for a separate method.  Just inline it to ~User and delete it.

Reviewed by Duncan Exon Smith.

llvm-svn: 239491
2015-06-10 22:38:38 +00:00
Pete Cooper
08f6cbb5fd Make User track whether a class has 'hung off uses' and delete them in its destructor.
Currently all of the logic for deleting hung off uses, which PHI/switch/etc use,
is in their classes.

This adds a bit to Value which tracks whether that user had hung off uses,
then User can be responsible for clearing them instead of the sub classes.

Note, the bit used here was taken from NumOperands which was 30-bits.
Given the reduction to 29 bits, and the average User being just over 100 bytes,
a single User with 29-bits of num operands would need 50GB of RAM for itself
so its reasonable to assume that 29-bits is enough for now.

This is a step towards hiding all the hung off uses logic in the User.

Reviewed by Duncan Exon Smith.

llvm-svn: 239490
2015-06-10 22:38:34 +00:00
Pete Cooper
51074a3578 Move the special Phi logic for hung off uses in to User::allocHungOffUses. NFC.
PhiNode's need to allocate space for an array of Use[N] and then BasicBlock*[N].

They had their own allocHungOffUses to handle all of this.  This moves the logic
in to User::allocHungOffUses and PhiNode passes in a bool to say to allocate
the BB* space too.

Reviewed by Duncan Exon Smith.

llvm-svn: 239489
2015-06-10 22:38:30 +00:00
Peter Collingbourne
1285efe0c1 ArgumentPromotion: Drop sret attribute on functions that are only called directly.
If the first argument to a function is a 'this' argument and the second
has the sret attribute, the ArgumentPromotion pass may promote the 'this'
argument to more than one argument, violating the IR constraint that 'sret'
may only be applied to the first or second argument.

Although this IR constraint is arguably unnecessary, it highlighted the fact
that ArgPromotion does not need to preserve this attribute. Dropping the
attribute reduces register pressure in the backend by avoiding the register
copy required by sret. Because sret implies noalias, we also replace the
former with the latter.

Differential Revision: http://reviews.llvm.org/D10353

llvm-svn: 239488
2015-06-10 21:14:34 +00:00
Sanjay Patel
6b15a1a605 [x86] Add a reassociation optimization to increase ILP via the MachineCombiner pass
This is a reimplementation of D9780 at the machine instruction level rather than the DAG.

Use the MachineCombiner pass to reassociate scalar single-precision AVX additions (just a
starting point; see the TODO comments) to increase ILP when it's safe to do so.

The code is closely based on the existing MachineCombiner optimization that is implemented
for AArch64.

This patch should not cause the kind of spilling tragedy that led to the reversion of r236031.

Differential Revision: http://reviews.llvm.org/D10321

llvm-svn: 239486
2015-06-10 20:32:21 +00:00
Sanjay Patel
57c7918fcc punctuation policing; NFC
llvm-svn: 239484
2015-06-10 19:52:58 +00:00
Reid Kleckner
2b21b23f5c [WinEH] _except_handlerN uses 0 instead of 1 to indicate catch-all
Our usage of 1 was a holdover from __C_specific_handler.

llvm-svn: 239482
2015-06-10 18:14:07 +00:00
Teresa Johnson
3b11c8e6e3 Add new EliminateAvailableExternally module pass, which is performed in
O2 compiles just before GlobalDCE, unless we are preparing for LTO.

This pass eliminates available externally globals (turning them into
declarations), regardless of whether they are dead/unreferenced, since
we are guaranteed to have a copy available elsewhere at link time.
This enables additional opportunities for GlobalDCE.

If we are preparing for LTO (e.g. a -flto -c compile), the pass is not
included as we want to preserve available externally functions for possible
link time inlining. The FE indicates whether we are doing an -flto compile
via the new PrepareForLTO flag on the PassManagerBuilder.

llvm-svn: 239480
2015-06-10 17:49:28 +00:00
Alexey Samsonov
771f5d1cd6 [GVN] Set proper debug locations for some instructions created by GVN.
Determining proper debug locations for instructions created in
PHITransAddr is tricky. We use a simple approach here and simply copy
debug locations from instructions computing load address to
"corresponding" instructions re-creating the address computation
in predecessor basic blocks.

This may not always be correct, given all the rearrangement and
simplification going on, and debug locations may jump around a lot,
as the basic blocks we copy locations between may be very far from
each other.

Still, this would work good in most simple cases (e.g. when chain
of address computing instruction is short, or our mapping turns out
to be 1-to-1), and we desire to have *some* reasonable debug locations
associated with newly inserted instructions.

See http://reviews.llvm.org/D10351 review thread for more details.

Test Plan: regression test suite

Reviewers: spatel, dblaikie

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10351

llvm-svn: 239479
2015-06-10 17:37:38 +00:00
Sanjay Patel
d03fb53e89 fix typo in comment; NFC
llvm-svn: 239478
2015-06-10 17:08:12 +00:00
Colin LeMahieu
705d770c5e [Hexagon] Adding decoders for signed operands and ensuring all signed operand types disassemble correctly.
llvm-svn: 239477
2015-06-10 16:52:32 +00:00
Benjamin Kramer
dc5eda7447 [Hexagon] Make global arrays 'static const'. NFC.
llvm-svn: 239475
2015-06-10 14:43:59 +00:00
Igor Laevsky
8c017dd9d1 [StatepointLowering] Reuse stack slots across basic blocks
During statepoint lowering we can sometimes avoid spilling of the value if we know that it was already spilled for previous statepoint.
We were doing this by checking if incoming statepoint value was lowered into load from stack slot. This was working only in boundaries of one basic block.

But instead of looking at the lowered node we can look directly at the llvm-ir value and if it was gc.relocate (or some simple modification of it) look up stack slot for it's derived pointer and reuse stack slot from it. This allows us to look across basic block boundaries.

Differential Revision: http://reviews.llvm.org/D10251

llvm-svn: 239472
2015-06-10 12:31:53 +00:00
Daniel Sanders
e37ebd59c5 Replace string GNU Triples with llvm::Triple in MCSubtargetInfo and create*MCSubtargetInfo(). NFC.
Summary:
This continues the patch series to eliminate StringRef forms of GNU triples
from the internals of LLVM that began in r239036.

Reviewers: rafael

Reviewed By: rafael

Subscribers: rafael, ted, jfb, llvm-commits, rengolin, jholewinski

Differential Revision: http://reviews.llvm.org/D10311

llvm-svn: 239467
2015-06-10 12:11:26 +00:00
Daniel Sanders
326a8d5bed Replace string GNU Triples with llvm::Triple in create*MCRelocationInfo(). NFC.
Summary:
This continues the patch series to eliminate StringRef forms of GNU triples
from the internals of LLVM that began in r239036.

Reviewers: rafael

Reviewed By: rafael

Subscribers: rafael, llvm-commits, rengolin

Differential Revision: http://reviews.llvm.org/D10307

llvm-svn: 239465
2015-06-10 10:54:40 +00:00
Daniel Sanders
2da676c315 Replace string GNU Triples with llvm::Triple in MCAsmBackend subclasses and create*AsmBackend(). NFC.
Summary:
This continues the patch series to eliminate StringRef forms of GNU triples
from the internals of LLVM that began in r239036.

Reviewers: echristo, rafael

Reviewed By: rafael

Subscribers: rafael, llvm-commits, rengolin

Differential Revision: http://reviews.llvm.org/D10243

llvm-svn: 239464
2015-06-10 10:35:34 +00:00
Elena Demikhovsky
0e31a916e3 AVX-512: Fixed a bug in comparison of i1 vectors.
cmp eq should give kxnor instruction
cmp neq should give kxor 

https://llvm.org/bugs/show_bug.cgi?id=23631

llvm-svn: 239460
2015-06-10 06:49:28 +00:00
Alexei Starovoitov
1bae3607c8 fix crash
fix segfault by checking for UnknownArch, since
getArchTypePrefix() will return nullptr for UnknownArch.

This fixes regression caused by r238424.

llvm-svn: 239456
2015-06-10 03:06:06 +00:00
Craig Topper
90cbda743d Remove unnecessary conversion from StringRef to std::string and back to StringRef. NFC.
llvm-svn: 239455
2015-06-10 02:07:37 +00:00
Reid Kleckner
34c2802c0d [WinEH] Call llvm.stackrestore in __except blocks
We have to do this manually, the runtime only sets up ebp. Fixes a crash
when returning after catching an exception.

llvm-svn: 239451
2015-06-10 01:34:54 +00:00
Reid Kleckner
e43f114aba Remove safeseh debug print and remove extra braces
llvm-svn: 239449
2015-06-10 01:13:44 +00:00
Reid Kleckner
a2dfb4b154 [WinEH] Emit .safeseh directives for all 32-bit exception handlers
Use a "safeseh" string attribute to do this. You would think we chould
just accumulate the set of personalities like we do on dwarf, but this
fails to account for the LSDA-loading thunks we use for
__CxxFrameHandler3. Each of those needs to make it into .sxdata as well.
The string attribute seemed like the most straightforward approach.

llvm-svn: 239448
2015-06-10 01:02:30 +00:00
Reid Kleckner
885770254c Fix -Wsign-compare warning in WinException.cpp
llvm-svn: 239445
2015-06-10 00:04:53 +00:00
Pete Cooper
3e509bc56b Fix warning of comparing different enums. NFC
llvm-svn: 239443
2015-06-09 23:33:35 +00:00
Pete Cooper
61552d51cf Revert "Move MCSymbol Value in to the union of Offset and CommonSize."
This reverts commit 2e449ec5bcdf67b52b315b16c2128aaf25d5b73c.

This was svn r239440.  Its currently failing an ARM test so reverting while I work out
what to do next.

llvm-svn: 239441
2015-06-09 22:35:55 +00:00
Pete Cooper
e2d6c11009 Move MCSymbol Value in to the union of Offset and CommonSize.
It wasn't possible to have a variable Symbol with offset or 'isCommon' so
this just enables better packing of the MCSymbol class.

Reviewed by Rafael Espindola.

llvm-svn: 239440
2015-06-09 22:21:37 +00:00
Tobias Edler von Koch
57a51015f2 [RegisterScavenger] Fix handling of predicated instructions
Summary:
The RegisterScavenger explicitly ignores <kill> flags on operands of
predicated instructions and therefore assumes that such registers remain
live. When it then scavenges such a register, it inserts a spill of this
(killed) register. This is invalid code and gets flagged up by the 
verifier.

Nowadays kill flags are set correctly on predicated instructions. This
patch makes the Scavenger respect them.

The bug has so far only been triggered by an internal pass, so I don't
have a test case unfortunately.

Fixes PR23119.

Reviewers: hfinkel, tobiasvk_caf

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D9039

llvm-svn: 239439
2015-06-09 22:10:58 +00:00
Alexey Samsonov
55e4a6cb62 [BasicBlockUtils] Set debug locations for instructions created in SplitBlockPredecessors.
Test Plan: regression test suite

Reviewers: eugenis, dblaikie

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10343

llvm-svn: 239438
2015-06-09 22:10:29 +00:00
Peter Collingbourne
6f8524df44 Move dllimport name mangling to IR mangler.
This ensures that LTO clients see the correct external symbol name.

Differential Revision: http://reviews.llvm.org/D10318

llvm-svn: 239437
2015-06-09 22:09:53 +00:00
Jingyue Wu
2406860399 [NVPTX] fix a crash bug in NVPTXFavorNonGenericAddrSpaces
Summary:
We used to assume V->RAUW only modifies the operand list of V's user.
However, if V and V's user are Constants, RAUW may replace and invalidate V's
user entirely.

This patch fixes the above issue by letting the caller replace the
operand instead of calling RAUW on Constants.

Test Plan: @nested_const_expr and @rauw in access-non-generic.ll

Reviewers: broune, jholewinski

Reviewed By: broune, jholewinski

Subscribers: jholewinski, llvm-commits

Differential Revision: http://reviews.llvm.org/D10345

llvm-svn: 239435
2015-06-09 21:50:32 +00:00
Peter Collingbourne
f713e907c2 LibDriver, llvm-lib: introduce.
llvm-lib is intended to be a lib.exe compatible utility that also
understands bitcode. The implementation lives in a library so that
lld can use it to implement /lib.

Differential Revision: http://reviews.llvm.org/D10297

llvm-svn: 239434
2015-06-09 21:50:22 +00:00
Reid Kleckner
4083ec51c4 [WinEH] Add 32-bit SEH state table emission prototype
This gets all the handler info through to the asm printer and we can
look at the .xdata tables now. I've convinced one small catch-all test
case to work, but other than that, it would be a stretch to say this is
functional.

The state numbering algorithm avoids doing any scope reconstruction as
we do for C++ to simplify the implementation.

llvm-svn: 239433
2015-06-09 21:42:19 +00:00
Chad Rosier
0562bfe49d [AArch64] Remove an overly conservative check when generating store pairs.
Store instructions do not modify register values and therefore it's safe
to form a store pair even if the source register has been read in between
the two store instructions.

Previously, the read of w1 (see below) prevented the formation of a stp.

        str      w0, [x2]
        ldr     w8, [x2, #8]
        add      w0, w8, w1
        str     w1, [x2, #4]
        ret

We now generate the following code.

        stp      w0, w1, [x2]
        ldr     w8, [x2, #8]
        add      w0, w8, w1
        ret

All correctness tests with -Ofast on A57 with Spec200x and EEMBC pass.
Performance results for SPEC2K were within noise.

llvm-svn: 239432
2015-06-09 20:59:41 +00:00
Pete Cooper
f60550fc5c Use AlignOf traits to enable static_assert.
This is better than runtime asserts.  Thanks to David Blaikie for the help here.

llvm-svn: 239431
2015-06-09 20:58:03 +00:00
Benjamin Kramer
d9e78d2d46 Replace loop with std::equal. NFC intended.
llvm-svn: 239430
2015-06-09 20:41:21 +00:00
Pete Cooper
b6fbf73a6d Reduce duplication in MCSymbol Name handling. NFC>
Based on feedback to r239428 by David Blaikie, use const_cast to reduce
duplication of the const and non-const versions of getNameEntryPtr.

Also have that method return the pointer to the name directly instead
of users having to then get the name from the union.

Finally, add a FIXME that we should use a static_assert once available in
the new operator.

llvm-svn: 239429
2015-06-09 20:41:08 +00:00
Pete Cooper
d3675df872 Make MCSymbol::Name be a union of uint64_t and a pointer.
This should hopefully fix the 32-bit bots which were allocating space for a pointer
but needed to be aligned to 64-bits.

Now we allocate enough space for a uint64_t and a pointer and cast to the appropriate storage

llvm-svn: 239428
2015-06-09 19:56:05 +00:00
Akira Hatanaka
c42437a4f8 Remove DisableTailCalls from TargetOptions and the code in resetTargetOptions
that was resetting it.

Remove the uses of DisableTailCalls in subclasses of TargetLowering and use
the value of function attribute "disable-tail-calls" instead. Also,
unconditionally add pass TailCallElim to the pipeline and check the function
attribute at the start of runOnFunction to disable the pass on a per-function
basis. 
 
This is part of the work to remove TargetMachine::resetTargetOptions, and since
DisableTailCalls was the last non-fast-math option that was being reset in that
function, we should be able to remove the function entirely after the work to
propagate IR-level fast-math flags to DAG nodes is completed.

Out-of-tree users should remove the uses of DisableTailCalls and make changes
to attach attribute "disable-tail-calls"="true" or "false" to the functions in
the IR.

rdar://problem/13752163

Differential Revision: http://reviews.llvm.org/D10099

llvm-svn: 239427
2015-06-09 19:07:19 +00:00
Pete Cooper
274c29110c Change from alignof to llvm::alignOf to appease Visual Studio
llvm-svn: 239424
2015-06-09 18:50:18 +00:00
Pete Cooper
f293ad1077 Allocate space for MCSymbol::Name only if required.
Similarly to User which allocates a number of Use's prior to the this pointer,
allocate space for the Name* for MCSymbol only when we need a name.

Given that an MCSymbol is 48-bytes on 64-bit systems, this saves a decent % of space.

Given the verify_uselistorder test case with debug info and llc, 50k symbols have names
out of 700k so this optimises for the common case of temporary unnamed symbols.

Reviewed by David Blaikie.

llvm-svn: 239423
2015-06-09 18:36:13 +00:00
Arnold Schwaighofer
215d830ec3 MergeFunctions: Don't replace a weak function use by another equivalent weak function
We don't know whether the weak functions definition is the definitive definition.

rdar://21303727

llvm-svn: 239422
2015-06-09 18:19:17 +00:00
David Blaikie
6bca5ce03f Revert "[DWARF] Fix a few corner cases in expression emission"
This reverts commit r239380 due to apparently GDB regressions:
http://lab.llvm.org:8011/builders/clang-x86_64-ubuntu-gdb-75/builds/22562

llvm-svn: 239420
2015-06-09 18:01:51 +00:00
Samuel Antao
1e229d55ce The constant initialization for globals in NVPTX is generated as an
array of bytes. The generation of this byte arrays was expecting 
the host to be little endian, which prevents big endian hosts to be 
used in the generation of the PTX code. This patch fixes the 
problem by changing the way the bytes are extracted so that it 
works for either little and big endian.

llvm-svn: 239412
2015-06-09 16:29:34 +00:00
Eli Bendersky
ba50137ef5 Add more wrappers for symbol APIs to the C API.
This represents some of the functionality we expose in the llvmlite Python
binding.

Patch by Antoine Pitrou

Differential Revision: http://reviews.llvm.org/D10222

llvm-svn: 239411
2015-06-09 15:57:30 +00:00
Rui Ueyama
e59fc0b2e5 Remove object_error::success and use std::error_code() instead
make_error_code(object_error) is slow because object::object_category()
uses a ManagedStatic variable. But the real problem is that the function is
called too frequently. This patch uses std::error_code() instead of
object_error::success. In most cases, we return "success", so this patch
reduces number of function calls to that function.

http://reviews.llvm.org/D10333

llvm-svn: 239409
2015-06-09 15:20:42 +00:00
Toma Tabacu
0113773d53 Recommit "[mips] [IAS] Restore STI.FeatureBits in .set pop." (r239144).
Specified the llvm namespace for the 2 calls to make_unique() which caused
compilation errors in Visual Studio 2013.

llvm-svn: 239405
2015-06-09 13:33:26 +00:00
Elena Demikhovsky
b46f844518 X86-MPX: Implemented encoding for MPX instructions.
Added encoding tests.

llvm-svn: 239403
2015-06-09 13:02:10 +00:00
Aaron Ballman
0856283b6f Removing spurious semi colons; NFC.
llvm-svn: 239399
2015-06-09 12:03:46 +00:00
Toma Tabacu
6c50fe0db3 Revert "[mips] [IAS] Add support for BNE and BEQ with an immediate operand." (r239396).
It was breaking buildbots.

llvm-svn: 239397
2015-06-09 10:43:49 +00:00
Toma Tabacu
141f41f8f0 [mips] [IAS] Add support for BNE and BEQ with an immediate operand.
Summary:
For some branches, GAS accepts an immediate instead of the 2nd register operand.
We only implement this for BNE and BEQ for now. Other branch instructions can be added later, if needed.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: seanbruno, emaste, llvm-commits

Differential Revision: http://reviews.llvm.org/D9666

llvm-svn: 239396
2015-06-09 10:34:31 +00:00
Daniel Sanders
1835a8f945 [nvptx] Only support the 'm' inline assembly memory constraint. NFC.
Summary:
NVPTX doesn't seem to support any additional constraints. Therefore remove
the target hook.

No functional change intended.

Reviewers: jholewinski

Reviewed By: jholewinski

Subscribers: jholewinski, llvm-commits

Differential Revision: http://reviews.llvm.org/D8209

llvm-svn: 239395
2015-06-09 10:34:05 +00:00
Daniel Sanders
a2fe278290 [ADT] Assert that SmallVectorBase::grow_pod() successfully reallocates memory.
Summary:
If malloc/realloc fails then the SmallVector becomes unusable since begin() and
end() will return NULL. This is unlikely to occur but was the cause of recent
bugpoint test failures on my machine.

It is not clear whether not checking for malloc/realloc failure is a deliberate
decision and adding checks has the potential to impact compiler performance.
Therefore, this patch only adds the check to builds with assertions enabled for
the moment.

Reviewers: bkramer

Reviewed By: bkramer

Subscribers: bkramer, llvm-commits

Differential Revision: http://reviews.llvm.org/D9520

llvm-svn: 239392
2015-06-09 09:47:46 +00:00
Denis Protivensky
4582c79879 MergeFunctions: Fix gcc warning in condition
llvm-svn: 239391
2015-06-09 09:28:37 +00:00
Keno Fischer
7accd6b945 [DWARF] Fix a few corner cases in expression emission
Summary: I noticed an object file with `DW_OP_reg4 DW_OP_breg4 0` as a DWARF expression,
which I traced to a missing break (and `++I`) in this code snippet.
While I was at it, I also added support for a few other corner cases
along the same lines that I could think of.

Test Plan: Hand-crafted test case to exercises these cases is included.

Reviewers: echristo, dblaikie, aprantl

Reviewed By: aprantl

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10302

llvm-svn: 239380
2015-06-09 01:53:59 +00:00
Anna Zaks
5c713c1053 [asan] Prevent __attribute__((annotate)) triggering errors on Darwin
The following code triggers a fatal error in the compiler instrumentation
of ASan on Darwin because we place the attribute into llvm.metadata section,
which does not have the proper MachO section name.

void foo() __attribute__((annotate("custom")));
void foo() {;}

This commit reorders the checks so that we skip everything in llvm.metadata
first. It also removes the hard failure in case the section name does not
parse. That check will be done lower in the compilation pipeline anyway.

(Reviewed in http://reviews.llvm.org/D9093.)

llvm-svn: 239379
2015-06-09 00:58:08 +00:00
Matt Arsenault
d4495228bf Implement computeKnownBits for min/max nodes
llvm-svn: 239378
2015-06-09 00:52:41 +00:00
Matt Arsenault
8d14eecae1 R600: Switch to using generic min / max nodes.
llvm-svn: 239377
2015-06-09 00:52:37 +00:00
Matt Arsenault
8c9e05929c MC: Add target hook to control symbol quoting
llvm-svn: 239370
2015-06-09 00:31:39 +00:00
Arnold Schwaighofer
359de6b293 Fix unused variable warning
llvm-svn: 239369
2015-06-09 00:17:40 +00:00
Jingyue Wu
c74965ca17 [NVPTX] run SROA after NVPTXFavorNonGenericAddrSpaces
Summary:
This cleans up most allocas NVPTXLowerKernelArgs emits for byval
parameters.

Test Plan: makes bug21465.ll more stronger to verify no redundant local load/store.

Reviewers: eliben, jholewinski

Reviewed By: eliben, jholewinski

Subscribers: jholewinski, llvm-commits

Differential Revision: http://reviews.llvm.org/D10322

llvm-svn: 239368
2015-06-09 00:05:56 +00:00
Arnold Schwaighofer
50df132702 MergeFunctions: Impose a total order on the replacement of functions
We don't want to replace function A by Function B in one module and Function B
by Function A in another module.

If these functions are marked with linkonce_odr we would end up with a function
stub calling B in one module and a function stub calling A in another module. If
the linker decides to pick these two we will have two stubs calling each other.

rdar://21265586

llvm-svn: 239367
2015-06-09 00:03:29 +00:00
Reid Kleckner
a0a1b056e6 [WinEH] Cache declarations of frame intrinsics
llvm-svn: 239361
2015-06-08 22:43:32 +00:00
Reid Kleckner
64ffb91c79 Fix clang-cl self-host -Wc++11-narrowing bug
Use unsigned as the underlying storage type of the AMDGPU address space
enum.

llvm-svn: 239355
2015-06-08 21:57:57 +00:00
Ranjeet Singh
89463edae6 [AArch64] AsmParser should be case insensitive about accepting vector register names.
Differential Revision: http://reviews.llvm.org/D10320

llvm-svn: 239353
2015-06-08 21:32:16 +00:00
Keno Fischer
154ce9f3df [InstrInfo] Refactor foldOperandImpl to thread through InsertPt. NFC
Summary:
This was a longstanding FIXME and is a necessary precursor to cases
where foldOperandImpl may have to create more than one instruction
(e.g. to constrain a register class). This is the split out NFC changes from
D6262.

Reviewers: pete, ributzka, uweigand, mcrosier

Reviewed By: mcrosier

Subscribers: mcrosier, ted, llvm-commits

Differential Revision: http://reviews.llvm.org/D10174

llvm-svn: 239336
2015-06-08 20:09:58 +00:00
Benjamin Kramer
74b3c476bd Prefer copy init over direct init. NFC.
llvm-svn: 239327
2015-06-08 18:58:57 +00:00
Akira Hatanaka
76bd57e472 [ARM] Pass a callback to FunctionPass constructors to enable skipping execution
on a per-function basis.

Previously some of the passes were conditionally added to ARM's pass pipeline
based on the target machine's subtarget. This patch makes changes to add those
passes unconditionally and execute them conditonally based on the predicate
functor passed to the pass constructors. This enables running different sets of
passes for different functions in the module.

rdar://problem/20542263

Differential Revision: http://reviews.llvm.org/D8717

llvm-svn: 239325
2015-06-08 18:50:43 +00:00
Pete Cooper
54b42ad48b Use a PointerUnion in MCSymbol for Section and Fragment. NFC.
The Fragment and Section, and a bool for HasFragment were all used to create
a PointerUnion.  Just use a pointer union instead.

llvm-svn: 239324
2015-06-08 18:41:57 +00:00
Pete Cooper
226ceaabfc Remove includes of MCMachOSymbolFlags.h after it was deleted
llvm-svn: 239318
2015-06-08 17:25:57 +00:00
Pete Cooper
148cf86301 Move all flags logic to MCSymbolMachO.
Also delete the now unused MCMachOSymbolFlags.h header as the only enum in there was moved to MCSymbolMachO.

Similarly to ELF and COFF, manipulating the flags is now done via helpers instead of spread
throughout the codebase.

Reviewed by Rafael Espíndola.

llvm-svn: 239316
2015-06-08 17:17:28 +00:00
Pete Cooper
8f9b97685a Add MCSymbolMachO which will be used to hide the MCSymbolMachO flags.
Reviewed by Rafael Espíndola.

llvm-svn: 239315
2015-06-08 17:17:23 +00:00
Pete Cooper
97458cd6bb Move all of the MCSymbol COFF flags logic in to MCSymbolCOFF.
All flags setting/getting is now done in the class with helper methods instead
of users having to get the bits in the correct order.

Reviewed by Rafael Espíndola.

llvm-svn: 239314
2015-06-08 17:17:19 +00:00