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4062a79a81
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3191 Commits

Author SHA1 Message Date
Andrew Lenharth
4062a79a81 Fix 2005-05-12-Int64ToFP 
The issue is there is no unsigned -> double conversion, only signed.  So I
need to test the sign and do a different thing depending on it.  Ideally
this should be in a different BB, but in the mean time, I use a branch
free method.

llvm-svn: 22177
 2005-05-26 18:18:34 +00:00
Nate Begeman
f6e0f54d70 C'mon everybody, let's modify X86JITInfo.cpp. This time, we add <iostream> 
so that the shiny new use of std::cerr is defined.

llvm-svn: 22156
 2005-05-20 21:29:24 +00:00
Misha Brukman
48ca8224da Since everyone else has "fixed" this file, might as well join in the fun. 
* Change assert() to std::cerr printout, as it will not appear in opt builds
* Add comments to clarify what #ifdef/#else/#endif match what condition(s)

llvm-svn: 22154
 2005-05-20 19:46:50 +00:00
Chris Lattner
f1479ae390 Fix this a 3rd time :) 
llvm-svn: 22151
 2005-05-20 17:00:21 +00:00
Andrew Lenharth
46b9d601f5 fix compilation error due to no abort being defined. There is probably a better way to do this 
llvm-svn: 22150
 2005-05-20 16:34:44 +00:00
Duraid Madina
44ac7502fd re-enable direct calls, this should just be a performance boost 
llvm-svn: 22148
 2005-05-20 11:39:17 +00:00
Duraid Madina
c043395fe8 this seems dead (and broke the ia64 build, so..) 
llvm-svn: 22147
 2005-05-20 06:21:59 +00:00
Jeff Cohen
a0f463a25c Fix tail call support in VC++ builds 
llvm-svn: 22143
 2005-05-20 01:35:39 +00:00
Chris Lattner
c1d9b43fc1 Fastcc passes arguments in EAX and EDX, make sure the JIT doesn't clobber them 
llvm-svn: 22137
 2005-05-19 06:49:17 +00:00
Chris Lattner
6dcae1c96e Tailcalls require stubs to be emitted. Otherwise, the compilation callback 
doesn't know who 'called' it.

llvm-svn: 22136
 2005-05-19 05:54:33 +00:00
Misha Brukman
49fe7aa1d6 Wrap long lines 
llvm-svn: 22125
 2005-05-18 20:37:33 +00:00
Chris Lattner
0366a913ad PPC "branch and link" instructions are branches in the PPC sense, but not 
in the LLVM code generator sense (they are calls).  Don't mark them as such,
which fixes the regressions on the ppc tester last night

llvm-svn: 22065
 2005-05-15 20:11:44 +00:00
Chris Lattner
9fc81f1162 Fix andrews changes to fit in 80 columns 
llvm-svn: 22064
 2005-05-15 19:54:37 +00:00
Duraid Madina
03a7327d63 make angry compilers happy again 
llvm-svn: 22054
 2005-05-15 14:44:13 +00:00
Chris Lattner
95650a26b2 don't reserve space for tailcall arg areas. It explicitly managed. 
llvm-svn: 22050
 2005-05-15 06:07:10 +00:00
Chris Lattner
2fd2e53f6a Teach reginfo how to deal with ADJSTACKPTRri, allowing us to generate: 
add %ESP, 20
        jmp %EDX  # TAIL CALL

instead of:
        add %ESP, -8
        add %ESP, 28
        jmp %EDX  # TAIL CALL

llvm-svn: 22047
 2005-05-15 05:49:58 +00:00
Chris Lattner
77f8c2cece Implement proper tail calls in the X86 backend for all fastcc->fastcc 
tail calls.

llvm-svn: 22046
 2005-05-15 05:46:45 +00:00
Chris Lattner
7327c042b4 Add markers in the asm file for tail calls, add a new ADJSTACKPTRri 
sorta-pseudo-instruction

llvm-svn: 22042
 2005-05-15 03:10:37 +00:00
Chris Lattner
64232a8480 Yes, calltarget is the operand of the day. 
llvm-svn: 22040
 2005-05-15 01:10:30 +00:00
Chris Lattner
adb31a99fa When emitting the function epilog, check to see if there already a stack 
adjustment.  If so, we merge the adjustment into the existing one.  This
allows us to generate:

caller2:
        sub %ESP, 12
        mov DWORD PTR [%ESP], 0
        mov %EAX, 1234567890
        mov %EDX, 0
        call func2
        add %ESP, 8
        ret 4

intead of:

caller2:
        sub %ESP, 12
        mov DWORD PTR [%ESP], 0
        mov %EAX, 1234567890
        mov %EDX, 0
        call func2
        sub %ESP, 4
        add %ESP, 12
        ret 4

for X86/fast-cc-merge-stack-adj.ll

llvm-svn: 22038
 2005-05-14 23:53:43 +00:00
Chris Lattner
37e226fa9b Add some new instructions 
llvm-svn: 22036
 2005-05-14 23:35:21 +00:00
Chris Lattner
9d106c705d Pass i64 values correctly split in reg/mem to fastcc calls. 
This fixes fourinarow with -enable-x86-fastcc.

llvm-svn: 22022
 2005-05-14 12:03:10 +00:00
Chris Lattner
adde8b1a71 Use target-specific nodes for calls. This allows the fastcc code to not have 
to do ugly hackery to avoid emitting code like this:

   call foo
   mov vreg, EAX
   adjcallstackup ...

If foo is a fastcc call and if vreg gets spilled, we might end up with this:

   call foo
   mov [ESP+offset], EAX     ;; Offset doesn't consider the 12!
   sub ESP, 12

Which is bad.  The previous hacky code to deal with this was A) gross B) not
good enough.  In particular, it could miss cases and emit the bad code above.
Now we always emit this:

   call foo
   adjcallstackup ...
   mov vreg, EAX

directly.

This makes fastcc with callees poping the stack work much better.  Next
stop (finally!) really is tail calls.

llvm-svn: 22021
 2005-05-14 08:48:15 +00:00
Chris Lattner
c0c6680744 use a target-specific node and custom expander to lower long->FP to FILD64m. 
This should fix some missing symbols problems on BSD and improve performance
of programs that use that operation.

llvm-svn: 22012
 2005-05-14 06:52:07 +00:00
Chris Lattner
2210f7d6e9 Make sure the start of the arg area and the end (after the RA is pushed) 
is always 8-byte aligned for fastcc

llvm-svn: 21995
 2005-05-13 23:49:10 +00:00
Chris Lattner
1634435c77 fix typo 
llvm-svn: 21991
 2005-05-13 22:46:57 +00:00
Chris Lattner
0d4b08e470 Fix the problems with callee popped argument lists 
llvm-svn: 21988
 2005-05-13 22:13:49 +00:00
Chris Lattner
e667c34ef1 Don't emit SAR X, 0 in the case of sdiv Y, 2 
llvm-svn: 21986
 2005-05-13 21:50:27 +00:00
Chris Lattner
fc630bb4f0 Fix UnitTests/2005-05-13-SDivTwo.c 
llvm-svn: 21985
 2005-05-13 21:48:20 +00:00
Chris Lattner
62593e4e66 switch to having the callee pop stack operands for fastcc. This is currently buggy 
do not use

llvm-svn: 21984
 2005-05-13 21:44:04 +00:00
Chris Lattner
e9944b033d allow RETI 
llvm-svn: 21980
 2005-05-13 20:46:35 +00:00
Chris Lattner
93007dda7d treat TAILCALL nodes identically to CALL nodes 
llvm-svn: 21977
 2005-05-13 20:29:26 +00:00
Chris Lattner
2c9d871f9b Build TAILCALL nodes in LowerCallTo, treat them like normal calls everywhere. 
llvm-svn: 21976
 2005-05-13 20:29:13 +00:00
Chris Lattner
f637d56882 capitalize 
llvm-svn: 21962
 2005-05-13 19:48:34 +00:00
Chris Lattner
df23ee9e48 clarify that these are v9 options 
llvm-svn: 21960
 2005-05-13 19:45:45 +00:00
Chris Lattner
653c791170 hide this option 
llvm-svn: 21959
 2005-05-13 19:44:21 +00:00
Chris Lattner
9d788e93a6 Add an isTailCall flag to LowerCallTo 
llvm-svn: 21958
 2005-05-13 18:50:42 +00:00
Chris Lattner
83d7e55471 add 'ret imm' instruction 
llvm-svn: 21945
 2005-05-13 17:56:48 +00:00
Chris Lattner
f8795289ff Realize that we don't support fmod directly, fixing CodeGen/Generic/print-arith-fp.ll 
llvm-svn: 21939
 2005-05-13 16:20:22 +00:00
Chris Lattner
7c3b219c28 Do not CopyFromReg physregs for live-in values. Instead, create a vreg for 
each live in, and copy the regs from the vregs.  As the very first thing we
do in the function, insert copies from the pregs to the vregs.  This fixes
problems where the token chain of CopyFromReg was not enough to allow reordering
of the copyfromreg nodes and other unchained nodes (e.g. div, which clobbers
eax on intel).

llvm-svn: 21932
 2005-05-13 07:38:09 +00:00
Chris Lattner
094bbfcebb rename the ADJCALLSTACKDOWN/ADJCALLSTACKUP nodes to be CALLSEQ_START/BEGIN. 
llvm-svn: 21915
 2005-05-12 23:24:06 +00:00
Chris Lattner
3106dfa185 Add a new -enable-x86-fastcc option that enables passing the first 
two integer values in registers for the fastcc calling conv.

llvm-svn: 21912
 2005-05-12 23:06:28 +00:00
Chris Lattner
7e08dd591c Pass in Calling Convention to use into LowerCallTo 
llvm-svn: 21899
 2005-05-12 19:56:45 +00:00
Chris Lattner
d8766cdae2 Enable pattern isel by default 
llvm-svn: 21898
 2005-05-12 19:56:09 +00:00
Chris Lattner
6b0a45e42c These targets don't like setcc 
llvm-svn: 21884
 2005-05-12 02:06:00 +00:00
Nate Begeman
e84f776b5d Necessary changes to codegen cttz efficiently on PowerPC 
1. Teach LegalizeDAG how to better legalize CTTZ if the target doesn't have
   CTPOP, but does have CTLZ
2. Teach PPC32 how to do sub x, const -> add x, -const for valid consts
3. Teach PPC32 how to do and (xor a, -1) b -> andc b, a
4. Teach PPC32 that ISD::CTLZ -> PPC::CNTLZW

llvm-svn: 21880
 2005-05-11 23:43:56 +00:00
Tanya Lattner
265167f8db Fixed issue that broke ssa. 
llvm-svn: 21878
 2005-05-11 21:45:03 +00:00
Chris Lattner
da3dd2f9e2 fix some GCC 4 warnings 
llvm-svn: 21877
 2005-05-11 21:40:40 +00:00
John Criswell
38c97a63d4 Added support for decomposing constant expressions containing shr and shl 
instructions.
Review of this commit would be greatly appreciated.

llvm-svn: 21876
 2005-05-11 21:16:42 +00:00
Duraid Madina
b9062e56cf add the popcount instruction and support this in the isel 
the primary user of this will probably end up being find-first-set-bit/find-
last-set-bit, which i'll get around to...

llvm-svn: 21860
 2005-05-11 05:16:09 +00:00