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Author SHA1 Message Date
Duncan Sands
41edf30895 Simplify uses of MVT and EVT. An MVT can be compared directly 
with a SimpleValueType, while an EVT supports equality and
inequality comparisons with SimpleValueType.

llvm-svn: 118169
 2010-11-03 12:17:33 +00:00
Duncan Sands
4bbe978c7c Fix a comment typo. 
llvm-svn: 118168
 2010-11-03 11:55:03 +00:00
Duncan Sands
f6e5e02c9b Inside the calling convention logic LocVT is always a simple 
value type, so there is no point in passing it around using
an EVT.  Use the simpler MVT everywhere.  Rather than trying
to propagate this information maximally in all the code that
using the calling convention stuff, I chose to do a mainly
low impact change instead.

llvm-svn: 118167
 2010-11-03 11:35:31 +00:00
Eric Christopher
719d9d324b If we have an undef mask our Elt will be -1 for our access, handle 
this by using an undef as a pointer.

Fixes rdar://8625016

llvm-svn: 118164
 2010-11-03 09:36:40 +00:00
Duncan Sands
77fde689d9 Fix typo, pointed out by Trevor Harmon. 
llvm-svn: 118163
 2010-11-03 08:16:50 +00:00
Evan Cheng
eab7251695 Fix preload instruction isel. Only v7 supports pli, and only v7 with mp extension supports pldw. Add subtarget attribute to denote mp extension support and legalize illegal ones to nothing. 
llvm-svn: 118160
 2010-11-03 06:34:55 +00:00
Evan Cheng
b41703bc2f Add support to match @llvm.prefetch to pld / pldw / pli. rdar://8601536. 
llvm-svn: 118152
 2010-11-03 05:14:24 +00:00
Bill Wendling
3894287c96 Put the PC encoding in the correct bit position. 
llvm-svn: 118151
 2010-11-03 04:57:44 +00:00
Eric Christopher
bc79fa1c9e Invert these branches by default, it makes assembly comparisons a little 
easier to read.

llvm-svn: 118148
 2010-11-03 04:29:11 +00:00
Bill Wendling
34599f4aa8 The MC code couldn't handle ARM LDR instructions with negative offsets: 
vldr.64 d1, [r0, #-32]

The problem was with how the addressing mode 5 encodes the offsets. This change
makes sure that the way offsets are handled in addressing mode 5 is consistent
throughout the MC code. It involves re-refactoring the "getAddrModeImmOpValue"
method into an "Imm12" and "addressing mode 5" version. But not to worry! The
majority of the duplicated code has been unified.

llvm-svn: 118144
 2010-11-03 01:49:29 +00:00
Dan Gohman
8071a75d31 Fix DAGCombiner to avoid going into an infinite loop when it 
encounters (and:i64 (shl:i64 (load:i64), 1), 0xffffffff).
This fixes rdar://8606584.

llvm-svn: 118143
 2010-11-03 01:47:46 +00:00
Jim Grosbach
90a084bac2 Remove unused function. 
llvm-svn: 118141
 2010-11-03 01:35:15 +00:00
Jim Grosbach
d3213d4048 Remove the no longer used 'Modifier' optional operand to the ARM 
printOperand() asm printer helper functions. rdar://8425198

llvm-svn: 118140
 2010-11-03 01:11:15 +00:00
Jim Grosbach
4d6b503b4c Remove unused function. 
llvm-svn: 118139
 2010-11-03 01:07:48 +00:00
Jim Grosbach
c10d3f3d4b Break ARM addrmode4 (load/store multiple base address) into its constituent 
parts. Represent the operation mode as an optional operand instead.
rdar://8614429

llvm-svn: 118137
 2010-11-03 01:01:43 +00:00
Evan Cheng
67db408634 Two sets of changes. Sorry they are intermingled. 
1. Fix pre-ra scheduler so it doesn't try to push instructions above calls to
   "optimize for latency". Call instructions don't have the right latency and
   this is more likely to use introduce spills.
2. Fix if-converter cost function. For ARM, it should use instruction latencies,
   not # of micro-ops since multi-latency instructions is completely executed
   even when the predicate is false. Also, some instruction will be "slower"
   when they are predicated due to the register def becoming implicit input.
   rdar://8598427

llvm-svn: 118135
 2010-11-03 00:45:17 +00:00
Evan Cheng
e156473432 Modify scheduling itineraries to correct instruction latencies (not operand 
latencies) of loads.

llvm-svn: 118134
 2010-11-03 00:40:22 +00:00
Dan Gohman
67f95d770b Factor code out of APInt to form a isUIntN helper function. 
llvm-svn: 118133
 2010-11-03 00:38:40 +00:00
Chris Lattner
76a122055f fix typo, patch by Trevor Harmon (PR8537) 
llvm-svn: 118131
 2010-11-03 00:30:29 +00:00
Dan Gohman
69a6379472 Print an error as one big string instead of breaking it up. 
llvm-svn: 118130
 2010-11-03 00:24:33 +00:00
Dan Gohman
36d08298f4 Delete unused variables. 
llvm-svn: 118128
 2010-11-03 00:09:12 +00:00
Dan Gohman
4ad5745d44 Remove several unhelpful checks for isValid from sys::Path. 
llvm-svn: 118127
 2010-11-03 00:01:23 +00:00
Eric Christopher
b817a3e8fe Make sure we're only storing a single bit here. 
llvm-svn: 118126
 2010-11-02 23:59:09 +00:00
Chris Lattner
73111ecc25 per a suggestion by Frits van Bommel, mark all MBlaze Pseudo 
instructions as isCodeGenOnly in the parent class instead of
sprinkling it throughout the .td files.

llvm-svn: 118125
 2010-11-02 23:57:05 +00:00
Chris Lattner
5bf66af7ed chase owen. 
llvm-svn: 118124
 2010-11-02 23:55:24 +00:00
Chris Lattner
e6e3c0e4cf tweak this to pass. 
llvm-svn: 118122
 2010-11-02 23:50:17 +00:00
Owen Anderson
f754738bbb Revert r118097 to fix buildbots. 
llvm-svn: 118121
 2010-11-02 23:47:29 +00:00
Chris Lattner
0cfbc490da temporarily xfail this. 
llvm-svn: 118120
 2010-11-02 23:44:50 +00:00
Chris Lattner
d3f7a5d3bd Completely reject instructions that have an operand in their 
ins/outs list that isn't specified by their asmstring.  Previously
the asmmatcher would just force a 0 register into it, which clearly
isn't right.  Mark a bunch of ARM instructions that use this as 
isCodeGenOnly.  Some of them are clearly pseudo instructions (like
t2TBB) others use a weird hasExtraSrcRegAllocReq thing that will
either need to be removed or the asmmatcher will need to be taught
about it (someday).

llvm-svn: 118119
 2010-11-02 23:40:41 +00:00
Jakob Stoklund Olesen
1172cd6d88 Tweak the opt -O2 / opt -O3 inliner thresholds to be the same as llvm-gcc and 
clang are using.

llvm-svn: 118118
 2010-11-02 23:40:28 +00:00
Jakob Stoklund Olesen
ea31f5aadd Let the -inline-threshold command line argument take precedence over the 
threshold given to createFunctionInliningPass().

Both opt -O3 and clang would silently ignore the -inline-threshold option.

llvm-svn: 118117
 2010-11-02 23:40:26 +00:00
Dan Gohman
3a69090d70 Don't try to enforce MAXPATHLEN in sys::Path for Unix. OS's can check 
limits on their own.

llvm-svn: 118113
 2010-11-02 23:19:55 +00:00
Chris Lattner
76b970b846 make MatchableInfo::Validate reject instructions (like LDR_PRE in ARM) 
that have complicated tying going on.

llvm-svn: 118112
 2010-11-02 23:18:43 +00:00
Dan Gohman
ea2d1eb5d4 Simplify. 
llvm-svn: 118110
 2010-11-02 23:16:26 +00:00
John Thompson
4255425219 Inline asm mult-alt constraint tests. 
llvm-svn: 118107
 2010-11-02 23:01:44 +00:00
Dan Gohman
1250781030 Fix a copy+pasto. 
llvm-svn: 118106
 2010-11-02 22:56:51 +00:00
Dan Gohman
1c41b20c57 Avoid manipulating paths in fixed-sized arrays. 
llvm-svn: 118105
 2010-11-02 22:55:34 +00:00
Chris Lattner
db83b4f486 rewrite EmitConvertToMCInst to iterate over the MCInst operands, 
filling them in one at a time.  Previously this iterated over the
asmoperands, which left the problem of "holes".  The new approach
simplifies things.

llvm-svn: 118104
 2010-11-02 22:55:03 +00:00
Bill Wendling
1fb9812066 Obsessive formatting changes. No functionality impact. 
llvm-svn: 118103
 2010-11-02 22:53:11 +00:00
Dan Gohman
ce8c453106 Simplify this code. 
llvm-svn: 118102
 2010-11-02 22:50:10 +00:00
Bill Wendling
5ff380b14b Omit unused parameter name. 
llvm-svn: 118099
 2010-11-02 22:46:04 +00:00
Bill Wendling
f25c2b8895 Simplify the EncodeInstruction method now that a lot of the special case stuff 
is handled with the MC encoder.

llvm-svn: 118098
 2010-11-02 22:44:12 +00:00
Owen Anderson
ea89766d0c Since these fields are not exactly equivalent to the encoded field, rename them to something with semantic meaning. 
llvm-svn: 118097
 2010-11-02 22:41:42 +00:00
Dan Gohman
78b47498e3 Use '\0' instead of 0 for nul character constants. 
llvm-svn: 118096
 2010-11-02 22:41:19 +00:00
Bill Wendling
1546322a9c Rename getAddrModeImm12OpValue to getAddrModeImmOpValue and expand it to work 
with immediates up to 16-bits in size. The same logic is applied to other LDR
encodings, e.g. VLDR, but which use a different immediate bit width (8-bits in
VLDR's case). Removing the "12" allows it to be more generic.

llvm-svn: 118094
 2010-11-02 22:31:46 +00:00
Owen Anderson
8aba4dbe03 Rename encoder methods to match naming convention. 
llvm-svn: 118093
 2010-11-02 22:28:01 +00:00
Chris Lattner
5caaacef3b mark a few codegenonly instructions. 
llvm-svn: 118092
 2010-11-02 22:26:33 +00:00
Mikhail Glushenkov
79047e7eb3 appendSuffix: don't append a dot when the suffix is empty. 
Additionally, move the implementation of appendSuffix to Path.cpp: it is
platform-independent.

llvm-svn: 118089
 2010-11-02 22:18:37 +00:00
Mikhail Glushenkov
97788c1061 Revert r118057, this is better fixed in appendSuffix itself. 
llvm-svn: 118088
 2010-11-02 22:18:28 +00:00
Owen Anderson
cdd587157f Provide correct encodings for the remaining vst variants that we currently generate. 
llvm-svn: 118087
 2010-11-02 22:18:18 +00:00