Nate Begeman
44712926a0
Fix a couple bugs in the const div stuff where we'd generate MULHS/MULHU
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for types that aren't legal, and fail a divisor is less than zero
comparison, which would cause us to drop a subtract.
llvm-svn: 23846
2005-10-20 17:45:03 +00:00
Chris Lattner
1f9a14683a
don't use llabs with apparently VC++ doesn't have
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llvm-svn: 23845
2005-10-20 17:01:00 +00:00
Chris Lattner
3c1570debb
Fix order of eval problem from when I refactored this into a function.
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llvm-svn: 23844
2005-10-20 16:56:40 +00:00
Andrew Lenharth
81d2375468
Sounds good, finish the intop conversion.
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llvm-svn: 23843
2005-10-20 14:42:48 +00:00
Nate Begeman
bbce8c042c
Add some more patterns for i64 on ppc
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llvm-svn: 23842
2005-10-20 07:51:08 +00:00
Chris Lattner
ad14e0db81
add a new method, play around with some code.
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Fix a *bug* in the extendIntervalEndTo method. In particular, if adding
[2:10) to an interval containing [0:2),[10:30), we produced [0:10),[10,30).
Which is not the most smart thing to do. Now produce [0:30).
llvm-svn: 23841
2005-10-20 07:39:25 +00:00
Chris Lattner
ca5f516c08
add a new method
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llvm-svn: 23840
2005-10-20 07:37:59 +00:00
Chris Lattner
13d804c465
Refactor some code, pulling it out into a function. No functionality change.
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llvm-svn: 23839
2005-10-20 06:06:30 +00:00
Chris Lattner
3451ac7691
Do NOT touch FP ops with LSR. This fixes a testcase Nate sent me from an
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inner loop like this:
LBB_RateConvertMono8AltiVec_2: ; no_exit
lis r2, ha16(.CPI_RateConvertMono8AltiVec_0)
lfs f3, lo16(.CPI_RateConvertMono8AltiVec_0)(r2)
fmr f3, f3
fadd f0, f2, f0
fadd f3, f0, f3
fcmpu cr0, f3, f1
bge cr0, LBB_RateConvertMono8AltiVec_2 ; no_exit
to an inner loop like this:
LBB_RateConvertMono8AltiVec_1: ; no_exit
fsub f2, f2, f1
fcmpu cr0, f2, f1
fmr f0, f2
bge cr0, LBB_RateConvertMono8AltiVec_1 ; no_exit
Doh! good catch!
llvm-svn: 23838
2005-10-20 04:47:10 +00:00
Chris Lattner
763a62efa6
Add some pattern fragments to simplify the repetitive parts of the patterns
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for some common ops and use them for a few examples. Andrew, if you like
this, feel free to convert the rest over, if you hate it, feel free to
revert.
llvm-svn: 23837
2005-10-20 04:21:06 +00:00
Chris Lattner
27aacf1b55
simplify this a bit by using immediates
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llvm-svn: 23836
2005-10-20 03:57:03 +00:00
Nate Begeman
dc1a2a1f19
Move the target constant divide optimization up into the dag combiner, so
...
that the nodes can be folded with other nodes, and we can not duplicate
code in every backend. Alpha will probably want this too.
llvm-svn: 23835
2005-10-20 02:15:44 +00:00
Nate Begeman
2b0b27775d
Enable targets to say that integer divide is expensive, which will trigger
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an upcoming optimization in the DAG Combiner.
llvm-svn: 23834
2005-10-20 02:14:14 +00:00
Andrew Lenharth
21beb13e51
forgot this one
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llvm-svn: 23833
2005-10-20 00:29:02 +00:00
Andrew Lenharth
a7554852b3
ret 0; works, not much else
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still lots of uglyness.
Maybe calls will come soon.
Fixing the return value of things will be necessary to make alpha work.
llvm-svn: 23832
2005-10-20 00:28:31 +00:00
John Criswell
9ced67a0e1
This fixes PR638:
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Regression/CodeGen/Generic/2004-02-08-UnwindSupport.llx
llvm-svn: 23831
2005-10-19 20:07:15 +00:00
Jim Laskey
514a74d946
Added InstrSchedClass to each of the PowerPC Instructions.
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Note that when adding new instructions that you should refer to the table at the
bottom of PPCSchedule.td.
llvm-svn: 23830
2005-10-19 19:51:16 +00:00
John Criswell
ef91e2976a
Moved to Regression/Codegen/Generic.
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llvm-svn: 23829
2005-10-19 18:52:52 +00:00
John Criswell
c1547066cd
This is a generic test for all code generators. It originally came from
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Regression/Codegen/X86.
llvm-svn: 23826
2005-10-19 18:51:07 +00:00
Nate Begeman
83f0f34140
Write patterns for the various shl and srl patterns that don't involve
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doing something clever.
llvm-svn: 23824
2005-10-19 18:42:01 +00:00
John Criswell
190ec6e8f8
Force i386 code generation for an i386 specific test.
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llvm-svn: 23821
2005-10-19 18:30:39 +00:00
Jim Laskey
0918760dec
Push processor descriptions to the top of target and add command line info.
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llvm-svn: 23820
2005-10-19 13:34:52 +00:00
Chris Lattner
1bac5bc8a3
add support for literal immediates in patterns to match, allowing us to
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write things like this:
def : Pat<(add GPRC:$in, 12),
(ADD12 GPRC:$in)>;
Andrew: if this isn't enough or doesn't work for you, please lemme know.
llvm-svn: 23819
2005-10-19 04:41:05 +00:00
Chris Lattner
61ae05f5dd
now that tblgen is smarter, use integers directly. This should help Andrew too
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llvm-svn: 23818
2005-10-19 04:32:04 +00:00
Chris Lattner
1b8609b570
Add basic support for integer constants in pattern results.
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llvm-svn: 23817
2005-10-19 04:30:56 +00:00
Chris Lattner
cac2ff4864
Fix some checking that was causing duraid to get a perplexing assertion
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instead of a happy error message
llvm-svn: 23816
2005-10-19 04:12:14 +00:00
Chris Lattner
39538be7a5
Add support for patterns that have physical registers in them. Testcase:
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def : Pat<(trunc G8RC:$in),
(OR8To4 G8RC:$in, X0)>;
Even though this doesn't make any sense on PPC :)
llvm-svn: 23815
2005-10-19 02:07:26 +00:00
Chris Lattner
2a81cf4395
Asserting here is to violent
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llvm-svn: 23814
2005-10-19 01:55:23 +00:00
Chris Lattner
800f5628d5
teach ppc backend these are copies
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llvm-svn: 23813
2005-10-19 01:50:36 +00:00
Chris Lattner
dac26c2440
Make this work with the internalize change
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llvm-svn: 23812
2005-10-19 01:41:47 +00:00
Chris Lattner
73379995ab
Convert these cases to patterns
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llvm-svn: 23811
2005-10-19 01:38:02 +00:00
Chris Lattner
0816495607
Nate wants to define 'Pat's which turn into instructions that don't have
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patterns. Certainly a logical request.
llvm-svn: 23810
2005-10-19 01:27:22 +00:00
Nate Begeman
fccb39f398
Woo, it kinda works. We now generate this atrociously bad, but correct,
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code for long long foo(long long a, long long b) { return a + b; }
_foo:
or r2, r3, r3
or r3, r4, r4
or r4, r5, r5
or r5, r6, r6
rldicr r2, r2, 32, 31
rldicl r3, r3, 0, 32
rldicr r4, r4, 32, 31
rldicl r5, r5, 0, 32
or r2, r3, r2
or r3, r5, r4
add r4, r3, r2
rldicl r2, r4, 32, 32
or r4, r4, r4
or r3, r2, r2
blr
llvm-svn: 23809
2005-10-19 01:12:32 +00:00
Chris Lattner
fb8bc57259
Testcase that crashes llvmgcc in type layout
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llvm-svn: 23806
2005-10-19 00:52:21 +00:00
Chris Lattner
6416c5627d
apply some tblgen majik to simplify the X register definitions
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llvm-svn: 23805
2005-10-19 00:17:55 +00:00
Nate Begeman
957648f18b
Teach Legalize how to do something with EXTRACT_ELEMENT when the type of
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the pair of elements is a legal type.
llvm-svn: 23804
2005-10-19 00:06:56 +00:00
Nate Begeman
722531ea21
Make a new reg class for 64 bit regs that aliases the 32 bit regs. This
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will have to tide us over until we get real subreg support, but it prevents
the PrologEpilogInserter from spilling 8 byte GPRs on a G4 processor.
Add some initial support for TRUNCATE and ANY_EXTEND, but they don't
currently work due to issues with ScheduleDAG. Something wll have to be
figured out.
llvm-svn: 23803
2005-10-19 00:05:37 +00:00
Nate Begeman
ee581735d9
Add the ability to lower return instructions to TargetLowering. This
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allows us to lower legal return types to something else, to meet ABI
requirements (such as that i64 be returned in two i32 regs on Darwin/ppc).
llvm-svn: 23802
2005-10-18 23:23:37 +00:00
Chris Lattner
016497a971
Fix Generic/2005-10-18-ZeroSizeStackObject.ll by not requesting a zero
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sized stack object if either the array size or the type size is zero.
llvm-svn: 23801
2005-10-18 22:14:06 +00:00
Chris Lattner
1cf142a7d4
new testcase
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llvm-svn: 23798
2005-10-18 22:13:39 +00:00
Chris Lattner
82258b6abb
remove hack
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llvm-svn: 23797
2005-10-18 22:11:42 +00:00
Chris Lattner
213cd5c12b
This was never updated for the project makefile changes
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llvm-svn: 23790
2005-10-18 18:50:26 +00:00
Chris Lattner
645b455920
This never got updated to reflect the project makefile changes
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llvm-svn: 23789
2005-10-18 18:48:30 +00:00
Jim Laskey
da117aa6d3
Simple edits; remove unimplimented cases and clarify long haul SLU cases.
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llvm-svn: 23788
2005-10-18 16:59:23 +00:00
Chris Lattner
5edea4e9cd
Fix the JIT encoding of LWA, LD, STD, and STDU.
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llvm-svn: 23787
2005-10-18 16:51:22 +00:00
Jim Laskey
610af28ca0
Checking in first round of scheduling tablegen files. Not tied in as yet.
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llvm-svn: 23786
2005-10-18 16:23:40 +00:00
Chris Lattner
394413e59c
add a case
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llvm-svn: 23785
2005-10-18 06:30:51 +00:00
Chris Lattner
fb0fa6792e
Fix PR637
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llvm-svn: 23784
2005-10-18 06:29:43 +00:00
Chris Lattner
d21885e6c9
Add an option to this pass. If it is set, we are allowed to internalize
...
all but main. If it's not set, we can still internalize, but only if an
explicit symbol list is provided.
llvm-svn: 23783
2005-10-18 06:29:22 +00:00
Chris Lattner
211f996c92
add an option to the internalize pass
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llvm-svn: 23782
2005-10-18 06:28:16 +00:00