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Commit Graph

8530 Commits

Author SHA1 Message Date
Sebastian Neubauer
32c7642ef3 [AMDGPU] Clarify calling conv about inactive lanes
So far, it was not specified what happens with the VGPRs of inactive
lanes when functions are called. This patch explicitely mentions that
the VGPR values of inactive lanes need to be preserved for all
registers.

This describes the current behavior, as only active lanes of registers
are saved to scratch. Also, as the multi-lane nature of VGPRs is not
properly modeled, we cannot determine the live VGPRs from inactive lanes
at calls. So we cannot save them, even if we intended to do so.

Differential Revision: https://reviews.llvm.org/D95610
2021-02-02 10:15:09 +01:00
xgupta
ddd3adad6f [Branch-Rename] Fix some links
According to the [[ https://foundation.llvm.org/docs/branch-rename/ | status of branch rename ]], the master branch of the LLVM repository is removed on 28 Jan 2021.

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D95766
2021-02-01 16:43:21 +05:30
Serge Pavlov
ef7f39cab9 [FPEnv] Intrinsic for setting rounding mode
To set non-default rounding mode user usually calls function 'fesetround'
from standard C library. This way has some disadvantages.

* It creates unnecessary dependency on libc. On the other hand, setting
  rounding mode requires few instructions and could be made by compiler.
  Sometimes standard C library even is not available, like in the case of
  GPU or AI cores that execute small kernels.
* Compiler could generate more effective code if it knows that a particular
  call just sets rounding mode.

This change introduces new IR intrinsic, namely 'llvm.set.rounding', which
sets current rounding mode, similar to 'fesetround'. It however differs
from the latter, because it is a lower level facility:

* 'llvm.set.rounding' does not return any value, whereas 'fesetround'
  returns non-zero value in the case of failure. In glibc 'fesetround'
  reports failure if its argument is invalid or unsupported or if floating
  point operations are unavailable on the hardware. Compiler usually knows
  what core it generates code for and it can validate arguments in many
  cases.
* Rounding mode is specified in 'fesetround' using constants like
  'FE_TONEAREST', which are target dependent. It is inconvenient to work
  with such constants at IR level.

C standard provides a target-independent way to specify rounding mode, it
is used in FLT_ROUNDS, however it does not define standard way to set
rounding mode using this encoding.

This change implements only IR intrinsic. Lowering it to machine code is
target-specific and will be implemented latter. Mapping of 'fesetround'
to 'llvm.set.rounding' is also not implemented here.

Differential Revision: https://reviews.llvm.org/D74729
2021-02-01 11:28:14 +07:00
Abhina Sreeskantharajan
8fb00b74f1 [test] Use host platform specific error message substitution in lit tests
On z/OS, the following error message is not matched correctly in lit tests.

```
EDC5129I No such file or directory.
```

This patch uses a lit config substitution to check for platform specific error messages.

Reviewed By: muiez, jhenderson

Differential Revision: https://reviews.llvm.org/D95246
2021-01-29 07:16:30 -05:00
Tony Tye
43c2e84b50 [NFC][AMDGPU] Correct name of DWARF CFA extensions
Add LLVM to the DW_CFA_LLVM_def_aspace_cfa and
DW_CFA_LLVM_def_aspace_cfa_sf DWARF extensions.

Reviewed By: scott.linder

Differential Revision: https://reviews.llvm.org/D95640
2021-01-28 22:25:33 +00:00
Jessica Paquette
3fcc23c823 [GlobalISel] Add G_ASSERT_ZEXT
This adds a generic opcode which communicates that a type has already been
zero-extended from a narrower type.

This is intended to be similar to AssertZext in SelectionDAG.

For example,

```
%x_was_extended:_(s64) = G_ASSERT_ZEXT %x, 16
```

Signifies that the top 48 bits of %x are known to be 0.

This is useful in cases like this:

```
define i1 @zeroext_param(i8 zeroext %x) {
  %cmp = icmp ult i8 %x, -20
  ret i1 %cmp
}
```

In AArch64, `%x` must use a 32-bit register, which is then truncated to a 8-bit
value.

If we know that `%x` is already zero-ed out in the relevant high bits, we can
avoid the truncate.

Currently, in GISel, this looks like this:

```
_zeroext_param:
  and w8, w0, #0xff ; We don't actually need this!
  cmp w8, #236
  cset w0, lo
  ret
```

While SDAG does not produce the truncation, since it knows that it's
unnecessary:

```
_zeroext_param:
  cmp w0, #236
  cset w0, lo
  ret
```

This patch

- Adds G_ASSERT_ZEXT
- Adds MIRBuilder support for it
- Adds MachineVerifier support for it
- Documents it

It also puts G_ASSERT_ZEXT into its own class of "hint instruction." (There
should be a G_ASSERT_SEXT in the future, maybe a G_ASSERT_ALIGN as well.)

This allows us to skip over hints in the legalizer etc. These can then later
be selected like COPY instructions or removed.

Differential Revision: https://reviews.llvm.org/D95564
2021-01-28 13:58:37 -08:00
Jay Foad
fbb73224ea [AMDGPU] Write "GFX6-GFX9" instead of "GFX6-9" in docs
... and similarly for some other cases. This is for consistency and to
make it easier to search for mentions of a particular architecture.

Differential Revision: https://reviews.llvm.org/D95453
2021-01-27 10:07:07 +00:00
Tom Stellard
1a410d196a Bump the trunk major version to 13
and clear the release notes.
2021-01-26 19:37:55 -08:00
xgupta
0d37ea875a [Doc][NFC] Fix Kaleidoscope links, typos and add blog posts for MCJIT 2021-01-25 19:59:36 +05:30
Douglas Yung
8e49c6ad90 Update filename to workers.py file in documentation
Commit be9f322e8dc530a56f03356aad31fa9031b27e26 moved the list of workers from
slaves.py to workers.py, but the documentation in "How To Add A Builder" was
never updated and now references a non-existing file. This fixes that.

Reviewed By: gkistanova

Differential Revision: https://reviews.llvm.org/D94886
2021-01-22 00:20:26 -08:00
Wolfgang Pieb
aa3d30a34b [llvm-mca] Initial implementation of serialization using JSON. The views
implemented at this time are Summary, Timeline, ResourcePressure and InstructionInfo.
Use --json on the command line to obtain JSON output.
2021-01-21 15:15:54 -08:00
Ulrich Weigand
00373cf1be [NFC][Doc] Mention SystemZ supports StackMap generation
Support available as of commit 5eb64110d241cf2506f54ade3c2693beed42dd8f.

Differential Revision: https://reviews.llvm.org/D95040
2021-01-21 18:29:46 +01:00
Tony Tye
aa97298419 [NFC][AMDGPU] Document target ID syntax for code object V2 to V3
Differential Revision: https://reviews.llvm.org/D95018
2021-01-20 21:48:52 +00:00
Louis Dionne
275028ace9 [docs] Fix overly specific link to uploading patches on Phabricator
The documentation for contributing to LLVM currently links to the section
explaining how to submit a Phabricator review using the web interface.
I believe it would be better to link to the general page for using
Phabricator instead, which explains how to sign up with Phabricator,
and also how to submit patches using either the web interface or the
command-line.

I think this is worth changing because what currently *appears* to be our
preferred way of submitting a patch (through the web interface) isn't
actually what we prefer. Indeed, patches submitted from the command-line
have more meta-data available (such as which repository the patch targets),
and also can't suffer from missing context.

Differential Revision: https://reviews.llvm.org/D94929
2021-01-20 11:14:18 -05:00
James Henderson
f839dd9bae [llvm-symbolizer][doc] Reorder --relativenames in options list
This puts it in alphabetical order, matching the rest of the list.

Reviewed by: MaskRay, saugustine

Differential Revision: https://reviews.llvm.org/D94481
2021-01-20 11:50:00 +00:00
Juneyoung Lee
c70101b156 Allow nonnull/align attribute to accept poison
Currently LLVM is relying on ValueTracking's `isKnownNonZero` to attach `nonnull`, which can return true when the value is poison.
To make the semantics of `nonnull` consistent with the behavior of `isKnownNonZero`, this makes the semantics of `nonnull` to accept poison, and return poison if the input pointer isn't null.
This makes many transformations like below legal:

```
%p = gep inbounds %x, 1 ; % p is non-null pointer or poison
call void @f(%p)        ; instcombine converts this to call void @f(nonnull %p)
```

Instead, this semantics makes propagation of `nonnull` to caller illegal.
The reason is that, passing poison to `nonnull` does not immediately raise UB anymore, so such program is still well defined, if the callee does not use the argument.
Having `noundef` attribute there re-allows this.

```
define void @f(i8* %p) {       ; functionattr cannot mark %p nonnull here anymore
  call void @g(i8* nonnull %p) ; .. because @g never raises UB if it never uses %p.
  ret void
}
```

Another attribute that needs to be updated is `align`. This patch updates the semantics of align to accept poison as well.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D90529
2021-01-20 11:31:23 +09:00
Kai Nacke
0949e89c1d [Doc] Fix example in codegen doc.
The attributes in the example are placed wrong:
They belong after the type, not after the parameter name.

Reviewed by: abhina.sreeskantharajan

Differential Revision: https://reviews.llvm.org/D94683
2021-01-18 08:24:10 -05:00
Craig Topper
4097ff94d8 [IR] Allow scalable vectors in structs to support intrinsics returning multiple values.
RISC-V would like to use a struct of scalable vectors to return multiple
values from intrinsics. This woud also be needed for target independent
intrinsics like llvm.sadd.overflow.

This patch removes the existing restriction for this. I've modified
StructType::isSized to consider a struct containing scalable vectors
as unsized so the verifier won't allow loads/stores/allocas of these
structs.

Reviewed By: sdesmalen

Differential Revision: https://reviews.llvm.org/D94142
2021-01-17 23:29:51 -08:00
Jeroen Dobbelaere
4d4e2b930d Introduce llvm.noalias.decl intrinsic
The ``llvm.experimental.noalias.scope.decl`` intrinsic identifies where a noalias
scope is declared. When the intrinsic is duplicated, a decision must
also be made about the scope: depending on the reason of the duplication,
the scope might need to be duplicated as well.

Reviewed By: nikic, jdoerfert

Differential Revision: https://reviews.llvm.org/D93039
2021-01-16 09:20:45 +01:00
Alok Kumar Sharma
5ffb093588 [Debuginfo][DW_OP_implicit_pointer] (1/7) Support for DW_OP_LLVM_implicit_pointer
New dwarf operator DW_OP_LLVM_implicit_pointer is introduced (present only in LLVM IR)
This operator is required as it is different than DWARF operator
DW_OP_implicit_pointer in representation and specification (number
and types of operands) and later can not be used as multiple level.

Reviewed By: aprantl

Differential Revision: https://reviews.llvm.org/D84113
2021-01-15 14:45:04 +05:30
Stefan Gränitz
7d83b7c4c8 [docs] Update DebuggingJITedCode page after fix in LLDB
Generalize the documentation to include both, GDB and LLDB. Add a link to the interface
definition. Make a note on MCJIT's restriction to ELF. Mention the regression and bugfix
in LLDB as well as the jit-loader setting for macOS. Update the command line session to
use LLDB instead of GDB.

Reviewed By: lhames

Differential Revision: https://reviews.llvm.org/D90789
2021-01-14 15:43:11 +01:00
Jeroen Dobbelaere
8dd6e7c3bc [NFC] Use correct ssa.copy spelling when referring to the intrinsic
Split out from D91250. Fixes wrong ssa_copy naming.

Reviewed By: fhahn

Differential Revision: https://reviews.llvm.org/D94310
2021-01-13 20:43:14 +01:00
Juneyoung Lee
38ff89f219 [LangRef] State that a nocapture pointer cannot be returned
This is a small patch stating that a nocapture pointer cannot be returned.

Discussed in D93189.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D94386
2021-01-13 09:30:54 +09:00
Tony Tye
ecb293266f [NFC][AMDGPU] Clarify memory model support for volatile
Reorder the AMDGPUUage description of the memory model code sequences
for volatile so clear that it applies independent of the nontemporal
setting.

Differential Revision: https://reviews.llvm.org/D94358
2021-01-11 19:59:55 +00:00
Florian Hahn
1b17d90a73 [SimplifyCFG] Keep !dgb metadata of moved instruction, if they match.
Currently SimplifyCFG drops the debug locations of 'bonus' instructions.
Such instructions are moved before the first branch. The reason for the
current behavior is that this could lead to surprising debug stepping,
if the block that's folded is dead.

In case the first branch and the instructions to be folded have the same
debug location, this shouldn't be an issue and we can keep the debug
location.

Reviewed By: vsk

Differential Revision: https://reviews.llvm.org/D93662
2021-01-09 19:15:16 +00:00
Tony
ccb53c0a97 [AMDGPU] Add volatile support to SIMemoryLegalizer
Treat a non-atomic volatile load and store as a relaxed atomic at
system scope for the address spaces accessed. This will ensure all
relevant caches will be bypassed.

A volatile atomic is not changed and still only bypasses caches upto
the level specified by the SyncScope operand.

Differential Revision: https://reviews.llvm.org/D94214
2021-01-09 00:52:33 +00:00
Paul C. Anagnostopoulos
d74e81058e [TableGen] Add the assert statement, step 1
Differential Revision: https://reviews.llvm.org/D93911

This first step adds the assert statement and supports it at top level
and in record definitions. Later steps will support it in class
definitions and multiclasses.
2021-01-08 09:47:51 -05:00
Fangrui Song
171489a04d [sanitizer] Define SANITIZER_GLIBC to refine SANITIZER_LINUX feature detection and support musl
Several `#if SANITIZER_LINUX && !SANITIZER_ANDROID` guards are replaced
with the more appropriate `#if SANITIZER_GLIBC` (the headers are glibc
extensions, not specific to Linux (i.e. if we ever support GNU/kFreeBSD
or Hurd, the guards may automatically work)).

Several `#if SANITIZER_LINUX && !SANITIZER_ANDROID` guards are refined
with `#if SANITIZER_GLIBC` (the definitions are available on Linux glibc,
but may not be available on other libc (e.g. musl) implementations).

This patch makes `ninja asan cfi lsan msan stats tsan ubsan xray` build on a musl based Linux distribution (apk install musl-libintl)
Notes about disabled interceptors for musl:

* `SANITIZER_INTERCEPT_GLOB`: musl does not implement `GLOB_ALTDIRFUNC` (GNU extension)
* Some ioctl structs and functions operating on them.
* `SANITIZER_INTERCEPT___PRINTF_CHK`: `_FORTIFY_SOURCE` functions are GNU extension
* `SANITIZER_INTERCEPT___STRNDUP`: `dlsym(RTLD_NEXT, "__strndup")` errors so a diagnostic is formed. The diagnostic uses `write` which hasn't been intercepted => SIGSEGV
* `SANITIZER_INTERCEPT_*64`: the `_LARGEFILE64_SOURCE` functions are glibc specific. musl does something like `#define pread64 pread`
* Disabled `msg_iovlen msg_controllen cmsg_len` checks: musl is conforming while many implementations (Linux/FreeBSD/NetBSD/Solaris) are non-conforming. Since we pick the glibc definition, exclude the checks for musl (incompatible sizes but compatible offsets)

Pass through LIBCXX_HAS_MUSL_LIBC to make check-msan/check-tsan able to build libc++ (https://bugs.llvm.org/show_bug.cgi?id=48618).

Many sanitizer features are available now.

```
% ninja check-asan
(known issues:
* ASAN_OPTIONS=fast_unwind_on_malloc=0 odr-violations hangs
)
...
Testing Time: 53.69s
  Unsupported      : 185
  Passed           : 512
  Expectedly Failed:   1
  Failed           :  12

% ninja check-ubsan check-ubsan-minimal check-memprof # all passed

% ninja check-cfi
( all cross-dso/)
...
Testing Time: 8.68s
  Unsupported      : 264
  Passed           :  80
  Expectedly Failed:   8
  Failed           :  32

% ninja check-lsan
(With GetTls (D93972), 10 failures)
Testing Time: 4.09s
  Unsupported:  7
  Passed     : 65
  Failed     : 22

% ninja check-msan
(Many are due to functions not marked unsupported.)
Testing Time: 23.09s
  Unsupported      :   6
  Passed           : 764
  Expectedly Failed:   2
  Failed           :  58

% ninja check-tsan
Testing Time: 23.21s
  Unsupported      :  86
  Passed           : 295
  Expectedly Failed:   1
  Failed           :  25
```

Used `ASAN_OPTIONS=verbosity=2` to verify there is no unneeded interceptor.

Partly based on Jari Ronkainen's https://reviews.llvm.org/D63785#1921014

Note: we need to place `_FILE_OFFSET_BITS` above `#include "sanitizer_platform.h"` to avoid `#define __USE_FILE_OFFSET64 1` in 32-bit ARM `features.h`

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D93848
2021-01-06 10:55:40 -08:00
Alan Phipps
f85fa6973c [Coverage] Add support for Branch Coverage in LLVM Source-Based Code Coverage
This is an enhancement to LLVM Source-Based Code Coverage in clang to track how
many times individual branch-generating conditions are taken (evaluate to TRUE)
and not taken (evaluate to FALSE).  Individual conditions may comprise larger
boolean expressions using boolean logical operators.  This functionality is
very similar to what is supported by GCOV except that it is very closely
anchored to the ASTs.

Differential Revision: https://reviews.llvm.org/D84467
2021-01-05 09:51:51 -06:00
Chih-Ping Chen
1f73b986d5 [docs] Release notes for IsDecl in DIModule.
Please see https://reviews.llvm.org/D93462 for the actual code change.

Differential Revision: https://reviews.llvm.org/D93558
2021-01-04 07:03:34 -05:00
Nuno Lopes
4599be1fc4 LangRef: fix significand bits of fp128 2020-12-31 11:13:25 +00:00
Praveen Velliengiri
b88899815f [AMDGPU] Use MUBUF instructions for global address space access
Currently, the compiler crashes in instruction selection of global
load/stores in gfx600 due to the lack of FLAT instructions. This patch
fix the crash by selecting MUBUF instructions for global load/stores
in gfx600.

Authored-by: Praveen Velliengiri <Praveen.Velliengiri@amd.com>

Reviewed by: t-tye

Differential revision: https://reviews.llvm.org/D92483
2020-12-24 10:13:04 +00:00
Paul C. Anagnostopoulos
1c400b3882 [TableGen] Add the !substr() bang operator
Update the documentation and add a test.

Build failed: Change SIZE_MAX to std::numeric_limits<int64_t>::max().

Differential Revision: https://reviews.llvm.org/D93419
2020-12-23 10:59:33 -05:00
Arnold Schwaighofer
213a4b317b Add a llvm.coro.end.async intrinsic
The llvm.coro.end.async intrinsic allows to specify a function that is
to be called as the last action before returning. This function will be
inlined after coroutine splitting.

This function can contain a 'musttail' call to allow for guaranteed tail
calling as the last action.

Differential Revision: https://reviews.llvm.org/D93568
2020-12-22 10:52:28 -08:00
Tom Stellard
782aaa377e HowToReleaseLLVM: Update document to match the current release process
Change Summary:

* Clarify that release manager can commit without code owner approval
  (but are still highly encouraged to get approval).

* Clarify that there is no official release criteria.

* Document what types of changes are allowed in each release phase.

This is update is based on the RFC submitted here:
http://lists.llvm.org/pipermail/llvm-dev/2020-May/141730.html

Reviewed By: hans

Differential Revision: https://reviews.llvm.org/D93493
2020-12-21 15:16:11 -08:00
Hafiz Abid Qadeer
3476612836 Update references to 'master' branch.
This commit replace 'master' with 'main' in llvm/docs.

Reviewed By: sammccall, kristof.beyls

Differential Revision: https://reviews.llvm.org/D92831
2020-12-21 19:10:34 +00:00
Paul C. Anagnostopoulos
cb25df4369 Revert "[TableGen] Add the !substr() bang operator"
This reverts commit 3a675c777dd5788e2313cb06fb27b01f8a2e7573.
2020-12-21 10:46:25 -05:00
Paul C. Anagnostopoulos
415c2c940a [TableGen] Add the !substr() bang operator
Update the documentation and add a test.

Differential Revision: https://reviews.llvm.org/D93419
2020-12-21 09:41:59 -05:00
Jacques Pienaar
3733be80bf [FileCheck] Add a literal check directive modifier
Introduce CHECK modifiers that change the behavior of the CHECK
directive. Also add a LITERAL modifier for cases where matching could
end requiring escaping strings interpreted as regex where only
literal/fixed string matching is desired (making the CHECK's more
difficult to write/fragile and difficult to interpret).
2020-12-18 17:26:15 -08:00
Bjorn Pettersson
3774e2781f Add intrinsics for saturating float to int casts
This patch adds support for the fptoui.sat and fptosi.sat intrinsics,
which provide basically the same functionality as the existing fptoui
and fptosi instructions, but will saturate (or return 0 for NaN) on
values unrepresentable in the target type, instead of returning
poison. Related mailing list discussion can be found at:
https://groups.google.com/d/msg/llvm-dev/cgDFaBmCnDQ/CZAIMj4IBAAJ

The intrinsics have overloaded source and result type and support
vector operands:

    i32 @llvm.fptoui.sat.i32.f32(float %f)
    i100 @llvm.fptoui.sat.i100.f64(double %f)
    <4 x i32> @llvm.fptoui.sat.v4i32.v4f16(half %f)
    // etc

On the SelectionDAG layer two new ISD opcodes are added,
FP_TO_UINT_SAT and FP_TO_SINT_SAT. These opcodes have two operands
and one result. The second operand is an integer constant specifying
the scalar saturation width. The idea here is that initially the
second operand and the scalar width of the result type are the same,
but they may change during type legalization. For example:

    i19 @llvm.fptsi.sat.i19.f32(float %f)
    // builds
    i19 fp_to_sint_sat f, 19
    // type legalizes (through integer result promotion)
    i32 fp_to_sint_sat f, 19

I went for this approach, because saturated conversion does not
compose well. There is no good way of "adjusting" a saturating
conversion to i32 into one to i19 short of saturating twice.
Specifying the saturation width separately allows directly saturating
to the correct width.

There are two baseline expansions for the fp_to_xint_sat opcodes. If
the integer bounds can be exactly represented in the float type and
fminnum/fmaxnum are legal, we can expand to something like:

    f = fmaxnum f, FP(MIN)
    f = fminnum f, FP(MAX)
    i = fptoxi f
    i = select f uo f, 0, i # unnecessary if unsigned as 0 = MIN

If the bounds cannot be exactly represented, we expand to something
like this instead:

    i = fptoxi f
    i = select f ult FP(MIN), MIN, i
    i = select f ogt FP(MAX), MAX, i
    i = select f uo f, 0, i # unnecessary if unsigned as 0 = MIN

It should be noted that this expansion assumes a non-trapping fptoxi.

Initial tests are for AArch64, x86_64 and ARM. This exercises all of
the scalar and vector legalization. ARM is included to test float
softening.

Original patch by @nikic and @ebevhan (based on D54696).

Differential Revision: https://reviews.llvm.org/D54749
2020-12-18 11:09:41 +01:00
Rong Xu
92b9137fcb [IR][PGO] Add hot func attribute and use hot/cold attribute in func section
Clang FE currently has hot/cold function attribute. But we only have
cold function attribute in LLVM IR.

This patch adds support of hot function attribute to LLVM IR.  This
attribute will be used in setting function section prefix/suffix.
Currently .hot and .unlikely suffix only are added in PGO (Sample PGO)
compilation (through isFunctionHotInCallGraph and
isFunctionColdInCallGraph).

This patch changes the behavior. The new behavior is:
(1) If the user annotates a function as hot or isFunctionHotInCallGraph
    is true, this function will be marked as hot. Otherwise,
(2) If the user annotates a function as cold or
    isFunctionColdInCallGraph is true, this function will be marked as
    cold.

The changes are:
(1) user annotated function attribute will used in setting function
    section prefix/suffix.
(2) hot attribute overwrites profile count based hotness.
(3) profile count based hotness overwrite user annotated cold attribute.

The intention for these changes is to provide the user a way to mark
certain function as hot in cases where training input is hard to cover
all the hot functions.

Differential Revision: https://reviews.llvm.org/D92493
2020-12-17 18:41:12 -08:00
Tony
062d45d53c [NFC][AMDGPU] Reorganize description of scratch handling
Differential Revision: https://reviews.llvm.org/D93440
2020-12-17 19:33:14 +00:00
Fangrui Song
803a9c9668 [LangRef] Update new ssp/sspstrong/sspreq semantics after D91816
Reviewed By: nickdesaulniers

Differential Revision: https://reviews.llvm.org/D93422
2020-12-17 09:16:37 -08:00
Jon Chesterfield
0309056e6e [amdgpu] Default to code object v3
[amdgpu] Default to code object v3
v4 is not yet readily available, and doesn't appear
to be implemented in the back end

Reviewed By: t-tye, yaxunl

Differential Revision: https://reviews.llvm.org/D93258
2020-12-17 16:09:33 +00:00
serge-sans-paille
71ab5028de Remove Python2 fallback and only advertise Python3 in the doc
Differential Revision: https://www.youtube.com/watch?v=RsL0cipURA0
2020-12-17 15:40:16 +01:00
Xiang1 Zhang
7ce08bafea [Debugify] Support checking Machine IR debug info
Add mir-check-debug pass to check MIR-level debug info.

For IR-level, currently, LLVM have debugify + check-debugify to generate
and check debug IR. Much like the IR-level pass debugify, mir-debugify
inserts sequentially increasing line locations to each MachineInstr in a
Module, But there is no equivalent MIR-level check-debugify pass, So now
we support it at "mir-check-debug".

Reviewed By: djtodoro

Differential Revision: https://reviews.llvm.org/D91595
2020-12-16 22:17:25 -08:00
Xiang1 Zhang
085e55a045 Revert "[Debugify] Support checking Machine IR debug info"
This reverts commit 50aaa8c274910d78d7bf6c929a34fe58b1f45579.
2020-12-16 20:12:33 -08:00
Xiang1 Zhang
d9173ede20 [Debugify] Support checking Machine IR debug info
Add mir-check-debug pass to check MIR-level debug info.

For IR-level, currently, LLVM have debugify + check-debugify to generate
and check debug IR. Much like the IR-level pass debugify, mir-debugify
inserts sequentially increasing line locations to each MachineInstr in a
Module, But there is no equivalent MIR-level check-debugify pass, So now
we support it at "mir-check-debug".

Reviewed By: djtodoro

Differential Revision: https://reviews.llvm.org/D91595
2020-12-16 18:04:05 -08:00
Kai Nacke
3d56a7203c [Doc][SystemZ] Add Linux/SystemZ to Getting Started guide.
The Linux/SystemZ platform is missing in the Getting Started guide
as platform on which LLVM is known to work.

Reviewed by: uweigand

Differential Revision: https://reviews.llvm.org/D93388
2020-12-16 10:46:05 -05:00
Matt Arsenault
a6f5a606fa LangRef: Update byval/sret description for required types 2020-12-16 10:25:36 -05:00