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5046 Commits

Author SHA1 Message Date
Jakob Stoklund Olesen
2bf243f464 Remove X86-dependent stuff from SSEDomainFix. 
This also enables domain swizzling for AVX code which required a few
trivial test changes.

The pass will be moved to lib/CodeGen shortly.

llvm-svn: 140659
 2011-09-27 23:50:46 +00:00
Justin Holewinski
a50e29abd6 PTX: Add support for sitofp in backend 
llvm-svn: 140593
 2011-09-27 01:04:47 +00:00
Eli Friedman
db69f84663 Last batch of test conversions to new atomic instructions. 
llvm-svn: 140585
 2011-09-27 00:17:29 +00:00
Eli Friedman
3db429c878 Convert a bunch more tests over to the new atomic instructions. 
llvm-svn: 140582
 2011-09-26 23:15:09 +00:00
Eli Friedman
d01fc33809 Convert more tests to new atomic instructions. 
llvm-svn: 140567
 2011-09-26 21:36:10 +00:00
Eli Friedman
6aaaadc188 Convert more tests over to the new atomic instructions. 
I did not convert Atomics-32.ll and Atomics-64.ll by hand; the diff is autoupgrade output.

The wmb test is gone because there isn't any way to express wmb with the new atomic instructions; if someone really needs a non-asm way to write a wmb on Alpha, a platform-specific intrisic could be added.

llvm-svn: 140566
 2011-09-26 21:30:17 +00:00
Eli Friedman
56e68f7271 Convert more tests over to the new atomic instructions. 
llvm-svn: 140559
 2011-09-26 20:27:49 +00:00
Justin Holewinski
52c50104d7 PTX: Fix detection of stack load/store vs. global load/store, as well as fix the 
printing of local offsets

llvm-svn: 140547
 2011-09-26 18:57:22 +00:00
Justin Holewinski
443a122ac3 PTX: Add .align tests to stack object test file 
llvm-svn: 140537
 2011-09-26 16:20:38 +00:00
Justin Holewinski
859dd9fa59 PTX: Fix some lingering issues with stack allocation 
llvm-svn: 140535
 2011-09-26 16:20:34 +00:00
Justin Holewinski
83ae9143fd PTX: Unify handling of loads/stores 
llvm-svn: 140533
 2011-09-26 16:20:28 +00:00
David Meyer
90ed5fdd4f Only run tests in test/CodeGen/CBackend/X86 when both X86 and CBackend are supported 
llvm-svn: 140517
 2011-09-26 06:44:27 +00:00
David Meyer
a6e588d80c PR11004: Inline memcpy to avoid generating nested call sequence. Un-XFAIL 2011-06-09-TailCallByVal and 2010-11-04-BigByval 
llvm-svn: 140516
 2011-09-26 06:13:20 +00:00
Jakob Stoklund Olesen
59b2982dcf Only run MF.verify() with EXPENSIVE_CHECKS=1. 
llvm-svn: 140441
 2011-09-24 01:11:19 +00:00
Jakob Stoklund Olesen
bc6ae70907 Verify that terminators follow non-terminators. 
This exposes a -segmented-stacks bug.

llvm-svn: 140429
 2011-09-23 22:45:39 +00:00
Eli Friedman
a66a438876 PR10998: It is not legal to sink an instruction past the terminator of a block; make sure we don't do that. 
llvm-svn: 140428
 2011-09-23 22:41:57 +00:00
Jakob Stoklund Olesen
ca6877343b Also match negative offsets for addrmode3 and addrmode5. 
Math is hard, and isScaledConstantInRange() always returned false for
negative constants.  It was doing unsigned division of negative numbers
before casting back to signed.

llvm-svn: 140425
 2011-09-23 22:10:33 +00:00
Justin Holewinski
1c0e0dcfbe PTX: Handle function call return values 
llvm-svn: 140386
 2011-09-23 16:48:41 +00:00
Justin Holewinski
0231798704 PTX: Start fixing function calls 
llvm-svn: 140378
 2011-09-23 14:31:12 +00:00
Eli Friedman
6f0131b3a7 PR10989: Don't print .hidden on Windows. 
llvm-svn: 140356
 2011-09-23 00:13:02 +00:00
Eli Friedman
31c7bde95a PR10991: make fast-isel correctly check whether accessing a global through an alias involves thread-local storage. (I'm not entirely sure how this is supposed to work, but this patch makes fast-isel consistent with the normal isel path.) 
llvm-svn: 140355
 2011-09-22 23:41:28 +00:00
Dan Gohman
d63418e497 Fix SimplifySelectCC to add newly created nodes to the DAGCombiner 
worklist, as it may be possible to perform further optimization on them.

llvm-svn: 140349
 2011-09-22 23:01:29 +00:00
Duncan Sands
1da590b589 Synthesize SSE3/AVX 128 bit horizontal add/sub instructions from 
floating point add/sub of appropriate shuffle vectors.  Does not
synthesize the 256 bit AVX versions because they work differently.

llvm-svn: 140332
 2011-09-22 20:15:48 +00:00
Justin Holewinski
9acce6aa64 PTX: fixup test cases for register changes 
llvm-svn: 140311
 2011-09-22 16:45:51 +00:00
Devang Patel
5d43ab8434 Do not unnecessarily use AT_specification DIE because it does not add any value. 
Few weeks ago, llvm completely inverted the debug info graph. Earlier each debug info node used to keep track of its compile unit, now compile unit keeps track of important nodes. One impact of this change is that the global variable's do not have any context, which should be checked before deciding to use AT_specification DIE.

llvm-svn: 140282
 2011-09-21 23:41:11 +00:00
Akira Hatanaka
0c87291a10 Remove +. 
llvm-svn: 140266
 2011-09-21 17:43:48 +00:00
Akira Hatanaka
d987b12b57 Re-enable some of the disabled tests. Use FileCheck instead of grep to check 
output.

llvm-svn: 140263
 2011-09-21 17:36:30 +00:00
Nadav Rotem
50430e8160 add another testcase for pr10902 
llvm-svn: 140257
 2011-09-21 17:13:40 +00:00
Nadav Rotem
af5643de3c [VECTOR-SELECT] Address one of the bugs in pr10902. 
Vector SetCC result types need to be type-legalized.
This code worked before because scalar result types are known to be legal.

llvm-svn: 140249
 2011-09-21 14:34:38 +00:00
Eric Christopher
9b721ff19e Remove llvm-gcc and various compiler handling from llvm. It's not needed 
here anymore and has been migrated to the test-suite project.

llvm-svn: 140216
 2011-09-20 23:58:15 +00:00
Bill Wendling
67cf034fe3 This test is completely invalid with the modern EH model. Delete. 
llvm-svn: 140213
 2011-09-20 23:52:09 +00:00
Bruno Cardoso Lopes
1ffbef8ad1 Add a DAGCombine for subvector extracts to remove useless chains of 
subvector inserts and extracts. Initial patch by Rackover, Zvi with
some tweak done by me.

llvm-svn: 140204
 2011-09-20 23:19:33 +00:00
Bruno Cardoso Lopes
629e7c2410 Revert r140097, working on a better approach 
llvm-svn: 140203
 2011-09-20 23:19:29 +00:00
Evan Cheng
ead45e2ba6 Fix a bug introduced during refactoring a couple of months ago. Cortex-M3 does not support Thumb2 dsp instructions. rdar://10152911. 
llvm-svn: 140181
 2011-09-20 21:38:18 +00:00
NAKAMURA Takumi
595c0c8e15 test/CodeGen/X86/avx-minmax.ll: Unbreak Win32. 
On Windows x64, 128-bit arguments are not passed by reg but by indirect. eg.

maxpd:
        vmovapd (%rcx), %xmm0
        vmaxpd  (%rdx), %xmm0, %xmm0

FIXME: I don't care YMM on x64 for now.
llvm-svn: 140143
 2011-09-20 14:11:35 +00:00
Craig Topper
df17f1cc99 Extend changes from r139986 to produce 256-bit AVX minps/minpd/maxps/maxpd. 
llvm-svn: 140140
 2011-09-20 07:38:59 +00:00
Andrew Trick
53aeb9f663 ARM isel bug fix for adds/subs operands. 
Modified ARMISelLowering::AdjustInstrPostInstrSelection to handle the
full gamut of CPSR defs/uses including instructins whose "optional"
cc_out operand is not really optional. This allowed removal of the
hasPostISelHook to simplify the .td files and make the implementation
more robust.
Fixes rdar://10137436: sqlite3 miscompile

llvm-svn: 140134
 2011-09-20 03:17:40 +00:00
Bruno Cardoso Lopes
bed7ef51b6 Attempt to fix -mtriple=i686-{cygwin|mingw|win32} regressions. Nakamura, 
if this doesn't work, please provide more details.

llvm-svn: 140107
 2011-09-20 00:08:12 +00:00
Bruno Cardoso Lopes
7cf7f02c3d Based on the small opt Zvi's patch was trying to achieve, eliminate 
128-bit undef subvector insertion into a 256-bit vector

llvm-svn: 140097
 2011-09-19 23:36:50 +00:00
Eli Friedman
b11676fb4b Some additional tests for Thumb atomic load and store (which I somehow forgot to commit earlier). 
llvm-svn: 140074
 2011-09-19 22:02:33 +00:00
Bruno Cardoso Lopes
9e5ef44daf Match X86ISD::FSETCCsd and X86ISD::FSETCCss while in AVX mode. This fix 
PR10955 and PR10948.

llvm-svn: 140069
 2011-09-19 21:29:24 +00:00
Nadav Rotem
1cfdc59e94 setOperationAction should be done on the return value of the type, not the operands. 
llvm-svn: 140001
 2011-09-18 14:57:03 +00:00
Nadav Rotem
cfc77bc719 When promoting integer vectors we often create ext-loads. This patch adds a 
dag-combine optimization to implement the ext-load efficiently (using shuffles).

For example the type <4 x i8> is stored in memory as i32, but it needs to
find its way into a <4 x i32> register. Previously we scalarized the memory
access, now we use shuffles.

llvm-svn: 139995
 2011-09-18 10:39:32 +00:00
Benjamin Kramer
547157073b Apply Duncan's test fix from r139986 to the avx version of that test too. 
llvm-svn: 139992
 2011-09-18 00:41:38 +00:00
Duncan Sands
4149334f09 Synthesize x86 max/min instructions also for vectors (i.e. produce 
maxps and maxpd).  This broke the sse41-blend.ll testcase by causing
maxpd to be produced rather than a cmp+blend pair, which is the reason
I tweaked it.  Gives a small speedup on doduc with dragonegg when the
GCC vectorizer is used.

llvm-svn: 139986
 2011-09-17 16:49:39 +00:00
Andrew Trick
10ea51b841 Test case trial and error. Not sure the proper way to check MBB names. 
llvm-svn: 139900
 2011-09-16 03:57:19 +00:00
Andrew Trick
5be06c8057 Reduced a stronger test case for coalescer bug PR10920. 
llvm-svn: 139898
 2011-09-16 03:46:49 +00:00
Eli Friedman
f7bb39b592 Some legalization fixes for atomic load and store. 
llvm-svn: 139851
 2011-09-15 21:20:49 +00:00
Jakob Stoklund Olesen
b36a98d18f VirtRegMap is counting spill slots, not register spills. 
Fix the stats counters to reflect that.

llvm-svn: 139819
 2011-09-15 18:31:13 +00:00
Bruno Cardoso Lopes
8e702bba63 Change all checks regarding the presence of any SSE level to always 
take into consideration the presence of AVX. This change, together with
the SSEDomainFix enabled for AVX, makes AVX codegen to always (hopefully)
emit the same code as SSE for 128-bit vector ops. I don't
have a testcase for this, but AVX now beats SSE in performance for
128-bit ops in the majority of programas in the llvm testsuite

llvm-svn: 139817
 2011-09-15 18:27:36 +00:00