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4b12a5b7fc
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214 Commits

Author SHA1 Message Date
Chad Rosier
4b12a5b7fc Enable support for returning i1, i8, and i16. Nothing special todo as it's the 
callee's responsibility to sign or zero-extend the return value.  The additional
test case just checks to make sure the calls are selected (i.e., -fast-isel-abort
doesn't assert).

llvm-svn: 144047
 2011-11-08 00:03:32 +00:00
Chad Rosier
806ffd8918 Add support for passing i1, i8, and i16 call parameters. Also, be sure to 
zero-extend the constant integer encoding.  Test case provides testing for
both call parameters and materialization of i1, i8, and i16 types.

llvm-svn: 143821
 2011-11-05 20:16:15 +00:00
Chad Rosier
5e54485e51 Cannot create a result register for non-legal types. 
llvm-svn: 143749
 2011-11-04 23:45:39 +00:00
Chad Rosier
a900a3e2f6 When materializing an i32, SExt vs ZExt doesn't matter when we're trying to fit 
in a 16-bit immediate.  However, for the shorter non-legal types (i.e., i1, i8,
i16) we should not sign-extend.  This prevents us from materializing things
such as 'true' (i.e., i1 1).

llvm-svn: 143743
 2011-11-04 23:09:49 +00:00
Chad Rosier
0143eb6f22 Enable support for materializing i1, i8, and i16 integers via move immediate. 
llvm-svn: 143739
 2011-11-04 22:29:00 +00:00
Chad Rosier
8836fe3bbd Indentation. 
llvm-svn: 143670
 2011-11-04 00:58:10 +00:00
Chad Rosier
21cd759234 Add fast-isel support for returning i1, i8, and i16. 
llvm-svn: 143669
 2011-11-04 00:50:21 +00:00
Chad Rosier
74c4e2c2d9 Add support for sign-extending non-legal types in SelectSIToFP(). 
llvm-svn: 143603
 2011-11-03 02:04:59 +00:00
Chad Rosier
8a613c5ec5 Add support for comparing integer non-legal types. 
llvm-svn: 143559
 2011-11-02 18:08:25 +00:00
Chad Rosier
e94ff7c26e Factor out an EmitIntExt function. No functionality change intended. 
llvm-svn: 143547
 2011-11-02 17:20:24 +00:00
Chad Rosier
f72870096b Factor out a SelectTrunc function. No functionality change intended. 
llvm-svn: 143523
 2011-11-02 00:18:48 +00:00
Chad Rosier
e76ba1b654 A branch predicated on a constant can just FastEmit an unconditional branch. 
llvm-svn: 143086
 2011-10-27 00:21:16 +00:00
Chad Rosier
e3141f4f8b Add a TODO comment. FastISel works by parsing each basic block from the bottom 
up.  Thus, improving the support for compares is goodness because it increases
the number of terminator instructions we can handle.  This creates many more 
opportunities for target specific fast-isel.

llvm-svn: 143079
 2011-10-26 23:34:37 +00:00
Chad Rosier
75378507e3 Factor a little more code into EmitCmp, which should have been done in the first 
place.  No functional change intended.

llvm-svn: 143078
 2011-10-26 23:25:44 +00:00
Chad Rosier
52109646da Use EmitCmp in SelectBranch. No functional change intended. 
llvm-svn: 143076
 2011-10-26 23:17:28 +00:00
Chad Rosier
3f38cb48de Factor out an EmitCmp function that can be used by both SelectCmp and 
SelectBranch.  No functional change intended.

llvm-svn: 143072
 2011-10-26 22:47:55 +00:00
Chad Rosier
ef5ee1892c Add a few FIXME comments. 
llvm-svn: 142299
 2011-10-17 22:54:23 +00:00
Bill Wendling
1d585d7961 Switch over to using ARMConstantPoolConstant for global variables, functions, 
and block addresses.

llvm-svn: 140936
 2011-10-01 08:00:54 +00:00
Jim Grosbach
d94ffffc87 ARM fix encoding of VMOV.f32 and VMOV.f64 immediates. 
Encode the immediate into its 8-bit form as part of isel rather than later,
which simplifies things for mapping the encoding bits, allows the removal
of the custom disassembler decoding hook, makes the operand printer trivial,
and prepares things more cleanly for handling these in the asm parser.

rdar://10211428

llvm-svn: 140834
 2011-09-30 00:50:06 +00:00
Jim Grosbach
74f96e7f3c Tidy up a few 80 column violations. 
llvm-svn: 139636
 2011-09-13 20:30:37 +00:00
Eli Friedman
383a3c76b2 Don't fast-isel for atomic load/store; some cases require extra handling missing from fast-isel. 
llvm-svn: 139044
 2011-09-02 22:33:24 +00:00
Chad Rosier
aa490636db Fixup for functions that return a bool. 
llvm-svn: 138918
 2011-08-31 23:49:05 +00:00
Jim Grosbach
3832c5ac34 [SU]XT[BH] are only available on ARMv6 and up. 
llvm-svn: 138373
 2011-08-23 20:53:08 +00:00
Jim Grosbach
7098677dbc ARM extend instructions simplification. 
Refactor the SXTB, SXTH, SXTB16, UXTB, UXTH, and UXTB16 instructions to not
have an 'r' and an 'r_rot' version, but just a single version with a rotate
that can be zero. Use plain Pat<>'s for the ISel of the non-rotated version.

llvm-svn: 136225
 2011-07-27 16:47:19 +00:00
Evan Cheng
bff5f78cb5 Sink ARMMCExpr and ARMAddressingModes into MC layer. First step to separate ARM MC code from target. 
llvm-svn: 135636
 2011-07-20 23:34:39 +00:00
Chris Lattner
e1fe7061ce land David Blaikie's patch to de-constify Type, with a few tweaks. 
llvm-svn: 135375
 2011-07-18 04:54:35 +00:00
Evan Cheng
65e7766262 Move CallFrameSetupOpcode and CallFrameDestroyOpcode to TargetInstrInfo. 
llvm-svn: 134030
 2011-06-28 21:14:33 +00:00
Evan Cheng
4a169be530 - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and 
sink them into MC layer.
- Added MCInstrInfo, which captures the tablegen generated static data. Chang
TargetInstrInfo so it's based off MCInstrInfo.

llvm-svn: 134021
 2011-06-28 19:10:37 +00:00
Eric Christopher
1ae9ec6124 Add a parameter to CCState so that it can access the MachineFunction. 
No functional change.

Part of PR6965

llvm-svn: 132763
 2011-06-08 23:55:35 +00:00
Eli Friedman
eae10d6163 Add ARM fast-isel support for materializing the address of a global in cases where the global uses an indirect symbol. 
rdar://9431157

llvm-svn: 132522
 2011-06-03 01:13:19 +00:00
Cameron Zwarich
72e034c331 Fix ARM fast isel to correctly flag memory operands to stores. This fixes 
-verify-machineinstrs failures on several tests.

llvm-svn: 132268
 2011-05-28 20:34:49 +00:00
Eli Friedman
560532051b Fix a silly mistake (which trips over an assertion) in r132099. rdar://9515076 
llvm-svn: 132194
 2011-05-27 18:02:04 +00:00
Eli Friedman
93ffb875ad Rewrite fast-isel integer cast handling to handle more cases, and to be simpler and more consistent. 
The practical effects here are that x86-64 fast-isel can now handle trunc from i8 to i1, and ARM fast-isel can handle many more constructs involving integers narrower than 32 bits (including loads, stores, and many integer casts).

rdar://9437928 .

llvm-svn: 132099
 2011-05-25 23:49:02 +00:00
Eli Friedman
2bdd096540 Prepare ARMFastISel::SelectSIToFP for getRegForValue returning registers for i8 and i16 values. 
llvm-svn: 132073
 2011-05-25 19:09:45 +00:00
Jim Grosbach
d7352e9b02 Kill some dead code. 
llvm-svn: 131431
 2011-05-16 22:24:07 +00:00
Eric Christopher
e637bff03a Apparently the check for direct calls is unnecessary. 
llvm-svn: 130716
 2011-05-02 20:16:33 +00:00
Eli Friedman
1940912660 Switch to ImmLeaf (which can be used by FastISel) for a few more common ARM/Thumb2 patterns. 
llvm-svn: 130552
 2011-04-29 22:48:03 +00:00
Eric Christopher
5415816eb4 Add FastEmitInst_ii for the arm fast isel generator. It doesn't use it, but 
if it ever did it needs the def machinery.

llvm-svn: 130549
 2011-04-29 22:07:50 +00:00
Eric Christopher
a6fb14395f Some cleanup and optimize fallthrough more. 
llvm-svn: 130546
 2011-04-29 21:56:31 +00:00
Eli Friedman
7d05eaa3f4 Re-committing r130454, which does not in fact break anything. 
Fix a rather obscure crash caused by ARM fast-isel generating code which redefines a register.
rdar://problem/9338332 .

llvm-svn: 130539
 2011-04-29 21:22:56 +00:00
Eric Christopher
ba0cef1b0b Add trunc->branch support, this won't help with clang's i8->i1 truncations 
for bools, but is a start.

llvm-svn: 130534
 2011-04-29 20:02:39 +00:00
Eric Christopher
f7f8f92201 Update comments and checks to match reality. 
llvm-svn: 130464
 2011-04-29 00:07:20 +00:00
Eric Christopher
68cdb30c0d Whitespace. 
llvm-svn: 130463
 2011-04-29 00:03:10 +00:00
Eli Friedman
a93906d0c3 Revert r130454; apparently this doesn't actually work. 
llvm-svn: 130462
 2011-04-28 23:55:14 +00:00
Eli Friedman
9a80f23666 Fix a rather obscure crash caused by ARM fast-isel generating code which redefines a register. 
rdar://problem/9338332 .

llvm-svn: 130454
 2011-04-28 23:03:25 +00:00
Eric Christopher
2e9c3e61ee Be more layout aware here and swap the successor and branch condition 
if it means we get a fallthrough.

llvm-svn: 130404
 2011-04-28 16:52:09 +00:00
Stuart Hastings
4575e2a398 Correct result when a branch condition is live across a block 
boundary.  <rdar://problem/8933028>

llvm-svn: 129634
 2011-04-16 03:31:26 +00:00
Jay Foad
0d5ca4cf44 Don't include Operator.h from InstrTypes.h. 
llvm-svn: 129271
 2011-04-11 09:35:34 +00:00
Eric Christopher
b04934036a Just use BL all the time. It's safer that way. 
Fixes rdar://9184526

llvm-svn: 128869
 2011-04-05 00:39:26 +00:00
Cameron Zwarich
1b8f91d2c8 Add a ARM-specific SD node for VBSL so that forms with a constant first operand 
can be recognized. This fixes <rdar://problem/9183078>.

llvm-svn: 128584
 2011-03-30 23:01:21 +00:00