Akira Hatanaka
4bdb4b1958
Mips64 arithmetic and logical instructions with one source register and
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immediate.
llvm-svn: 140839
2011-09-30 02:08:54 +00:00
Akira Hatanaka
50a4f6d570
Fill delay slot with useful instructions. Modified from Sparc's version of delay
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slot filler.
Patch by Reed Kotler at Mips Technologies.
llvm-svn: 140825
2011-09-29 23:52:13 +00:00
Akira Hatanaka
70be05d5d0
Mips64 arithmetic and logical instructions with two source registers.
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llvm-svn: 140806
2011-09-29 20:37:56 +00:00
Andrew Trick
e1d5ae73ac
LSR: rewrite inner loops only.
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Rewriting the entire loop nest now requires -enable-lsr-nested.
See PR11035 for some performance data.
A few unit tests specifically test nested LSR, and are now under a flag.
llvm-svn: 140762
2011-09-29 01:33:38 +00:00
Andrew Trick
75c6a45d08
whitespace
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llvm-svn: 140761
2011-09-29 01:31:48 +00:00
Justin Holewinski
4966d44b44
PTX: Add new patterns for bitconvert and any_extend
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llvm-svn: 140753
2011-09-29 01:13:12 +00:00
Evan Cheng
1e53900b70
Tighten a ARM dag combine condition to avoid an identity transformation, which
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ends up introducing a cycle in the DAG.
rdar://10196296
llvm-svn: 140733
2011-09-28 23:16:31 +00:00
Eli Friedman
81fc13efd2
PR11033: Make sure we don't generate PCMPGTQ and PCMPEQQ if the target CPU does not support them.
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llvm-svn: 140723
2011-09-28 21:00:25 +00:00
Justin Holewinski
2f96de340f
PTX: MC-ize the PTX back-end (patch 1 of N)
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Lay some groundwork for converting to MC-based asm printer. This is the first
of probably many patches to bring the back-end back up-to-date with all of the
recent MC changes.
llvm-svn: 140697
2011-09-28 14:32:04 +00:00
Jakob Stoklund Olesen
2bf243f464
Remove X86-dependent stuff from SSEDomainFix.
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This also enables domain swizzling for AVX code which required a few
trivial test changes.
The pass will be moved to lib/CodeGen shortly.
llvm-svn: 140659
2011-09-27 23:50:46 +00:00
Justin Holewinski
a50e29abd6
PTX: Add support for sitofp in backend
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llvm-svn: 140593
2011-09-27 01:04:47 +00:00
Eli Friedman
db69f84663
Last batch of test conversions to new atomic instructions.
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llvm-svn: 140585
2011-09-27 00:17:29 +00:00
Eli Friedman
3db429c878
Convert a bunch more tests over to the new atomic instructions.
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llvm-svn: 140582
2011-09-26 23:15:09 +00:00
Eli Friedman
d01fc33809
Convert more tests to new atomic instructions.
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llvm-svn: 140567
2011-09-26 21:36:10 +00:00
Eli Friedman
6aaaadc188
Convert more tests over to the new atomic instructions.
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I did not convert Atomics-32.ll and Atomics-64.ll by hand; the diff is autoupgrade output.
The wmb test is gone because there isn't any way to express wmb with the new atomic instructions; if someone really needs a non-asm way to write a wmb on Alpha, a platform-specific intrisic could be added.
llvm-svn: 140566
2011-09-26 21:30:17 +00:00
Eli Friedman
56e68f7271
Convert more tests over to the new atomic instructions.
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llvm-svn: 140559
2011-09-26 20:27:49 +00:00
Justin Holewinski
52c50104d7
PTX: Fix detection of stack load/store vs. global load/store, as well as fix the
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printing of local offsets
llvm-svn: 140547
2011-09-26 18:57:22 +00:00
Justin Holewinski
443a122ac3
PTX: Add .align tests to stack object test file
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llvm-svn: 140537
2011-09-26 16:20:38 +00:00
Justin Holewinski
859dd9fa59
PTX: Fix some lingering issues with stack allocation
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llvm-svn: 140535
2011-09-26 16:20:34 +00:00
Justin Holewinski
83ae9143fd
PTX: Unify handling of loads/stores
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llvm-svn: 140533
2011-09-26 16:20:28 +00:00
David Meyer
90ed5fdd4f
Only run tests in test/CodeGen/CBackend/X86 when both X86 and CBackend are supported
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llvm-svn: 140517
2011-09-26 06:44:27 +00:00
David Meyer
a6e588d80c
PR11004: Inline memcpy to avoid generating nested call sequence. Un-XFAIL 2011-06-09-TailCallByVal and 2010-11-04-BigByval
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llvm-svn: 140516
2011-09-26 06:13:20 +00:00
Jakob Stoklund Olesen
59b2982dcf
Only run MF.verify() with EXPENSIVE_CHECKS=1.
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llvm-svn: 140441
2011-09-24 01:11:19 +00:00
Jakob Stoklund Olesen
bc6ae70907
Verify that terminators follow non-terminators.
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This exposes a -segmented-stacks bug.
llvm-svn: 140429
2011-09-23 22:45:39 +00:00
Eli Friedman
a66a438876
PR10998: It is not legal to sink an instruction past the terminator of a block; make sure we don't do that.
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llvm-svn: 140428
2011-09-23 22:41:57 +00:00
Jakob Stoklund Olesen
ca6877343b
Also match negative offsets for addrmode3 and addrmode5.
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Math is hard, and isScaledConstantInRange() always returned false for
negative constants. It was doing unsigned division of negative numbers
before casting back to signed.
llvm-svn: 140425
2011-09-23 22:10:33 +00:00
Justin Holewinski
1c0e0dcfbe
PTX: Handle function call return values
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llvm-svn: 140386
2011-09-23 16:48:41 +00:00
Justin Holewinski
0231798704
PTX: Start fixing function calls
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llvm-svn: 140378
2011-09-23 14:31:12 +00:00
Eli Friedman
6f0131b3a7
PR10989: Don't print .hidden on Windows.
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llvm-svn: 140356
2011-09-23 00:13:02 +00:00
Eli Friedman
31c7bde95a
PR10991: make fast-isel correctly check whether accessing a global through an alias involves thread-local storage. (I'm not entirely sure how this is supposed to work, but this patch makes fast-isel consistent with the normal isel path.)
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llvm-svn: 140355
2011-09-22 23:41:28 +00:00
Dan Gohman
d63418e497
Fix SimplifySelectCC to add newly created nodes to the DAGCombiner
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worklist, as it may be possible to perform further optimization on them.
llvm-svn: 140349
2011-09-22 23:01:29 +00:00
Duncan Sands
1da590b589
Synthesize SSE3/AVX 128 bit horizontal add/sub instructions from
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floating point add/sub of appropriate shuffle vectors. Does not
synthesize the 256 bit AVX versions because they work differently.
llvm-svn: 140332
2011-09-22 20:15:48 +00:00
Justin Holewinski
9acce6aa64
PTX: fixup test cases for register changes
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llvm-svn: 140311
2011-09-22 16:45:51 +00:00
Devang Patel
5d43ab8434
Do not unnecessarily use AT_specification DIE because it does not add any value.
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Few weeks ago, llvm completely inverted the debug info graph. Earlier each debug info node used to keep track of its compile unit, now compile unit keeps track of important nodes. One impact of this change is that the global variable's do not have any context, which should be checked before deciding to use AT_specification DIE.
llvm-svn: 140282
2011-09-21 23:41:11 +00:00
Akira Hatanaka
0c87291a10
Remove +.
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llvm-svn: 140266
2011-09-21 17:43:48 +00:00
Akira Hatanaka
d987b12b57
Re-enable some of the disabled tests. Use FileCheck instead of grep to check
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output.
llvm-svn: 140263
2011-09-21 17:36:30 +00:00
Nadav Rotem
50430e8160
add another testcase for pr10902
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llvm-svn: 140257
2011-09-21 17:13:40 +00:00
Nadav Rotem
af5643de3c
[VECTOR-SELECT] Address one of the bugs in pr10902.
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Vector SetCC result types need to be type-legalized.
This code worked before because scalar result types are known to be legal.
llvm-svn: 140249
2011-09-21 14:34:38 +00:00
Eric Christopher
9b721ff19e
Remove llvm-gcc and various compiler handling from llvm. It's not needed
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here anymore and has been migrated to the test-suite project.
llvm-svn: 140216
2011-09-20 23:58:15 +00:00
Bill Wendling
67cf034fe3
This test is completely invalid with the modern EH model. Delete.
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llvm-svn: 140213
2011-09-20 23:52:09 +00:00
Bruno Cardoso Lopes
1ffbef8ad1
Add a DAGCombine for subvector extracts to remove useless chains of
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subvector inserts and extracts. Initial patch by Rackover, Zvi with
some tweak done by me.
llvm-svn: 140204
2011-09-20 23:19:33 +00:00
Bruno Cardoso Lopes
629e7c2410
Revert r140097, working on a better approach
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llvm-svn: 140203
2011-09-20 23:19:29 +00:00
Evan Cheng
ead45e2ba6
Fix a bug introduced during refactoring a couple of months ago. Cortex-M3 does not support Thumb2 dsp instructions. rdar://10152911.
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llvm-svn: 140181
2011-09-20 21:38:18 +00:00
NAKAMURA Takumi
595c0c8e15
test/CodeGen/X86/avx-minmax.ll: Unbreak Win32.
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On Windows x64, 128-bit arguments are not passed by reg but by indirect. eg.
maxpd:
vmovapd (%rcx), %xmm0
vmaxpd (%rdx), %xmm0, %xmm0
FIXME: I don't care YMM on x64 for now.
llvm-svn: 140143
2011-09-20 14:11:35 +00:00
Craig Topper
df17f1cc99
Extend changes from r139986 to produce 256-bit AVX minps/minpd/maxps/maxpd.
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llvm-svn: 140140
2011-09-20 07:38:59 +00:00
Andrew Trick
53aeb9f663
ARM isel bug fix for adds/subs operands.
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Modified ARMISelLowering::AdjustInstrPostInstrSelection to handle the
full gamut of CPSR defs/uses including instructins whose "optional"
cc_out operand is not really optional. This allowed removal of the
hasPostISelHook to simplify the .td files and make the implementation
more robust.
Fixes rdar://10137436: sqlite3 miscompile
llvm-svn: 140134
2011-09-20 03:17:40 +00:00
Bruno Cardoso Lopes
bed7ef51b6
Attempt to fix -mtriple=i686-{cygwin|mingw|win32} regressions. Nakamura,
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if this doesn't work, please provide more details.
llvm-svn: 140107
2011-09-20 00:08:12 +00:00
Bruno Cardoso Lopes
7cf7f02c3d
Based on the small opt Zvi's patch was trying to achieve, eliminate
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128-bit undef subvector insertion into a 256-bit vector
llvm-svn: 140097
2011-09-19 23:36:50 +00:00
Eli Friedman
b11676fb4b
Some additional tests for Thumb atomic load and store (which I somehow forgot to commit earlier).
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llvm-svn: 140074
2011-09-19 22:02:33 +00:00
Bruno Cardoso Lopes
9e5ef44daf
Match X86ISD::FSETCCsd and X86ISD::FSETCCss while in AVX mode. This fix
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PR10955 and PR10948.
llvm-svn: 140069
2011-09-19 21:29:24 +00:00