Tanya Lattner
4c078c1ace
Codegen support (stripped out) for the annotate attribute.
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llvm-svn: 37608
2007-06-15 22:26:58 +00:00
Evan Cheng
759b3cca3c
Not every predicable block can be safely duplicated.
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llvm-svn: 37607
2007-06-15 21:18:05 +00:00
Chris Lattner
c08e8abb53
Fix CodeGen/X86/inline-asm-x-scalar.ll:test4, by retaining regclass info
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for tied register constraints.
llvm-svn: 37601
2007-06-15 19:11:01 +00:00
Evan Cheng
88c463eb8c
MachineInstr::isPredicable() is no longer needed.
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llvm-svn: 37599
2007-06-15 19:06:07 +00:00
Duncan Sands
deef6fe78b
Workaround for PR1508.
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llvm-svn: 37597
2007-06-15 19:04:19 +00:00
Evan Cheng
a6504bc2e0
Extra edges are deleted later if needed.
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llvm-svn: 37593
2007-06-15 17:34:48 +00:00
Evan Cheng
f4d3d695b2
Allow small blocks to be duplicated to enable if-conversion.
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llvm-svn: 37590
2007-06-15 07:36:12 +00:00
Evan Cheng
6f348e1c75
No really, clear predcessors states.
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llvm-svn: 37581
2007-06-14 23:34:09 +00:00
Evan Cheng
b1b1914582
If BB is predicated, invalidate its predecessor(s) which would if-convert it. It needs to be re-analyzed.
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llvm-svn: 37580
2007-06-14 23:13:19 +00:00
Dan Gohman
2fd7d26df8
Rename MVT::getVectorBaseType to MVT::getVectorElementType.
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llvm-svn: 37579
2007-06-14 22:58:02 +00:00
Evan Cheng
26d68261ae
Fix typo.
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llvm-svn: 37577
2007-06-14 21:26:08 +00:00
Dan Gohman
35f2b4d716
Add a target hook to allow loads from constant pools to be rematerialized, and an
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implementation for x86.
llvm-svn: 37576
2007-06-14 20:50:44 +00:00
Evan Cheng
a2c2479e22
Fix some stupid bugs that have effectively disabled if-conversion.
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llvm-svn: 37575
2007-06-14 20:28:52 +00:00
Duncan Sands
51e6294637
Only correctly lower exception handing intrinsics if exception handling is
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turned on. Likewise for scanning of invokes to mark landing pads.
llvm-svn: 37570
2007-06-13 16:53:21 +00:00
Dan Gohman
6415b2548e
Introduce new SelectionDAG node opcodes VEXTRACT_SUBVECTOR and
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VCONCAT_VECTORS. Use these for CopyToReg and CopyFromReg legalizing in
the case that the full register is to be split into subvectors instead
of scalars. This replaces uses of VBIT_CONVERT to present values as
vector-of-vector types in order to make whole subvectors accessible via
BUILD_VECTOR and EXTRACT_VECTOR_ELT.
This is in preparation for adding extended ValueType values, where
having vector-of-vector types is undesirable.
llvm-svn: 37569
2007-06-13 15:12:02 +00:00
Dan Gohman
3bc1455d49
When creating CopyFromReg nodes, always use legal types. And use the
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correct types for the result vector, even though it is currently bitcasted
to a different type immediately.
llvm-svn: 37568
2007-06-13 14:55:16 +00:00
Duncan Sands
32eaa9b30a
The fix that was applied for PR1224 stops the compiler
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crashing but breaks exception handling. The problem
described in PR1224 is that invoke is a terminator that
can produce a value. The value may be needed in other
blocks. The code that writes to registers values needed
in other blocks runs before terminators are lowered (in
this case invoke) so asserted because the value was not
yet available. The fix that was applied was to do invoke
lowering earlier, before writing values to registers.
The problem this causes is that the code to copy values
to registers can be output after the invoke call. If
an exception is raised and control is passed to the
landing pad then this copy-code will never execute. If
the value is needed in some code path reached via the
landing pad then that code will get something bogus.
So revert the original fix and simply skip invoke values
in the general copying to registers code. Instead copy
the invoke value to a register in the invoke lowering code.
llvm-svn: 37567
2007-06-13 05:51:31 +00:00
Evan Cheng
d4e9443a78
Typo
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llvm-svn: 37566
2007-06-13 00:04:00 +00:00
Evan Cheng
d5aaab210c
Now if-converting all 4 variants of triangles.
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llvm-svn: 37565
2007-06-12 23:54:05 +00:00
Lauro Ramos Venancio
c9a156f041
Fix a typo in bswap lowering.
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llvm-svn: 37544
2007-06-11 23:16:16 +00:00
Evan Cheng
d6740b478b
Restructure code to reduce ifcvt compile time cost.
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llvm-svn: 37543
2007-06-11 22:26:22 +00:00
Reid Spencer
0c11f4ebd8
Fix the build.
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llvm-svn: 37537
2007-06-10 00:19:17 +00:00
Evan Cheng
859dab4bda
Don't change CFG during analysis stage. Do so during ifcvt and invalidate predecessors accordingly.
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llvm-svn: 37531
2007-06-09 01:03:43 +00:00
Evan Cheng
7996fc5d23
Carefully remove extraneous CFG edges after each ifcvt.
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llvm-svn: 37529
2007-06-08 22:01:07 +00:00
Evan Cheng
515e2537d7
Correct transfer predicate information.
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llvm-svn: 37524
2007-06-08 19:17:12 +00:00
Evan Cheng
49720a7312
Hidden options to help debugging ifcvt issues.
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llvm-svn: 37523
2007-06-08 19:10:51 +00:00
David Greene
6b14050d1e
Factor live variable analysis so it does not do register coalescing
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simultaneously. Move that pass to SimpleRegisterCoalescing.
This makes it easier to implement alternative register allocation and
coalescing strategies while maintaining reuse of the existing live
interval analysis.
llvm-svn: 37520
2007-06-08 17:18:56 +00:00
Evan Cheng
a41764f141
Allow more cmp / bcc to be predicated; clean up triangle ifcvt checking code.
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llvm-svn: 37518
2007-06-08 09:36:04 +00:00
Duncan Sands
f31e17574a
Use more realistically sized vectors. Reserve capacity if we know in advance
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how much will be used.
llvm-svn: 37515
2007-06-08 08:59:11 +00:00
Dale Johannesen
74ffb6ffb3
Make throttle a hidden parameter, per review.
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llvm-svn: 37511
2007-06-08 01:08:52 +00:00
Dale Johannesen
0903dd4e52
Throttle tail merging; handling blocks with large numbers of predecessors
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is too slow.
llvm-svn: 37509
2007-06-08 00:34:27 +00:00
Evan Cheng
2b9e9abed1
Only remove the edge from entry to false if false block is merged.
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llvm-svn: 37503
2007-06-07 22:31:28 +00:00
Dale Johannesen
0f3c011fd5
Do not change the size of function arguments. PR 1489.
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llvm-svn: 37496
2007-06-07 21:07:15 +00:00
Evan Cheng
4f73706838
ifcvt a triangle: don't merge ifcvt block with rejoin block if it can fall through to it. If merged, the resulting block is not a candidate for iterative ifcvting since it contains both predicated and non-predicated code.
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llvm-svn: 37487
2007-06-07 08:13:00 +00:00
Evan Cheng
d440a235a1
Lots of bug fixes. Now finally in a reasonable state.
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llvm-svn: 37485
2007-06-07 02:12:15 +00:00
Owen Anderson
b333dd064e
Quick patch to fix the build, based on what it appears Evan meant to write.
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Evan, please check that this is in fact correct.
llvm-svn: 37471
2007-06-06 16:22:00 +00:00
Duncan Sands
9bef60ea1a
Fold the exception actions table harder: if two typeid lists start the
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same, only output one copy of the common part.
llvm-svn: 37470
2007-06-06 15:37:31 +00:00
Evan Cheng
aeccfbef8b
Lots of bug fixes.
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llvm-svn: 37467
2007-06-06 10:16:17 +00:00
Duncan Sands
484bdb927b
Additional fix for PR1422: make sure the landing pad label is placed in the
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correct machine basic block - do not rely on the eh.exception intrinsic
being in the landing pad: the loop optimizers can move it out.
llvm-svn: 37463
2007-06-06 10:05:18 +00:00
Evan Cheng
4c42a30bad
If a unconditional branch is added to branch to the false path during ifcvt, the predicated block cannot be iteratively ifcvted.
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llvm-svn: 37456
2007-06-06 02:08:52 +00:00
Evan Cheng
cc7186df2b
Minor statistics counting bug.
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llvm-svn: 37451
2007-06-06 01:12:44 +00:00
Evan Cheng
2eefb6f4c3
Fix a couple of typos and be smarter about order of blocks when ifcvt a diamond.
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llvm-svn: 37449
2007-06-06 00:57:55 +00:00
Evan Cheng
3db28ad9f2
Fix diamond shape ifcvt bugs.
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llvm-svn: 37444
2007-06-05 23:46:14 +00:00
Evan Cheng
acf719bf83
ReplaceUsesOfBlockWith() can modify the predecessors list.
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llvm-svn: 37441
2007-06-05 22:03:53 +00:00
Evan Cheng
f2a2a5a025
Do not ifcvt if either true / false path is a backedge. Not profitable in almost all cases.
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llvm-svn: 37440
2007-06-05 20:38:42 +00:00
Evan Cheng
d495b2f9b9
I had a senior moment.
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llvm-svn: 37433
2007-06-05 07:05:25 +00:00
Evan Cheng
a7f7c92dc9
If the predicated block requires an early exit, end the block there and add a unconditional branch to false block. AnalyzeBranch() does not understand early exits.
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llvm-svn: 37430
2007-06-05 01:31:40 +00:00
Evan Cheng
7b113514d4
Fix some subtle bugs: bug during succeessor copying; incorrectly updating states of ifcvted blocks.
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llvm-svn: 37429
2007-06-05 00:07:37 +00:00
Dale Johannesen
a68662e4a4
Tail merging wasn't working for predecessors of landing pads. PR 1496.
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llvm-svn: 37427
2007-06-04 23:52:54 +00:00
Evan Cheng
8728a6c3fd
Global ctors / dtors alignment shouldn't be hard-coded at 4. e.g. It could be 8 for 64-bit targets.
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llvm-svn: 37421
2007-06-04 20:39:18 +00:00