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Commit Graph

2416 Commits

Author SHA1 Message Date
Nate Begeman
a3a0a0340f Don't expand sdiv by power of two before legalize, since it will likely
generate illegal nodes.

llvm-svn: 26261
2006-02-17 07:26:20 +00:00
Nate Begeman
9c0ab71f4a kill ADD_PARTS & SUB_PARTS and replace them with fancy new ADDC, ADDE, SUBC
and SUBE nodes that actually expose what's going on and allow for
significant simplifications in the targets.

llvm-svn: 26255
2006-02-17 05:43:56 +00:00
Chris Lattner
6632b8ab04 Fix another miscompilation exposed by lencode, where we lowered i64->f32
conversions to __floatdidf instead of __floatdisf on targets that support
f32 but not i64 (e.g. sparc).

llvm-svn: 26254
2006-02-17 04:32:33 +00:00
Evan Cheng
a2433f32b4 Dumb bug. Code sees a memcpy from X+c so it increments src offset. But it
turns out not to point to a constant string but it forgot change the offset
back.

llvm-svn: 26242
2006-02-16 23:11:42 +00:00
Nate Begeman
0bc71999b9 Rework the SelectionDAG-based implementations of SimplifyDemandedBits
and ComputeMaskedBits to match the new improved versions in instcombine.
Tested against all of multisource/benchmarks on ppc.

llvm-svn: 26238
2006-02-16 21:11:51 +00:00
Evan Cheng
131901cbb8 If the false case is the current basic block, then this is a self loop.
We do not want to emit "Loop: ... brcond Out; br Loop", as it adds an extra
instruction in the loop.  Instead, invert the condition and emit
"Loop: ... br!cond Loop; br Out.

Generalize the fix by moving it from PPCDAGToDAGISel to SelectionDAGLowering.

llvm-svn: 26231
2006-02-16 08:27:56 +00:00
Chris Lattner
6f407a54c1 Lowering of sdiv X, pow2 was broken, this fixes it. This patch is written
by Nate, I'm just committing it for him.

llvm-svn: 26230
2006-02-16 08:02:36 +00:00
Evan Cheng
07063456aa Remove an unused function parameter.
llvm-svn: 26221
2006-02-15 22:12:35 +00:00
Evan Cheng
5c2ecfd29b Turn a memcpy from string constant into a series of stores of constant values.
llvm-svn: 26219
2006-02-15 21:59:04 +00:00
Jim Laskey
e51152ac31 Should not combine ISD::LOCATIONs until we have scheme to remove from
MachineDebugInfo tables.

llvm-svn: 26216
2006-02-15 19:34:44 +00:00
Evan Cheng
3f9201ab48 Lower memcpy with small constant size operand into a series of load / store
ops.

llvm-svn: 26195
2006-02-15 01:54:51 +00:00
Evan Cheng
6789a748ac Doh again!
llvm-svn: 26188
2006-02-14 23:05:54 +00:00
Jim Laskey
bb6d481323 Using wrong DW_FORM.
llvm-svn: 26184
2006-02-14 22:01:57 +00:00
Evan Cheng
5a2a9d3896 Keep to < 80 cols
llvm-svn: 26177
2006-02-14 20:12:38 +00:00
Evan Cheng
8937c047b3 Missed a break so memcpy cases fell through to memset. Doh.
llvm-svn: 26176
2006-02-14 19:45:56 +00:00
Evan Cheng
57eebe8ab4 Fixed a build breakage.
llvm-svn: 26175
2006-02-14 09:11:59 +00:00
Evan Cheng
f6c74c0096 Rename maxStoresPerMemSet to maxStoresPerMemset, etc.
llvm-svn: 26174
2006-02-14 08:38:30 +00:00
Evan Cheng
0bfe83eb5b Expand memset dst, c, size to a series of stores if size falls below the
target specific theshold, e.g. 16 for x86.

llvm-svn: 26171
2006-02-14 08:22:34 +00:00
Chris Lattner
47f4f2c148 now that libcalls don't suck, we can remove this hack
llvm-svn: 26164
2006-02-14 05:39:35 +00:00
Chris Lattner
d3cfbeca5b Fix a latent bug in the call sequence handling stuff. Some targets (e.g. x86)
create these nodes with flag results.  Remember that we legalized them.

llvm-svn: 26156
2006-02-14 00:55:02 +00:00
Jim Laskey
fac853338f Rename to better reflect usage (current and planned.)
llvm-svn: 26145
2006-02-13 12:50:39 +00:00
Chris Lattner
b3fc3e3a90 Completely rewrite libcall insertion by the legalizer, providing the
following handy-dandy properties:

1. it is always correct now
2. it is much faster than before
3. it is easier to understand

This implementation builds off of the recent simplifications of the
legalizer that made it single-pass instead of iterative.

This fixes JM/lencod, JM/ldecod, and
CodeGen/Generic/2006-02-12-InsertLibcall.ll (at least on PPC).

llvm-svn: 26144
2006-02-13 09:18:02 +00:00
Jim Laskey
55467f611d Reorg for integration with gcc4. Old style debug info will not be passed though
to SelIDAG.

llvm-svn: 26115
2006-02-11 01:01:30 +00:00
Evan Cheng
7441e03b0b Added SelectionDAG::InsertISelMapEntry(). This is used to workaround the gcc
problem where it inline the map insertion call too aggressively. Before this
change it was producing a frame size of 24k for Select_store(), now it's down
to 10k (by calling this method rather than calling the map insertion operator).

llvm-svn: 26094
2006-02-09 22:11:03 +00:00
Evan Cheng
3486292b7d More changes to reduce frame size.
Move all getTargetNode() out of SelectionDAG.h into SelectionDAG.cpp. This
prevents them from being inlined.
Change getTargetNode() so they return SDNode * instead of SDOperand to prevent
copying. It should also help compilation speed.

llvm-svn: 26083
2006-02-09 07:15:23 +00:00
Chris Lattner
c81f375f21 Adjust to MachineConstantPool interface change: instead of keeping a
value/alignment pair for each constant, keep a value/offset pair.

llvm-svn: 26078
2006-02-09 04:46:04 +00:00
Chris Lattner
1111a4b76d rename fields of constant pool entries
llvm-svn: 26076
2006-02-09 04:22:52 +00:00
Chris Lattner
837a816470 Simplify code, alignment must be specified now.
llvm-svn: 26074
2006-02-09 02:26:04 +00:00
Chris Lattner
86d5e100d2 Make MachineConstantPool entries alignments explicit
llvm-svn: 26071
2006-02-09 02:23:13 +00:00
Chris Lattner
6556f15ad8 Add support for assembler directives that wrap inline asm
llvm-svn: 26065
2006-02-08 23:41:56 +00:00
Chris Lattner
50f604c041 Compile this:
xori r6, r2, 1
        rlwinm r6, r6, 0, 31, 31
        cmpwi cr0, r6, 0
        bne cr0, LBB1_3 ; endif

to this:

        rlwinm r6, r2, 0, 31, 31
        cmpwi cr0, r6, 0
        beq cr0, LBB1_3 ; endif

llvm-svn: 26047
2006-02-08 02:13:15 +00:00
Chris Lattner
35a536d1f4 Add support for modifier characters to operand printers
llvm-svn: 26021
2006-02-06 22:17:23 +00:00
Jim Laskey
f36d437b39 Goodbye nasty macro.
llvm-svn: 26019
2006-02-06 21:54:05 +00:00
Jim Laskey
0cfdd812d1 Edit requests from Sabre.
llvm-svn: 26018
2006-02-06 19:12:02 +00:00
Jim Laskey
e27947e8fb Changing model for the construction of debug information.
llvm-svn: 26016
2006-02-06 15:33:21 +00:00
Nate Begeman
2fe9dfedf0 Back out previous commit, it isn't safe.
llvm-svn: 26006
2006-02-05 08:23:00 +00:00
Nate Begeman
c0e2bb488a fold c1 << (x + c2) into (c1 << c2) << x. fix a warning.
llvm-svn: 26005
2006-02-05 08:07:24 +00:00
Nate Begeman
c93c3d11d6 Handle urem by shifted powers of 2.
llvm-svn: 26001
2006-02-05 07:36:48 +00:00
Nate Begeman
0291708a49 handle combining A / (B << N) into A >>u (log2(B)+N) when B is a power of 2
llvm-svn: 26000
2006-02-05 07:20:23 +00:00
Evan Cheng
d46a7fc65a * Added SDNode::isOnlyUse().
* Fix hasNUsesOfValue(), it should be const.

llvm-svn: 25990
2006-02-05 06:29:23 +00:00
Chris Lattner
4efafdb7f4 make sure that global doubles are aligned to 8 bytes
llvm-svn: 25981
2006-02-05 01:46:49 +00:00
Chris Lattner
d2c4e9151e Implement the AsmPrinter::getPreferredAlignmentLog method.
llvm-svn: 25978
2006-02-05 01:29:18 +00:00
Jeff Cohen
4f433dafa5 Fix VC++ warning.
llvm-svn: 25975
2006-02-04 16:20:31 +00:00
Evan Cheng
062ac6e46b Get rid of some memory leaks identified by Valgrind
llvm-svn: 25960
2006-02-04 06:49:00 +00:00
Jeff Cohen
291586095d Fix VC++ warning.
llvm-svn: 25957
2006-02-04 03:27:39 +00:00
Chris Lattner
013f5fc2fa Add initial support for immediates. This allows us to compile this:
int %rlwnm(int %A, int %B) {
  %C = call int asm "rlwnm $0, $1, $2, $3, $4", "=r,r,r,n,n"(int %A, int %B, int 4, int 17)
  ret int %C
}

into:

_rlwnm:
        or r2, r3, r3
        or r3, r4, r4
        rlwnm r2, r2, r3, 4, 17    ;; note the immediates :)
        or r3, r2, r2
        blr

llvm-svn: 25955
2006-02-04 02:26:14 +00:00
Chris Lattner
13f609dfe2 Initial early support for non-register operands, like immediates
llvm-svn: 25952
2006-02-04 02:16:44 +00:00
Chris Lattner
08dba8d9f8 Handle another case exposed on X86.
llvm-svn: 25949
2006-02-03 23:50:46 +00:00
Chris Lattner
f0ef4b4391 Fix a nasty problem on two-address machines in the following situation:
store EAX -> [ss#0]
[ss#0] += 1
...
use(EAX)

In this case, it is not valid to rewrite this as:


store EAX -> [ss#0]
EAX += 1
store EAX -> [ss#0]  ;;; this would also delete the store above
...
use(EAX)

... because EAX is not a dead at that point.  Keep track of which registers
we are allowed to clobber, and which ones we aren't, and don't clobber the
ones we're not supposed to.  :)

This should resolve the issues on X86 last night.

llvm-svn: 25948
2006-02-03 23:28:46 +00:00
Chris Lattner
03b42d7724 significantly simplify the VirtRegMap code by pulling the SpillSlotsAvailable
and PhysRegsAvailable maps out into a new AvailableSpills struct.  No
functionality change.

This paves the way for a bugfix, coming up next.

llvm-svn: 25947
2006-02-03 23:13:58 +00:00
Nate Begeman
2d9838ec9b Add a framework for eliminating instructions that produces undemanded bits.
llvm-svn: 25945
2006-02-03 22:24:05 +00:00
Chris Lattner
47b11a250c remove some #ifdef'd out code, which should properly be in the dag combiner anyway.
llvm-svn: 25941
2006-02-03 20:13:59 +00:00
Chris Lattner
541258d077 remove dead fn
llvm-svn: 25935
2006-02-03 06:51:34 +00:00
Nate Begeman
78c9e14249 Add common code for reassociating ops in the dag combiner
llvm-svn: 25934
2006-02-03 06:46:56 +00:00
Jeff Cohen
e2f56a56f6 Fix VC++ compilation error caused by using a std::map iterator variable to receive
a std::multimap iterator value.  For some reason, GCC doesn't have a problem with this.

llvm-svn: 25927
2006-02-03 03:48:54 +00:00
Chris Lattner
9ca1b98733 Remove move copies and dead stuff by not clobbering the result reg of a noop copy.
llvm-svn: 25926
2006-02-03 03:16:14 +00:00
Chris Lattner
8e4e3207fe Simplify some code
llvm-svn: 25924
2006-02-03 03:06:49 +00:00
Chris Lattner
42c3d5124f Add code that checks for noop copies, which triggers when either:
1. a target doesn't know how to fold load/stores into copies, or
2. the spiller rewrites the input to a copy to the same register as the dest
   instead of to the reloaded reg.

This will be moved/improved in the near future, but allows elimination of
some ancient x86 hacks.  This eliminates 92 copies from SMG2000 on X86 and
163 copies from 252.eon.

llvm-svn: 25922
2006-02-03 02:02:59 +00:00
Evan Cheng
c21098e77c Added case HANDLENODE to getOperationName().
llvm-svn: 25920
2006-02-03 01:33:01 +00:00
Chris Lattner
e5344b1169 Physregs may hold multiple stack slot values at the same time. Keep track
of this, and use it to our advantage (bwahahah).  This allows us to eliminate another
60 instructions from smg2000 on PPC (probably significantly more on X86).  A common
old-new diff looks like this:

        stw r2, 3304(r1)
-       lwz r2, 3192(r1)
        stw r2, 3300(r1)
-       lwz r2, 3192(r1)
        stw r2, 3296(r1)
-       lwz r2, 3192(r1)
        stw r2, 3200(r1)
-       lwz r2, 3192(r1)
        stw r2, 3196(r1)
-       lwz r2, 3192(r1)
+       or r2, r2, r2
        stw r2, 3188(r1)

and

-       lwz r31, 604(r1)
-       lwz r13, 604(r1)
-       lwz r14, 604(r1)
-       lwz r15, 604(r1)
-       lwz r16, 604(r1)
-       lwz r30, 604(r1)
+       or r31, r30, r30
+       or r13, r30, r30
+       or r14, r30, r30
+       or r15, r30, r30
+       or r16, r30, r30
+       or r30, r30, r30

Removal of the R = R copies is coming next...

llvm-svn: 25919
2006-02-03 00:36:31 +00:00
Chris Lattner
935255c984 Fix a deficiency in the spiller that Evan noticed. In particular, consider
this code:

  store [stack slot #0],  R10
    = add R14, [stack slot #0]

The spiller didn't know that the store made the value of [stackslot#0] available
in R10 *IF* the store came from a copy instruction with the store folded into it.

This patch teaches VirtRegMap to look at these stores and recognize the values
they make available.  In one case Evan provided, this code:

        divsd %XMM0, %XMM1
        movsd %XMM1, QWORD PTR [%ESP + 40]
1)      movsd QWORD PTR [%ESP + 48], %XMM1
2)      movsd %XMM1, QWORD PTR [%ESP + 48]
        addsd %XMM1, %XMM0
3)      movsd QWORD PTR [%ESP + 48], %XMM1
        movsd QWORD PTR [%ESP + 4], %XMM0

turns into:

        divsd %XMM0, %XMM1
        movsd %XMM1, QWORD PTR [%ESP + 40]
        addsd %XMM1, %XMM0
3)      movsd QWORD PTR [%ESP + 48], %XMM1
        movsd QWORD PTR [%ESP + 4], %XMM0

In this case, instruction #2 was removed because of the value made
available by #1, and inst #1 was later deleted because it is now
never used before the stack slot is redefined by #3.

This occurs here and there in a lot of code with high spilling, on PPC
most of the removed loads/stores are LSU-reject-causing loads, which is
nice.

On X86, things are much better (because it spills more), where we nuke
about 1% of the instructions from SMG2000 and several hundred from eon.

More improvements to come...

llvm-svn: 25917
2006-02-02 23:29:36 +00:00
Chris Lattner
15cb732cd7 Move isLoadFrom/StoreToStackSlot from MRegisterInfo to TargetInstrInfo,a far more logical place. Other methods should also be moved if anyoneis interested. :)
llvm-svn: 25913
2006-02-02 20:12:32 +00:00
Chris Lattner
456711ae45 Turn any_extend nodes into zero_extend nodes when it allows us to remove an
and instruction.  This allows us to compile stuff like this:

bool %X(int %X) {
        %Y = add int %X, 14
        %Z = setne int %Y, 12345
        ret bool %Z
}

to this:

_X:
        cmpl $12331, 4(%esp)
        setne %al
        movzbl %al, %eax
        ret

instead of this:

_X:
        cmpl $12331, 4(%esp)
        setne %al
        movzbl %al, %eax
        andl $1, %eax
        ret

This occurs quite a bit with the X86 backend.  For example, 25 times in
lambda, 30 times in 177.mesa, 14 times in galgel,  70 times in fma3d,
25 times in vpr, several hundred times in gcc, ~45 times in crafty,
~60 times in parser, ~140 times in eon, 110 times in perlbmk, 55 on gap,
16 times on bzip2, 14 times on twolf, and 1-2 times in many other SPEC2K
programs.

llvm-svn: 25901
2006-02-02 07:17:31 +00:00
Chris Lattner
8f4d73f3da add two dag combines:
(C1-X) == C2 --> X == C1-C2
(X+C1) == C2 --> X == C2-C1

This allows us to compile this:

bool %X(int %X) {
        %Y = add int %X, 14
        %Z = setne int %Y, 12345
        ret bool %Z
}

into this:

_X:
        cmpl $12331, 4(%esp)
        setne %al
        movzbl %al, %eax
        andl $1, %eax
        ret

not this:

_X:
        movl $14, %eax
        addl 4(%esp), %eax
        cmpl $12345, %eax
        setne %al
        movzbl %al, %eax
        andl $1, %eax
        ret

Testcase here: Regression/CodeGen/X86/compare-add.ll

nukage of the and coming up next.

llvm-svn: 25898
2006-02-02 06:36:13 +00:00
Chris Lattner
f3bfec6117 make -debug output less newliney
llvm-svn: 25895
2006-02-02 00:38:08 +00:00
Chris Lattner
e35694c0bf Implement matching constraints. We can now say things like this:
%C = call int asm "xyz $0, $1, $2, $3", "=r,r,r,0"(int %A, int %B, int 4)

and get:

xyz r2, r3, r4, r2

note that the r2's are pinned together.  Yaay for 2-address instructions.

2342 ----------------------------------------------------------------------

llvm-svn: 25893
2006-02-02 00:25:23 +00:00
Chris Lattner
41a35db65f Implement smart printing of inline asm strings, handling variants and
substituted operands.  For this testcase:

int %test(int %A, int %B) {
  %C = call int asm "xyz $0, $1, $2", "=r,r,r"(int %A, int %B)
  ret int %C
}

we now emit:

_test:
        or r2, r3, r3
        or r3, r4, r4
        xyz r2, r2, r3  ;; look here
        or r3, r2, r2
        blr

... note the substituted operands. :)

llvm-svn: 25886
2006-02-01 22:41:11 +00:00
Nate Begeman
e74a2db0f0 *** empty log message ***
llvm-svn: 25879
2006-02-01 19:05:15 +00:00
Chris Lattner
9665c2d76f Implement simple register assignment for inline asms. This allows us to compile:
int %test(int %A, int %B) {
  %C = call int asm "xyz $0, $1, $2", "=r,r,r"(int %A, int %B)
  ret int %C
}

into:

 (0x8906130, LLVM BB @0x8902220):
        %r2 = OR4 %r3, %r3
        %r3 = OR4 %r4, %r4
        INLINEASM <es:xyz $0, $1, $2>, %r2<def>, %r2, %r3
        %r3 = OR4 %r2, %r2
        BLR

which asmprints as:

_test:
        or r2, r3, r3
        or r3, r4, r4
        xyz $0, $1, $2      ;; need to print the operands now :)
        or r3, r2, r2
        blr

llvm-svn: 25878
2006-02-01 18:59:47 +00:00
Nate Begeman
0be60963bd Fix some of the stuff in the PPC README file, and clean up legalization
of the SELECT_CC, BR_CC, and BRTWOWAY_CC nodes.

llvm-svn: 25875
2006-02-01 07:19:44 +00:00
Chris Lattner
5549a10792 adjust to changes in InlineAsm interface. Fix a few minor bugs.
llvm-svn: 25865
2006-02-01 01:28:23 +00:00
Evan Cheng
f115c17f23 Allow the specification of explicit alignments for constant pool entries.
llvm-svn: 25855
2006-01-31 22:23:14 +00:00
Evan Cheng
80944be4e7 Allow custom lowering of fabs. I forgot to check in this change which
caused several test failures.

llvm-svn: 25852
2006-01-31 18:14:25 +00:00
Chris Lattner
d33e8efd56 Only insert an AND when converting from BR_COND to BRCC if needed.
llvm-svn: 25832
2006-01-31 05:04:52 +00:00
Chris Lattner
e113238f5c Handle physreg input/outputs. We now compile this:
int %test_cpuid(int %op) {
        %B = alloca int
        %C = alloca int
        %D = alloca int
        %A = call int asm "cpuid", "=eax,==ebx,==ecx,==edx,eax"(int* %B, int* %C, int* %D, int %op)
        %Bv = load int* %B
        %Cv = load int* %C
        %Dv = load int* %D
        %x = add int %A, %Bv
        %y = add int %x, %Cv
        %z = add int %y, %Dv
        ret int %z
}

to this:

_test_cpuid:
        sub %ESP, 16
        mov DWORD PTR [%ESP], %EBX
        mov %EAX, DWORD PTR [%ESP + 20]
        cpuid
        mov DWORD PTR [%ESP + 8], %ECX
        mov DWORD PTR [%ESP + 12], %EBX
        mov DWORD PTR [%ESP + 4], %EDX
        mov %ECX, DWORD PTR [%ESP + 12]
        add %EAX, %ECX
        mov %ECX, DWORD PTR [%ESP + 8]
        add %EAX, %ECX
        mov %ECX, DWORD PTR [%ESP + 4]
        add %EAX, %ECX
        mov %EBX, DWORD PTR [%ESP]
        add %ESP, 16
        ret

... note the proper register allocation.  :)

it is unclear to me why the loads aren't folded into the adds.

llvm-svn: 25827
2006-01-31 02:03:41 +00:00
Chris Lattner
ce37ba3417 Print the most trivial inline asms.
llvm-svn: 25822
2006-01-30 23:00:08 +00:00
Chris Lattner
e24c6ef1f9 Fix a bug in my legalizer reworking that caused the X86 backend to not get
a chance to custom legalize setcc, which broke a bunch of C++ Codes.
Testcase here: CodeGen/X86/2006-01-30-LongSetcc.ll

llvm-svn: 25821
2006-01-30 22:43:50 +00:00
Chris Lattner
4ba0e38a7a don't insert an and node if it isn't needed here, this can prevent folding
of lowered target nodes.

llvm-svn: 25804
2006-01-30 04:22:28 +00:00
Chris Lattner
a44182300b Move MaskedValueIsZero from the DAGCombiner to the TargetLowering interface,making isMaskedValueZeroForTargetNode simpler, and useable from other partsof the compiler.
llvm-svn: 25803
2006-01-30 04:09:27 +00:00
Chris Lattner
26589d32e6 pass the address of MaskedValueIsZero into isMaskedValueZeroForTargetNode,
to permit recursion

llvm-svn: 25799
2006-01-30 03:49:37 +00:00
Chris Lattner
414a73d6f6 Fix RET of promoted values on targets that custom expand RET to a target node.
llvm-svn: 25794
2006-01-29 21:02:23 +00:00
Chris Lattner
497157db4d cleanups to the ValueTypeActions interface
llvm-svn: 25785
2006-01-29 08:42:06 +00:00
Chris Lattner
3cddcf86e0 Remove some special case hacks for CALLSEQ_*, using UpdateNodeOperands
instead.

llvm-svn: 25780
2006-01-29 07:58:15 +00:00
Chris Lattner
94e9677374 Allow custom expansion of ConstantVec nodes. PPC will use this in the future.
llvm-svn: 25774
2006-01-29 06:34:16 +00:00
Chris Lattner
3f97b9cfa3 Legalize ConstantFP into TargetConstantFP when the target allows. Implement
custom expansion of ConstantFP nodes.

llvm-svn: 25772
2006-01-29 06:26:56 +00:00
Chris Lattner
82b23c2f5c eliminate uses of SelectionDAG::getBR2Way_CC
llvm-svn: 25767
2006-01-29 06:00:45 +00:00
Chris Lattner
40973347bf Use the new "UpdateNodeOperands" method to simplify LegalizeDAG and make it
faster.  This cuts about 120 lines of code out of the legalizer (mostly code
checking to see if operands have changed).

It also fixes an ugly performance issue, where the legalizer cloned the entire
graph after any change.  Now the "UpdateNodeOperands" method gives it a chance
to reuse nodes if the operands of a node change but not its opcode or valuetypes.

This speeds up instruction selection time on kimwitu++ by about 8.2% with a
release build.

llvm-svn: 25746
2006-01-28 10:58:55 +00:00
Chris Lattner
8768eb7532 add another method variant
llvm-svn: 25744
2006-01-28 10:09:25 +00:00
Chris Lattner
63f7e84632 add some methods for updating nodes
llvm-svn: 25742
2006-01-28 09:32:45 +00:00
Chris Lattner
99bdf26410 minor tweaks
llvm-svn: 25740
2006-01-28 08:31:04 +00:00
Chris Lattner
94ab3cee71 move a bunch of code, no other change.
llvm-svn: 25739
2006-01-28 08:25:58 +00:00
Chris Lattner
9633d61b5b remove a couple more now-extraneous legalizeop's
llvm-svn: 25738
2006-01-28 08:22:56 +00:00
Chris Lattner
4bc3abc3d0 fix a bug
llvm-svn: 25737
2006-01-28 07:42:08 +00:00
Chris Lattner
8eed1b6bda Several major changes:
1. Pull out the expand cases for BSWAP and CT* into a separate function,
   reducing the size of LegalizeOp.
2. Fix a bug where expand(bswap i64) was wrong when i64 is legal.
3. Changed LegalizeOp/PromoteOp so that the legalizer never needs to be
   iterative.  It now operates in a single pass over the nodes.
4. Simplify a LOT of code, with a net reduction of ~280 lines.

llvm-svn: 25736
2006-01-28 07:39:30 +00:00
Chris Lattner
84086fd689 Eliminate the need for ExpandOp to set 'needsanotheriteration', as it already
relegalizes the stuff it returns.

Add the ability to custom expand ADD/SUB, so that targets don't need to deal
with ADD_PARTS/SUB_PARTS if they don't want.

Fix some obscure potential bugs and simplify code.

llvm-svn: 25732
2006-01-28 05:07:51 +00:00
Chris Lattner
3b5a984065 Instead of making callers of ExpandLibCall legalize the result, make
ExpandLibCall do it itself.

llvm-svn: 25731
2006-01-28 04:28:26 +00:00
Chris Lattner
045a778e63 Eliminate the need to do another iteration of the legalizer after inserting
a libcall.

llvm-svn: 25730
2006-01-28 04:23:12 +00:00
Chris Lattner
d6d4bcc419 remove method I just added
llvm-svn: 25728
2006-01-28 03:43:09 +00:00
Chris Lattner
063c13029b add a new callback
llvm-svn: 25727
2006-01-28 03:37:03 +00:00
Nate Begeman
87c2c0e66b Implement Promote for VAARG, and allow it to be custom promoted for people
who don't want the default behavior (Alpha).

llvm-svn: 25726
2006-01-28 03:14:31 +00:00
Nate Begeman
dc3fba6b6b Add a missing case to the dag combiner.
llvm-svn: 25723
2006-01-28 01:06:30 +00:00
Chris Lattner
e7428f436a Remove the ISD::CALL and ISD::TAILCALL nodes
llvm-svn: 25721
2006-01-28 00:18:58 +00:00
Nate Begeman
d2c6fbef4a Remove TLI.LowerReturnTo, and just let targets custom lower ISD::RET for
the same functionality.  This addresses another piece of bug 680.  Next,
on to fixing Alpha VAARG, which I broke last time.

llvm-svn: 25696
2006-01-27 21:09:22 +00:00
Jim Laskey
c8759505c4 Using bit size of integers instead of ambiguous "long" et all.
llvm-svn: 25694
2006-01-27 20:31:25 +00:00
Jim Laskey
2221ac79d5 Sorry - really folowing convention.
llvm-svn: 25691
2006-01-27 18:32:41 +00:00
Jim Laskey
479abc37ff Following convention.
llvm-svn: 25689
2006-01-27 18:28:31 +00:00
Andrew Lenharth
67e53709df fix build
llvm-svn: 25687
2006-01-27 18:16:17 +00:00
Chris Lattner
e4128dc8dc Fix build error that is apparently only a warning with some compilers.
llvm-svn: 25686
2006-01-27 17:31:30 +00:00
Jim Laskey
5ed7bc82cc Forgot the version number.
llvm-svn: 25685
2006-01-27 15:46:54 +00:00
Jim Laskey
89492c12bb Improve visibility/correctness of operand indices in "llvm.db" objects.
Handle 64 in DIEs.

llvm-svn: 25684
2006-01-27 15:20:54 +00:00
Chris Lattner
09d8aa244e Stub out a method
llvm-svn: 25676
2006-01-27 02:10:10 +00:00
Chris Lattner
a1769576f0 Teach the scheduler to emit the appropriate INLINEASM MachineInstr for an
ISD::INLINEASM node.

llvm-svn: 25668
2006-01-26 23:28:04 +00:00
Chris Lattner
b2771c7fcb initial selectiondag support for new INLINEASM node. Note that inline asms
with outputs or inputs are not supported yet. :)

llvm-svn: 25664
2006-01-26 22:24:51 +00:00
Jim Laskey
df47d0df3e Use global information to fill out Dwarf compile units.
llvm-svn: 25662
2006-01-26 21:22:49 +00:00
Jim Laskey
583aae3110 Set up MachineDebugInfo to scan for debug information form "llvm.db"g globals.
Global Variable information is now pulled from "llvm.dbg.globals"

llvm-svn: 25655
2006-01-26 20:21:46 +00:00
Evan Cheng
fcd2a73349 Clean up some code; improve efficiency; and fixed a potential bug involving
chain successors.

llvm-svn: 25630
2006-01-26 00:30:29 +00:00
Reid Spencer
f45272f413 Don't break the optimized build (by incorrect placement of #endif)
llvm-svn: 25613
2006-01-25 21:49:13 +00:00
Evan Cheng
168b8c5b29 No need to keep track of top and bottom nodes in a group since the vector is
already in order. Thanks Jim for pointing it out.

llvm-svn: 25608
2006-01-25 18:54:24 +00:00
Nate Begeman
c29fac7fce First part of bug 680:
Remove TLI.LowerVA* and replace it with SDNodes that are lowered the same
way as everything else.

llvm-svn: 25606
2006-01-25 18:21:52 +00:00
Jeff Cohen
fdbce069c5 Make it even more portable.
llvm-svn: 25605
2006-01-25 17:18:50 +00:00
Jeff Cohen
7d0e421a42 Fix VC++ compilation error.
llvm-svn: 25604
2006-01-25 17:17:49 +00:00
Evan Cheng
0296933dbe Bottom up register usage reducing list scheduler.
llvm-svn: 25601
2006-01-25 09:14:32 +00:00
Evan Cheng
d95c4530e7 Keep track of bottom / top element of a set of flagged nodes.
llvm-svn: 25600
2006-01-25 09:13:41 +00:00
Evan Cheng
69d30b1c55 If scheduler choice is the default (-sched=default), use target scheduling
preference to determine which scheduler to use. SchedulingForLatency ==
Breadth first; SchedulingForRegPressure == bottom up register reduction list
scheduler.

llvm-svn: 25599
2006-01-25 09:12:57 +00:00
Jeff Cohen
3218a69301 Portably cast a pointer to an integer.
llvm-svn: 25594
2006-01-25 02:40:10 +00:00
Andrew Lenharth
0940295a7a fix build on 64 bit hosts
llvm-svn: 25591
2006-01-24 21:26:43 +00:00
Chris Lattner
cfb7a75ce9 Fix an infinite loop I caused by making sure to legalize the flag operand
of CALLSEQ_* nodes

llvm-svn: 25582
2006-01-24 05:48:21 +00:00
Jeff Cohen
ed41a16e5f Fix VC++ compilation error.
llvm-svn: 25577
2006-01-24 04:43:17 +00:00
Jeff Cohen
7c5aa59551 Remove unused variables.
llvm-svn: 25576
2006-01-24 04:42:53 +00:00
Chris Lattner
d09c95f83c rename method
llvm-svn: 25572
2006-01-24 04:16:34 +00:00
Jim Laskey
18ba7ce7b3 Crude Dwarf global variable debugging.
llvm-svn: 25569
2006-01-24 00:49:18 +00:00
Chris Lattner
ba1b666382 Print file-scope inline asm blocks at the start of the output file.
llvm-svn: 25565
2006-01-23 23:47:53 +00:00
Andrew Lenharth
35efa9c2d9 another couple selects
llvm-svn: 25551
2006-01-23 21:51:14 +00:00
Andrew Lenharth
28a8d211f6 another selectto
llvm-svn: 25548
2006-01-23 20:59:12 +00:00
Jim Laskey
e4ff0868a1 Typo.
llvm-svn: 25545
2006-01-23 13:34:04 +00:00
Evan Cheng
f622869383 Skeleton of the list schedule.
llvm-svn: 25544
2006-01-23 08:26:10 +00:00
Evan Cheng
8cae3b8cdb Minor clean up.
llvm-svn: 25543
2006-01-23 08:25:34 +00:00
Chris Lattner
3b0a29a694 Fix Regression/CodeGen/SparcV8/2006-01-22-BitConvertLegalize.ll by making
sure that the result of expanding a BIT_CONVERT node is itself legalized.

llvm-svn: 25538
2006-01-23 07:30:46 +00:00
Evan Cheng
b6bc5af6c8 Remove a couple of unnecessary #include's
llvm-svn: 25535
2006-01-23 07:21:01 +00:00
Evan Cheng
37c62244a6 Factor out more instruction scheduler code to the base class.
llvm-svn: 25532
2006-01-23 07:01:07 +00:00
Chris Lattner
adb63115bc Fix bugs lowering stackrestore, fixing 2004-08-12-InlinerAndAllocas.c on
PPC.

llvm-svn: 25522
2006-01-23 05:22:07 +00:00
Chris Lattner
aafc339b4e Add explicit #includes of <iostream>
llvm-svn: 25515
2006-01-22 23:41:00 +00:00
Chris Lattner
a7ff02319f Fix a bug in a recent refactor that caused a bunch of programs to miscompile
or the compiler to crash.

llvm-svn: 25503
2006-01-21 19:12:11 +00:00
Chris Lattner
9f233fa260 Fix CodeGen/PowerPC/2006-01-20-ShiftPartsCrash.ll
llvm-svn: 25496
2006-01-21 04:27:00 +00:00
Evan Cheng
4a57a7551f Do some code refactoring on Jim's scheduler in preparation of the new list
scheduler.

llvm-svn: 25493
2006-01-21 02:32:06 +00:00
Jim Laskey
75adb3d269 Simplify search for abbreviations.
llvm-svn: 25491
2006-01-21 01:13:18 +00:00
Jim Laskey
08d15fdc02 Correct some simple errors.
llvm-svn: 25490
2006-01-21 00:59:54 +00:00
Jim Laskey
946caff856 Right size integer values before emitting.
llvm-svn: 25489
2006-01-20 21:02:36 +00:00
Jim Laskey
b2abea6ab6 Reworked how Dwarf debug info entries and abbreviations are handled. Added
pubnames and debuy str sections.

llvm-svn: 25487
2006-01-20 20:34:06 +00:00
Chris Lattner
a348dc9195 remove some unintentionally committed code
llvm-svn: 25483
2006-01-20 18:40:10 +00:00
Chris Lattner
737a8dab41 If the target doesn't support f32 natively, insert the FP_EXTEND in target-indep
code, so that the LowerReturn code doesn't have to handle it.

llvm-svn: 25482
2006-01-20 18:38:32 +00:00
Evan Cheng
3f6b496700 Another typo
llvm-svn: 25440
2006-01-19 04:54:52 +00:00
Andrew Lenharth
c7a7422412 was ignoring the legalized chain in this case, fixed SPASS on alpha
llvm-svn: 25428
2006-01-18 23:19:08 +00:00
Nate Begeman
6b2bebd70a Get rid of code in the DAGCombiner that is duplicated in SelectionDAG.cpp
Now all constant folding in the code generator is in one place.

llvm-svn: 25426
2006-01-18 22:35:16 +00:00
Chris Lattner
9bc0f6cd90 Temporary work around for a libcall insertion bug: If a target doesn't
support FSIN/FCOS nodes, do not lower sin/cos to them.

llvm-svn: 25425
2006-01-18 21:50:14 +00:00
Chris Lattner
f7004ffd51 Fix a backwards conditional that caused an inf loop in some cases. This
fixes: test/Regression/CodeGen/Generic/2005-01-18-SetUO-InfLoop.ll

llvm-svn: 25419
2006-01-18 19:13:41 +00:00
Jim Laskey
6b25a4e659 Added minimum Dwarf aranges. Cleaned up some section headers. Line number
support now works in gdb.

llvm-svn: 25417
2006-01-18 16:54:26 +00:00
Jim Laskey
52d9832e70 Add frame work for additional dwarf sections. Comments will improve as code
is added.

llvm-svn: 25410
2006-01-17 20:41:40 +00:00
Robert Bocchino
dc31d8561b Support for the insertelement operation.
llvm-svn: 25405
2006-01-17 20:06:42 +00:00
Evan Cheng
b456305355 Bug fix: missing LegalizeOp() on newly created nodes.
llvm-svn: 25401
2006-01-17 19:47:13 +00:00
Jim Laskey
0c4202b0ba Adding basic support for Dwarf line number debug information.
I promise to keep future commits smaller.

llvm-svn: 25396
2006-01-17 17:31:53 +00:00
Reid Spencer
3cecd3c4cf For PR411:
This patch is an incremental step towards supporting a flat symbol table.
It de-overloads the intrinsic functions by providing type-specific intrinsics
and arranging for automatically upgrading from the old overloaded name to
the new non-overloaded name. Specifically:
  llvm.isunordered -> llvm.isunordered.f32, llvm.isunordered.f64
  llvm.sqrt -> llvm.sqrt.f32, llvm.sqrt.f64
  llvm.ctpop -> llvm.ctpop.i8, llvm.ctpop.i16, llvm.ctpop.i32, llvm.ctpop.i64
  llvm.ctlz -> llvm.ctlz.i8, llvm.ctlz.i16, llvm.ctlz.i32, llvm.ctlz.i64
  llvm.cttz -> llvm.cttz.i8, llvm.cttz.i16, llvm.cttz.i32, llvm.cttz.i64
New code should not use the overloaded intrinsic names. Warnings will be
emitted if they are used.

llvm-svn: 25366
2006-01-16 21:12:35 +00:00
Nate Begeman
ea80828ef2 Constant fold ctpop/ctlz/cttz, and a couple other small cleanups
llvm-svn: 25357
2006-01-16 08:07:10 +00:00
Nate Begeman
61d6a364ed Expand case for 64b Legalize, even though no one should end up using this
(itanium supports bswap natively, alpha should custom lower it using the
VAX floating point swapload, ha ha).

llvm-svn: 25356
2006-01-16 07:59:13 +00:00
Nate Begeman
d98be53c67 Add BSWAP stuff to intrinsic lowering for CBE & friends.
llvm-svn: 25355
2006-01-16 07:57:00 +00:00
Chris Lattner
0feeddc8ee Disable two transformations that contribute to bus errors on SparcV8.
llvm-svn: 25339
2006-01-15 18:58:59 +00:00
Chris Lattner
4b3181512b Allow the target to specify 'expand' if they just require the amount to
be subtracted from the stack pointer.

llvm-svn: 25331
2006-01-15 08:54:32 +00:00
Chris Lattner
acf02c3510 Fix custom lowering of dynamic_stackalloc
llvm-svn: 25329
2006-01-15 08:43:08 +00:00
Chris Lattner
c23f5e6dc7 add a missing node name
llvm-svn: 25327
2006-01-15 08:39:35 +00:00
Chris Lattner
e92e4a4342 Token chain results are not always the first or last result. Consider copyfromreg nodes, where they are the middle result (the flag result is last)
llvm-svn: 25325
2006-01-14 22:41:46 +00:00
Nate Begeman
956b57ce43 Remove some duplicated code
llvm-svn: 25313
2006-01-14 03:18:27 +00:00
Nate Begeman
85b2dc0c4e bswap implementation
llvm-svn: 25312
2006-01-14 03:14:10 +00:00
Chris Lattner
91b83a2448 If a target specified a stack pointer with setStackPointerRegisterToSaveRestore,
lower STACKSAVE/STACKRESTORE into a copy from/to that register.

llvm-svn: 25276
2006-01-13 17:48:44 +00:00
Chris Lattner
4107b4d7ee Compile llvm.stacksave/restore into STACKSAVE/STACKRESTORE nodes, and allow
targets to custom expand them as they desire.

llvm-svn: 25273
2006-01-13 02:50:02 +00:00
Chris Lattner
fac137d4bd add stacksave/stackrestore nodes
llvm-svn: 25270
2006-01-13 02:39:42 +00:00
Chris Lattner
5ab0813f3a Add "support" for stacksave/stackrestore to the dag isel
llvm-svn: 25268
2006-01-13 02:24:42 +00:00
Chris Lattner
5f8aeedc58 Add "support" for the llvm.stacksave/stackrestore intrinsics, this is
used by the C backend.

llvm-svn: 25267
2006-01-13 02:22:08 +00:00
Chris Lattner
f997ab779f Add a simple missing fold to produce this:
subfic r3, r2, 33

instead of this:

        subfic r2, r2, 32
        addi r3, r2, 1

llvm-svn: 25255
2006-01-12 20:22:43 +00:00
Chris Lattner
c9d03f7b02 If using __main, emit global ctor/dtor list like any other global
llvm-svn: 25251
2006-01-12 19:17:23 +00:00
Chris Lattner
ac8df987d5 Don't create rotate instructions in unsupported types, because we don't have
promote/expand code yet.  This fixes the 177.mesa failure on PPC.

llvm-svn: 25250
2006-01-12 18:57:33 +00:00
Evan Cheng
c2241561ae Allow custom lowering of DYNAMIC_STACKALLOC.
llvm-svn: 25224
2006-01-11 22:14:47 +00:00
Evan Cheng
7bd69b756e ignore register #0
llvm-svn: 25223
2006-01-11 22:13:48 +00:00
Nate Begeman
cff96008ac Add bswap, rotl, and rotr nodes
Add dag combiner code to recognize rotl, rotr
Add ppc code to match rotl

Targets should add rotl/rotr patterns if they have them

llvm-svn: 25222
2006-01-11 21:21:00 +00:00
Chris Lattner
da0089a5c7 silence a warning
llvm-svn: 25184
2006-01-10 19:43:26 +00:00
Robert Bocchino
38060df8d1 Added selection DAG support for the extractelement operation.
llvm-svn: 25179
2006-01-10 19:04:57 +00:00
Chris Lattner
d455e0ce54 Minor cleanup, no functionality change for current targets
llvm-svn: 25173
2006-01-10 05:41:59 +00:00
Chris Lattner
8026872e44 Fix an exponential function in libcall insertion to not be exponential. :)
llvm-svn: 25165
2006-01-09 23:21:49 +00:00
Evan Cheng
a8064e0723 * Allow custom lowering of ADD_PARTS, SUB_PARTS, SHL_PARTS, SRA_PARTS,
and SRL_PARTS.
* Fix a bug that caused *_PARTS to be custom lowered twice.

llvm-svn: 25157
2006-01-09 18:31:59 +00:00
Evan Cheng
7a32c047d9 New getNode() variants.
llvm-svn: 25156
2006-01-09 18:29:18 +00:00
Chris Lattner
ae1bace70a Unbreak the build :(
llvm-svn: 25124
2006-01-06 05:47:48 +00:00
Evan Cheng
105a0cc17e Revert the previous check-in. Leave shl x, 1 along for target to deal with.
llvm-svn: 25121
2006-01-06 01:56:02 +00:00
Evan Cheng
efe621adce fold (shl x, 1) -> (add x, x)
llvm-svn: 25120
2006-01-06 01:06:31 +00:00
Evan Cheng
133170cb5c Support for custom lowering of ISD::RET.
llvm-svn: 25116
2006-01-06 00:41:43 +00:00
Jim Laskey
5eddaee9f3 Added initial support for DEBUG_LABEL allowing debug specific labels to be
inserted in the code.

llvm-svn: 25104
2006-01-05 01:25:28 +00:00
Jim Laskey
61138e28ff Applied some recommend changes from sabre. The dominate one beginning "let the
pass manager do it's thing."  Fixes crash when compiling -g files and suppresses
dwarf statements if no debug info is present.

llvm-svn: 25100
2006-01-04 22:28:25 +00:00
Jim Laskey
897ad8ddb7 Add unique id to debug location for debug label use (work in progress.)
llvm-svn: 25096
2006-01-04 15:04:11 +00:00
Jim Laskey
9c9c46a7a4 Add check for debug presence.
llvm-svn: 25095
2006-01-04 14:30:12 +00:00
Jim Laskey
62b29812a6 Tie dwarf generation to darwin assembler.
llvm-svn: 25093
2006-01-04 13:52:30 +00:00
Jim Laskey
881126a42d Moving MachineDebugInfo to module level location.
llvm-svn: 25090
2006-01-04 13:43:56 +00:00
Jim Laskey
1b0399e8f0 Change how MachineDebugInfo is fetched.
llvm-svn: 25089
2006-01-04 13:42:59 +00:00
Jim Laskey
013cfc7698 Extending MachineDebugInfo.
llvm-svn: 25086
2006-01-04 13:36:38 +00:00
Chris Lattner
19343b85fd Add support for targets (like Alpha) that have terminator instructions which
use virtual registers.  We now allow the first instruction in a block of
terminators to use virtual registers, and update phi elimination to correctly
update livevar when eliminating phi's.  This fixes a problem on a testcase
Andrew sent me.

llvm-svn: 25083
2006-01-04 07:12:21 +00:00
Chris Lattner
c3ff71cc3a Add an assertion, update DefInst even though no one uses it (dangling pointers
don't help anyone)

llvm-svn: 25081
2006-01-04 06:47:48 +00:00
Chris Lattner
f00c43e105 Add a LiveVariables::VarInfo::dump method
llvm-svn: 25080
2006-01-04 05:40:30 +00:00
Chris Lattner
ded5041b23 Change a variable from being an iterator to a raw MachineInstr*, to make
GDB use tolerable

llvm-svn: 25064
2006-01-03 07:41:37 +00:00
Nate Begeman
25fe5b2b76 Make sure to pass the offset into the new node, so that we don't silently
drop it on the floor.

llvm-svn: 25044
2005-12-30 00:10:38 +00:00
Duraid Madina
b9197e021f purity++
llvm-svn: 25041
2005-12-29 05:59:19 +00:00
Duraid Madina
32783dc8d0 add these so I can be less naughty
llvm-svn: 25034
2005-12-28 06:29:02 +00:00
Duraid Madina
f8a342aa4f HB is *the* code janitor.
llvm-svn: 25031
2005-12-28 04:55:42 +00:00
Duraid Madina
2d0894bdca mixed-STL programs are big and nasty :(
llvm-svn: 25030
2005-12-28 02:44:35 +00:00
Andrew Lenharth
a639cb7176 allow custom lowering to return null for legal results
llvm-svn: 25007
2005-12-25 01:07:37 +00:00
Andrew Lenharth
5cf1fcb844 Support Custom lowering of a few more operations.
Alpha needs to custom lower *DIV and *REM

llvm-svn: 25006
2005-12-24 23:42:32 +00:00
Jim Laskey
d8cc1062ed Remove redundant debug locations.
llvm-svn: 24995
2005-12-23 20:08:28 +00:00
Chris Lattner
c97655052a unbreak the build :-/
llvm-svn: 24992
2005-12-23 16:12:20 +00:00
Evan Cheng
bcfef42cd4 Allow custom lowering of LOAD, EXTLOAD, ZEXTLOAD, STORE, and TRUNCSTORE. Not
currently used.

llvm-svn: 24988
2005-12-23 07:29:34 +00:00
Chris Lattner
0637d38ec2 Simplify store(bitconv(x)) to store(x). This allows us to compile this:
void bar(double Y, double *X) {
  *X = Y;
}

to this:

bar:
        save -96, %o6, %o6
        st %i1, [%i2+4]
        st %i0, [%i2]
        restore %g0, %g0, %g0
        retl
        nop

instead of this:

bar:
        save -104, %o6, %o6
        st %i1, [%i6+-4]
        st %i0, [%i6+-8]
        ldd [%i6+-8], %f0
        std  %f0, [%i2]
        restore %g0, %g0, %g0
        retl
        nop

on sparcv8.

llvm-svn: 24983
2005-12-23 05:48:07 +00:00
Chris Lattner
20e6338732 fold (conv (load x)) -> (load (conv*)x).
This allows us to compile this:
void foo(double);
void bar(double *X) { foo(*X); }

To this:

bar:
        save -96, %o6, %o6
        ld [%i0+4], %o1
        ld [%i0], %o0
        call foo
        nop
        restore %g0, %g0, %g0
        retl
        nop

instead of this:

bar:
        save -104, %o6, %o6
        ldd [%i0], %f0
        std %f0, [%i6+-8]
        ld [%i6+-4], %o1
        ld [%i6+-8], %o0
        call foo
        nop
        restore %g0, %g0, %g0
        retl
        nop

on SparcV8.

llvm-svn: 24982
2005-12-23 05:44:41 +00:00
Chris Lattner
28887b3ca6 Fold bitconv(bitconv(x)) -> x. We now compile this:
void foo(double);
void bar(double X) { foo(X); }

to this:

bar:
        save -96, %o6, %o6
        or %g0, %i0, %o0
        or %g0, %i1, %o1
        call foo
        nop
        restore %g0, %g0, %g0
        retl
        nop

instead of this:

bar:
        save -112, %o6, %o6
        st %i1, [%i6+-4]
        st %i0, [%i6+-8]
        ldd [%i6+-8], %f0
        std %f0, [%i6+-16]
        ld [%i6+-12], %o1
        ld [%i6+-16], %o0
        call foo
        nop
        restore %g0, %g0, %g0
        retl
        nop

on V8.

llvm-svn: 24981
2005-12-23 05:37:50 +00:00
Chris Lattner
9ee4ecfe74 constant fold bits_convert in getNode and in the dag combiner for fp<->int
conversions.  This allows V8 to compiles this:

void %test() {
        call float %test2( float 1.000000e+00, float 2.000000e+00, double 3.000000e+00, double* null )
        ret void
}

into:

test:
        save -96, %o6, %o6
        sethi 0, %o3
        sethi 1049088, %o2
        sethi 1048576, %o1
        sethi 1040384, %o0
        or %g0, %o3, %o4
        call test2
        nop
        restore %g0, %g0, %g0
        retl
        nop

instead of:

test:
        save -112, %o6, %o6
        sethi 0, %o4
        sethi 1049088, %l0
        st %o4, [%i6+-12]
        st %l0, [%i6+-16]
        ld [%i6+-12], %o3
        ld [%i6+-16], %o2
        sethi 1048576, %o1
        sethi 1040384, %o0
        call test2
        nop
        restore %g0, %g0, %g0
        retl
        nop

llvm-svn: 24980
2005-12-23 05:30:37 +00:00
Chris Lattner
4bcbe2d378 Fix a pasto
llvm-svn: 24973
2005-12-23 00:52:30 +00:00
Chris Lattner
4a929edf04 fix a thinko in the bit_convert handling code
llvm-svn: 24972
2005-12-23 00:50:25 +00:00
Chris Lattner
a59cc5ebbb add very simple support for the BIT_CONVERT node
llvm-svn: 24970
2005-12-23 00:16:34 +00:00
Chris Lattner
73f38507d9 remove dead code
llvm-svn: 24965
2005-12-22 21:16:08 +00:00
Chris Lattner
6f708e886f The 81st column doesn't like code in it.
llvm-svn: 24943
2005-12-22 05:23:45 +00:00
Reid Spencer
b7a51183c1 Add an eol at the end to shut gcc sup.
llvm-svn: 24926
2005-12-22 01:41:00 +00:00
Evan Cheng
fb6413e05a * Fix a GlobalAddress lowering bug.
* Teach DAG combiner about X86ISD::SETCC by adding a TargetLowering hook.

llvm-svn: 24921
2005-12-21 23:05:39 +00:00
Jim Laskey
d82881490c Disengage DEBUG_LOC from non-PPC targets.
llvm-svn: 24919
2005-12-21 20:51:37 +00:00
Evan Cheng
6f15189a77 * Added support for X86 RET with an additional operand to specify number of
bytes to pop off stack.
* Added support for X86 SETCC.

llvm-svn: 24917
2005-12-21 20:21:51 +00:00
Jim Laskey
aeb774e97d Start of Dwarf framework.
llvm-svn: 24914
2005-12-21 19:48:16 +00:00
Chris Lattner
6364b03742 make sure to relegalize all cases
llvm-svn: 24911
2005-12-21 19:40:42 +00:00
Chris Lattner
079443691c enable the gep isel opt
llvm-svn: 24910
2005-12-21 19:36:36 +00:00
Chris Lattner
15bf8f26f2 fix a bug I introduced that broke recursive expansion of nodes (e.g. scalarizing vectors)
llvm-svn: 24905
2005-12-21 18:02:52 +00:00
Chris Lattner
a7d3498167 Lower ConstantAggregateZero into zeros
llvm-svn: 24890
2005-12-21 02:43:26 +00:00
Chris Lattner
e62133e3c6 Don't emit a null terminator, nor anything after it, to the ctor/dtor list
llvm-svn: 24887
2005-12-21 01:17:37 +00:00
Evan Cheng
44e4e6a57f Added a hook to print out names of target specific DAG nodes.
llvm-svn: 24877
2005-12-20 06:22:03 +00:00
Chris Lattner
088b3ccdcc Fix a nasty latent bug in the legalizer that was triggered by my patch
last night, breaking crafty and twolf.  Make sure that the newly found
legal nodes are themselves not re-legalized until the next iteration.

Also, since this functionality exists now, we can reduce number of legalizer
iterations by depending on this behavior instead of having to misuse 'do
another iteration' to get the same effect.

llvm-svn: 24875
2005-12-20 00:53:54 +00:00
Evan Cheng
bb34a50cb0 X86 conditional branch support.
llvm-svn: 24870
2005-12-19 23:12:38 +00:00
Evan Cheng
503d37094f Print out opcode number if it's an unknown target node.
llvm-svn: 24869
2005-12-19 23:11:49 +00:00
Chris Lattner
91987b5c3c Fix a case where the DAG Combiner would accidentally CSE flag-producing nodes,
creating graphs that cannot be scheduled.

llvm-svn: 24866
2005-12-19 22:21:21 +00:00
Jim Laskey
2f4c62c51a Amend comment.
llvm-svn: 24861
2005-12-19 16:32:26 +00:00
Jim Laskey
57b66c8475 Create a strong dependency for loads following stores. This will leave a
latency period between the two.

llvm-svn: 24860
2005-12-19 16:30:13 +00:00
Chris Lattner
aeeb98a7dd Make sure to relegalize new nodes
llvm-svn: 24843
2005-12-18 23:54:29 +00:00
Jeff Cohen
d46f4d16d2 Keep VC++ happy.
llvm-svn: 24835
2005-12-18 22:20:05 +00:00
Chris Lattner
deb7eb58be More corrections for flagged copyto/from reg
llvm-svn: 24828
2005-12-18 15:36:21 +00:00
Chris Lattner
daa904e19a legalize copytoreg and copyfromreg nodes that have flag operands correctly.
llvm-svn: 24826
2005-12-18 15:27:43 +00:00
Jim Laskey
831eca00db Fix a bug Sabre was having where the DAG root was a group. The group dominator
needed to be added to the ordering list, not the first member of the group.

llvm-svn: 24816
2005-12-18 04:40:52 +00:00
Jim Laskey
a06085f024 Groups were not emitted if the dominator node and the node in the ordering list
were not the same node.  Ultimately the test was bogus.

llvm-svn: 24815
2005-12-18 03:59:21 +00:00
Chris Lattner
bb6af65f76 Simplify code
llvm-svn: 24806
2005-12-18 01:03:46 +00:00
Chris Lattner
bdb696294e allow custom expansion of BR_CC
llvm-svn: 24804
2005-12-17 23:46:46 +00:00
Evan Cheng
d51da93a03 X86 lowers SELECT to a cmp / test followed by a conditional move.
llvm-svn: 24754
2005-12-17 01:21:05 +00:00