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Author SHA1 Message Date
Evan Cheng
1c8ff02eeb Re-apply 56835 along with header file changes. 
llvm-svn: 56848
 2008-09-30 15:44:16 +00:00
Duncan Sands
a2c8482495 Revert commit 56835 since it breaks the build. 
"If a re-materializable instruction has a register
operand, the spiller will change the register operand's
spill weight to HUGE_VAL to avoid it being spilled.
However, if the operand is already in the queue ready
to be spilled, avoid re-materializing it".

llvm-svn: 56837
 2008-09-30 10:00:30 +00:00
Evan Cheng
4eee17f4fb If a re-materializable instruction has a register operand, the spiller will change the register operand's spill weight to HUGE_VAL to avoid it being spilled. However, if the operand is already in the queue ready to be spilled, avoid re-materializing it. 
llvm-svn: 56835
 2008-09-30 06:36:58 +00:00
Dale Johannesen
52987eab6e Remove misuse of ReplaceNodeResults for atomics with 
valid types.  No functional change.

llvm-svn: 56808
 2008-09-29 22:25:26 +00:00
Dan Gohman
f78676d0b6 Fix FastISel to not initialize the PIC-base register multiple times 
in functions with PIC references from more than one basic block.

llvm-svn: 56807
 2008-09-29 21:55:50 +00:00
Bill Wendling
7273078850 Temporarily reverting r56683. This is causing a failure during the build of llvm-gcc: 
/Volumes/Gir/devel/llvm/clean/llvm-gcc.obj/./gcc/xgcc -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.obj/./gcc/ -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/bin/ -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/lib/ -isystem /Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/include -isystem /Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/sys-include -mmacosx-version-min=10.4 -O2  -O2 -g -O2  -DIN_GCC    -W -Wall -Wwrite-strings -Wstrict-prototypes -Wmissing-prototypes -Wold-style-definition  -isystem ./include  -fPIC -pipe -g -DHAVE_GTHR_DEFAULT -DIN_LIBGCC2 -D__GCC_FLOAT_NOT_NEEDED  -I. -I. -I../../llvm-gcc.src/gcc -I../../llvm-gcc.src/gcc/. -I../../llvm-gcc.src/gcc/../include -I./../intl -I../../llvm-gcc.src/gcc/../libcpp/include  -I../../llvm-gcc.src/gcc/../libdecnumber -I../libdecnumber -I/Volumes/Gir/devel/llvm/clean/llvm.obj/include -I/Volumes/Gir/devel/llvm/clean/llvm.src/include -fexceptions -fvisibility=hidden -DHIDE_EXPORTS -c ../../llvm-gcc.src/gcc/unwind-dw2-fde-darwin.c -o libgcc/./unwind-dw2-fde-darwin.o
Assertion failed: (TargetRegisterInfo::isVirtualRegister(regA) && TargetRegisterInfo::isVirtualRegister(regB) && "cannot update physical register live information"), function runOnMachineFunction, file /Volumes/Gir/devel/llvm/clean/llvm.src/lib/CodeGen/TwoAddressInstructionPass.cpp, line 311.
../../llvm-gcc.src/gcc/unwind-dw2.c:1527: internal compiler error: Abort trap
Please submit a full bug report,
with preprocessed source if appropriate.
See <URL:http://developer.apple.com/bugreporter> for instructions.
{standard input}:3521:non-relocatable subtraction expression, "_dwarf_reg_size_table" minus "L20$pb"
{standard input}:3521:symbol: "_dwarf_reg_size_table" can't be undefined in a subtraction expression
{standard input}:3520:non-relocatable subtraction expression, "_dwarf_reg_size_table" minus "L20$pb"
...

llvm-svn: 56703
 2008-09-26 22:10:44 +00:00
Dan Gohman
989db64c93 Rename ConstantSDNode's getSignExtended to getSExtValue, for 
consistancy with ConstantInt, and re-implement it in terms
of ConstantInt's getSExtValue.

llvm-svn: 56700
 2008-09-26 21:54:37 +00:00
Evan Cheng
9946443460 Fix @llvm.frameaddress codegen. FP elimination optimization should be disabled when frame address is desired. Also add support for depth > 0. 
llvm-svn: 56683
 2008-09-26 19:48:35 +00:00
Dale Johannesen
3f62c40108 Add "inreg" field to CallSDNode (doesn't increase 
its size).  Adjust various lowering functions to
pass this info through from CallInst.  Use it to
implement sseregparm returns on X86.  Remove
X86_ssecall calling convention.

llvm-svn: 56677
 2008-09-26 19:31:26 +00:00
Owen Anderson
70a6539add We don't need to insert copies for implicit_def's. 
llvm-svn: 56674
 2008-09-26 18:50:46 +00:00
Bill Wendling
bf75299f0a If we have a function with an unreachable statement such that the ending debug 
information is in an unreachable block, then it's possible that the high/low pc
values won't be set for the dwarf information. E.g., this function:

void abort(void) __attribute__((__noreturn__));
void dead_beef(void) __attribute__ ((noreturn));

int *b;

void dead_beef(void) {
  *b=0xdeadbeef;
  abort();
}

has a call to "@llvm.dbg.region.end" only in the unreachable block:

define void @dead_beef() noreturn nounwind  {
entry:
	call void @llvm.dbg.func.start(...)
	call void @llvm.dbg.stoppoint(...)
...
	call void @abort( ) noreturn nounwind 
	unreachable

return:		; No predecessors!
	call void @llvm.dbg.stoppoint(...)
	call void @llvm.dbg.region.end(...)
	ret void
}

The dwarf information emitted is something like:

0x00000084:     TAG_subprogram [5]  
                 AT_name( "dead_beef" )
                 AT_external( 0x01 )
                 AT_prototyped( 0x01 )
                 AT_decl_file( 0x01 )
                 AT_decl_line( 0x08 )

Note that this is *not* the best fix for this problem, but a band-aid for an
gaping wound. This code needs to be changed when we revamp our debugging
information.

llvm-svn: 56628
 2008-09-26 00:28:12 +00:00
Devang Patel
64dd7a2e89 Large mechanical patch. 
s/ParamAttr/Attribute/g
s/PAList/AttrList/g
s/FnAttributeWithIndex/AttributeWithIndex/g
s/FnAttr/Attribute/g

This sets the stage 
- to implement function notes as function attributes and 
- to distinguish between function attributes and return value attributes.

This requires corresponding changes in llvm-gcc and clang.

llvm-svn: 56622
 2008-09-25 21:00:45 +00:00
Dale Johannesen
62f64ab4c8 Accept 'inreg' attribute on x86 functions as 
meaning sse_regparm (i.e. float/double values go
in XMM0 instead of ST0).  Update documentation
to reflect reality.

llvm-svn: 56619
 2008-09-25 20:47:45 +00:00
Dan Gohman
9bb92ce6e9 Support for i1 XOR in FastISel. It is actually safe because 
i1 operands are assumed to already by zero-extended.

llvm-svn: 56615
 2008-09-25 17:22:52 +00:00
Dan Gohman
51cd436ad8 Don't print fast-isel debug messages by default. Thanks Chris! 
llvm-svn: 56614
 2008-09-25 17:21:42 +00:00
Dan Gohman
5ee9d9af7f Don't forget the newline in debug output. 
llvm-svn: 56613
 2008-09-25 17:17:27 +00:00
Dan Gohman
b63e6de501 FastISel support for debug info. 
llvm-svn: 56610
 2008-09-25 17:05:24 +00:00
Richard Pennington
1db9263b05 bug 2812: Segmentation fault on a big emdiam processor. 
llvm-svn: 56609
 2008-09-25 16:15:10 +00:00
Dan Gohman
1776533304 Fix a recent fast-isel coverage regression - don't bail out before 
giving the target a chance to materialize constants.

llvm-svn: 56605
 2008-09-25 01:28:51 +00:00
Dan Gohman
ed3216739e Enable DeadMachineInstructionElim when Fast-ISel is enabled. 
llvm-svn: 56604
 2008-09-25 01:14:49 +00:00
Dan Gohman
32c4066d62 Add debug output to this pass. 
llvm-svn: 56602
 2008-09-25 01:06:50 +00:00
Dan Gohman
57dc5e1698 Refactor the code that adds standard LLVM codegen passes into 
a separate function, eliminating duplication between the
add-passes-for-file and add-passes-for-machine-code code.

llvm-svn: 56599
 2008-09-25 00:37:07 +00:00
Evan Cheng
bac8250ba4 <rdar://problem/6234798> Assertion failed: (!OpInfo.AssignedRegs.Regs.empty() && "Couldn't allocate input reg!") 
llvm-svn: 56597
 2008-09-25 00:14:04 +00:00
Dan Gohman
4855b659d9 Give LowerSubregs.cpp a top-level description. 
llvm-svn: 56596
 2008-09-24 23:44:12 +00:00
Dale Johannesen
4184c23365 Remove SelectionDag early allocation of registers 
for earlyclobbers.  Teach Local RA about earlyclobber,
and add some tests for it.

llvm-svn: 56592
 2008-09-24 23:13:09 +00:00
Anton Korobeynikov
ccd9174b23 Use helper 
llvm-svn: 56584
 2008-09-24 22:21:04 +00:00
Anton Korobeynikov
f465171596 SmallPtrSet will be better 
llvm-svn: 56583
 2008-09-24 22:20:46 +00:00
Anton Korobeynikov
f95cbd4834 Use generic section-handling stuff to emit constant pool entries 
llvm-svn: 56579
 2008-09-24 22:17:59 +00:00
Anton Korobeynikov
dca16f3acf Get rid of duplicate char*/Section* DataSection 
llvm-svn: 56575
 2008-09-24 22:16:16 +00:00
Anton Korobeynikov
83fa257f55 Get rid of duplicate char*/Section* TextSection 
llvm-svn: 56574
 2008-09-24 22:15:21 +00:00
Anton Korobeynikov
c7ac49c632 Move actual section printing stuff to AsmPrinter from TAI reducing heap traffic. 
llvm-svn: 56573
 2008-09-24 22:14:23 +00:00
Anton Korobeynikov
9e5d24042c Drop obsolete hook and change all usage to new interface 
llvm-svn: 56572
 2008-09-24 22:13:07 +00:00
Anton Korobeynikov
ff79214785 Provide direct function to switch to Section 
llvm-svn: 56571
 2008-09-24 22:12:10 +00:00
Owen Anderson
2cfce89777 Fix off-by-one error when updating live intervals. 
llvm-svn: 56567
 2008-09-24 21:30:38 +00:00
Bill Wendling
7c60c6e7bf Reapplying r56550 
llvm-svn: 56553
 2008-09-24 10:25:02 +00:00
Bill Wendling
236c4d0204 Forgot this part with my last patch. Sorry about the breakage. 
llvm-svn: 56552
 2008-09-24 10:16:24 +00:00
Eric Christopher
8ffa64fdb5 Temporarily revert r56550 until missing commit can be added. 
llvm-svn: 56551
 2008-09-24 08:30:44 +00:00
Bill Wendling
456b33b615 Refactor the constant folding code into it's own function. And call it from both 
the SelectionDAG and DAGCombiner code. The only functionality change is that now
the DAG combiner is performing the constant folding for these operations instead
of being a no-op.

This is *not* in response to a bug, so there isn't a testcase.

llvm-svn: 56550
 2008-09-24 07:11:26 +00:00
Dale Johannesen
bc29bec7f8 Next round of earlyclobber handling. Approach the 
RA problem by expanding the live interval of an
earlyclobber def back one slot.  Remove
overlap-earlyclobber throughout.  Remove 
earlyclobber bits and their handling from
live internals.

llvm-svn: 56539
 2008-09-24 01:07:17 +00:00
Dan Gohman
a7a04d8ae6 Refactor the logic for testing if an instruction is dead into a 
separate method.

llvm-svn: 56531
 2008-09-24 00:27:38 +00:00
Dan Gohman
49becd6c31 Set SetStore to false, to allow this pass to delete 
dead loads.

llvm-svn: 56529
 2008-09-24 00:07:08 +00:00
Dan Gohman
0cf7b31c69 Add a method to MachineInstr for testing whether it makes 
any volatile memory references.

llvm-svn: 56528
 2008-09-24 00:06:15 +00:00
Evan Cheng
f942615847 Properly handle 'm' inline asm constraints. If a GV is being selected for the addressing mode, it requires the same logic for PIC relative addressing, etc. 
llvm-svn: 56526
 2008-09-24 00:05:32 +00:00
Devang Patel
a3e9bf1bca s/ParameterAttributes/Attributes/g 
llvm-svn: 56513
 2008-09-23 23:03:40 +00:00
Dan Gohman
583938816c Now that DeadMachineInstructionElim is basically working 
correctly, it's not necessary to explicitly remove registers
from their use-def lists.

llvm-svn: 56509
 2008-09-23 22:04:18 +00:00
Dan Gohman
01a070f9c7 Arrange for FastISel code to have access to the MachineModuleInfo 
object. This will be needed to support debug info.

llvm-svn: 56508
 2008-09-23 21:53:34 +00:00
Dan Gohman
3242b7c44c Track local physical register liveness. This is not the most 
efficient implementation possible, but it's pretty simple and
good enough for the time being.

llvm-svn: 56504
 2008-09-23 21:40:44 +00:00
Dan Gohman
52a9adb3fa Replace the LiveRegs SmallSet with a simple counter that keeps 
track of the number of live registers, which is all the set was
being used for.

llvm-svn: 56498
 2008-09-23 18:50:48 +00:00
Owen Anderson
5405b59bcd Add initial support for inserting last minute copies. 
llvm-svn: 56485
 2008-09-23 04:37:10 +00:00
Dan Gohman
28970ed355 Fix the alignment of loads from constant pool entries when the 
load address has an offset from the base of the constant pool
entry.

llvm-svn: 56479
 2008-09-22 22:40:08 +00:00
Evan Cheng
0cfe303607 Livestacks really does preserve everything. 
llvm-svn: 56476
 2008-09-22 22:26:15 +00:00
Evan Cheng
1ded8b6ad6 Instead of setPreservesAll, just mark them preseving machine loop info and machine dominators. 
llvm-svn: 56475
 2008-09-22 22:21:38 +00:00
Owen Anderson
67df9bc5b8 Significant improvements to the logic for merging live intervals. This code can't 
just use LI::MergeValueAsValue, as its behavior in the presence of overlapping ranges
isn't what StrongPHIElimination wants.

llvm-svn: 56472
 2008-09-22 21:58:58 +00:00
Dale Johannesen
3722f4c14c Make log, log2, log10, exp, exp2 use Expand by 
default.

llvm-svn: 56471
 2008-09-22 21:57:32 +00:00
Evan Cheng
3bcf0cdd72 Mark several codegen passes as preserving all analysis. 
llvm-svn: 56469
 2008-09-22 20:58:04 +00:00
Dale Johannesen
375ba5ee63 More refactoring. Yawn. 
llvm-svn: 56468
 2008-09-22 20:51:30 +00:00
Dale Johannesen
a28dd108a4 Refactor FP intrinisic setup. Per review feedback. 
llvm-svn: 56456
 2008-09-22 19:51:58 +00:00
Evan Cheng
638ae1be58 Per review feedback: Only perform 
(srl x, (trunc (and y, c))) -> (srl x, (and (trunc y), c))
etc. when both "trunc" and "and" have single uses.

llvm-svn: 56452
 2008-09-22 18:19:24 +00:00
Oscar Fuentes
0f25988689 Initial support for the CMake build system. 
llvm-svn: 56419
 2008-09-22 01:08:49 +00:00
Bill Wendling
3ee08ff81e Add helper function to get a 32-bit floating point constant. No functionality change. 
llvm-svn: 56418
 2008-09-22 00:44:35 +00:00
Dan Gohman
98a22f8a8f Factor out code into HandleVirtRegDef, for consistency with 
Handle{Virt,Phys}Reg{Def,Use}. Remove a redundant check
for register zero, and redundant checks for isPhysicalRegister.

llvm-svn: 56412
 2008-09-21 21:11:41 +00:00
Owen Anderson
981113c401 Fetch the starting index of the block when assigning intervals. This gets live-in indices 
correct in the presence of things like EH labels.

llvm-svn: 56410
 2008-09-21 20:43:24 +00:00
Chris Lattner
01cab96cba don't print GlobalAddressSDNode's with an offset of zero as "foo0". 
llvm-svn: 56399
 2008-09-21 18:38:31 +00:00
Dale Johannesen
4a0054dc9a Teach coalescer about earlyclobber bits. 
Check bits for preferred register.

llvm-svn: 56384
 2008-09-20 02:03:04 +00:00
Evan Cheng
270178bdda Fix PR2808. When regalloc runs out of register, it spill a physical register around the live interval being allocated. Do not continue to try to spill another register, just grab the physical register and move on. 
llvm-svn: 56381
 2008-09-20 01:28:05 +00:00
Evan Cheng
23e36297d6 Continue after removing the current MI. 
llvm-svn: 56372
 2008-09-19 22:49:39 +00:00
Dan Gohman
f66b3277d3 Refactor X86SelectConstAddr, folding it into X86SelectAddress. This 
results in better code for globals. Also, unbreak the local CSE for
GlobalValue stub loads.

llvm-svn: 56371
 2008-09-19 22:16:54 +00:00
Dale Johannesen
312df3aa6d Make earlyclobber stuff work when virtual regs 
have previously been assigned conflicting physreg.

llvm-svn: 56364
 2008-09-19 18:52:31 +00:00
Evan Cheng
14493ffe78 Re-materalized definition instructions may be dead. Whack them. 
llvm-svn: 56352
 2008-09-19 17:38:47 +00:00
Dale Johannesen
214ddc92d0 Remove AsmThatEarlyClobber etc. from LiveIntervalAnalysis 
and redo as linked list walk.  Logic moved into RA.
Per review feedback.

llvm-svn: 56326
 2008-09-19 01:02:35 +00:00
Evan Cheng
bcd694a1b4 Somehow RegAllocLinearScan is keeping two pointers to MachineRegisterInfo. 
llvm-svn: 56314
 2008-09-18 22:38:47 +00:00
Dan Gohman
9dc56fbe40 Don't consider instructions with implicit physical register 
defs to be necessarily live.

llvm-svn: 56310
 2008-09-18 18:22:32 +00:00
Dan Gohman
b7c5b0f44b Add a new "fast" scheduler. This is currently basically just a 
copy of the BURRList scheduler, but with several parts ripped
out, such as backtracking, online topological sort maintenance
(needed by backtracking), the priority queue, and Sethi-Ullman
number computation and maintenance (needed by the priority
queue). As a result of all this, it generates somewhat lower
quality code, but that's its tradeoff for running about 30%
faster than list-burr in -fast mode in many cases.

This is somewhat experimental. Moving forward, major pieces of
this can be refactored with pieces in common with
ScheduleDAGRRList.cpp.

llvm-svn: 56307
 2008-09-18 16:26:26 +00:00
Dale Johannesen
99091ed94f Add a bit to mark operands of asm's that conflict 
with an earlyclobber operand elsewhere.  Propagate
this bit and the earlyclobber bit through SDISel.
Change linear-scan RA not to allocate regs in a way 
that conflicts with an earlyclobber.  See also comments.

llvm-svn: 56290
 2008-09-17 21:13:11 +00:00
Evan Cheng
d3225118a6 Unallocatable registers do not have live intervals. 
llvm-svn: 56287
 2008-09-17 18:36:25 +00:00
Dan Gohman
4bef47e8c3 Don't worry about clobbering physical register defs that aren't used. 
llvm-svn: 56281
 2008-09-17 15:25:49 +00:00
Dan Gohman
d0c6cb65e8 Add a new MachineInstr-level DCE pass. It is very simple, and is intended to 
be used with fast-isel.

llvm-svn: 56268
 2008-09-17 00:43:24 +00:00
Evan Cheng
6cfbecd1fa When converting a CopyFromReg to a copy instruction, use the register class of its uses to determine the right destination register class of the copy. This is important for targets where a physical register may belong to multiple register classes. 
llvm-svn: 56258
 2008-09-16 23:12:11 +00:00
Dan Gohman
9cbb3f591a Change SelectionDAG::getConstantPool to always set the alignment of the 
ConstantPoolSDNode, using the target's preferred alignment for the
constant type.

In LegalizeDAG, when performing loads from the constant pool, the
ConstantPoolSDNode's alignment is used in the calls to getLoad and
getExtLoad.

This change prevents SelectionDAG::getLoad/getExtLoad from incorrectly
choosing the ABI alignment for constant pool loads when Alignment == 0.
The incorrect alignment is only a performance issue when ABI alignment
does not equal preferred alignment (i.e., on x86 it was generating
MOVUPS instead of MOVAPS for v4f32 constant loads when the default ABI
alignment for 128bit vectors is forced to 1 byte.)

Patch by Paul Redmond!

llvm-svn: 56253
 2008-09-16 22:05:41 +00:00
Bill Wendling
932818c75a Reverting r56249. On further investigation, this functionality isn't needed. 
Apologies for the thrashing.

llvm-svn: 56251
 2008-09-16 21:48:12 +00:00
Dan Gohman
6da3227304 Include the alignment value when displaying ConstantPoolSDNodes. 
llvm-svn: 56250
 2008-09-16 21:18:22 +00:00
Bill Wendling
1a240c8033 - Change "ExternalSymbolSDNode" to "SymbolSDNode". 
- Add linkage to SymbolSDNode (default to external).
- Change ISD::ExternalSymbol to ISD::Symbol.
- Change ISD::TargetExternalSymbol to ISD::TargetSymbol

These changes pave the way to allowing SymbolSDNodes with non-external linkage.

llvm-svn: 56249
 2008-09-16 21:12:30 +00:00
Dan Gohman
f89b35c261 Fix these comments to reflect current reality. Surprisingly, 
MachineConstantPool::getConstantPoolIndex actually expects
a log2-encoded alignment.

llvm-svn: 56248
 2008-09-16 20:45:53 +00:00
Dan Gohman
37457ca74b Don't take the time to CheckDAGForTailCallsAndFixThem when tail calls 
are not enabled. Instead just omit the tail call flag when calls are
created.

llvm-svn: 56235
 2008-09-16 01:42:28 +00:00
Owen Anderson
553caa6ed4 Live intervals for live-in registers should begin at the beginning of a basic block, not at the first 
instruction.  Also, their valno's should have an unknown def.  This has no effect currently, but was
causing issues when StrongPHIElimination was enabled.

llvm-svn: 56231
 2008-09-15 22:00:38 +00:00
Dan Gohman
f38d63884f Re-enable SelectionDAG CSE for calls. It matters in the case of 
libcalls, as in this testcase on ARM.

llvm-svn: 56226
 2008-09-15 19:46:03 +00:00
Evan Cheng
db1693cb14 Correctly update kill infos after extending a live range and merge 2 val#'s; fix 56165 - do not mark val# copy field if the copy does not define the val#. 
llvm-svn: 56199
 2008-09-15 06:28:41 +00:00
Dale Johannesen
57fc1bdfdc adjust last patch per review feedback 
llvm-svn: 56194
 2008-09-14 01:44:36 +00:00
Dan Gohman
fa32c7c6d9 Remove isImm(), isReg(), and friends, in favor of 
isImmediate(), isRegister(), and friends, to avoid confusion
about having two different names with the same meaning. I'm
not attached to the longer names, and would be ok with
changing to the shorter names if others prefer it.

llvm-svn: 56189
 2008-09-13 17:58:21 +00:00
Dan Gohman
3450a8252f Define CallSDNode, an SDNode subclass for use with ISD::CALL. 
Currently it just holds the calling convention and flags
for isVarArgs and isTailCall.

And it has several utility methods, which eliminate magic
5+2*i and similar index computations in several places.

CallSDNodes are not CSE'd. Teach UpdateNodeOperands to handle
nodes that are not CSE'd gracefully.

llvm-svn: 56183
 2008-09-13 01:54:27 +00:00
Evan Cheng
07046dae41 On some targets, non-move instructions can become move instructions because of coalescing. e.g. 
vr2 = OR vr0, vr1
=>
vr2 = OR vr1, vr1   // after coalescing vr0 with vr1

Update the value# of the destination register with the copy instruction if that happens.

llvm-svn: 56165
 2008-09-12 18:13:14 +00:00
Dan Gohman
082879cfde Change ConstantSDNode and ConstantFPSDNode to use ConstantInt* and 
ConstantFP* instead of APInt and APFloat directly.

This reduces the amount of time to create ConstantSDNode
and ConstantFPSDNode nodes when ConstantInt* and ConstantFP*
respectively are already available, as is the case in
SelectionDAGBuild.cpp. Also, it reduces the amount of time
to legalize constants into constant pools, and the amount of
time to add ConstantFP operands to MachineInstrs, due to
eliminating ConstantInt::get and ConstantFP::get calls.

It increases the amount of work needed to create new constants
in cases where the client doesn't already have a ConstantInt*
or ConstantFP*, such as legalize expanding 64-bit integer constants
to 32-bit constants. And it adds a layer of indirection for the
accessor methods. But these appear to be outweight by the benefits
in most cases.

It will also make it easier to make ConstantSDNode and
ConstantFPNode more consistent with ConstantInt and ConstantFP.

llvm-svn: 56162
 2008-09-12 18:08:03 +00:00
Dale Johannesen
6395da3510 Pass "earlyclobber" bit through to machine 
representation; coalescer and RA need to know
about it.  No functional change.

llvm-svn: 56161
 2008-09-12 17:49:03 +00:00
Dan Gohman
89660301e3 Rename ConstantSDNode::getValue to getZExtValue, for consistency 
with ConstantInt. This led to fixing a bug in TargetLowering.cpp
using getValue instead of getAPIntValue.

llvm-svn: 56159
 2008-09-12 16:56:44 +00:00
Dale Johannesen
fbc17046ff The sequence for ppcf128 compares was not IEEE 
safe in the presence of NaNs.

llvm-svn: 56136
 2008-09-12 00:30:56 +00:00
Evan Cheng
5c7e3783ef Fix PR2748. Avoid coalescing physical register with virtual register which would create illegal extract_subreg. e.g. 
vr1024 = extract_subreg vr1025, 1
...
vr1024 = mov8rr AH
If vr1024 is coalesced with AH, the extract_subreg is now illegal since AH does not have a super-reg whose sub-register 1 is AH.

llvm-svn: 56118
 2008-09-11 20:07:10 +00:00
Evan Cheng
99be914c9a Fix PR2783 - coalescer bug. Missing a TargetRegisterInfo::isVirtualRegister check. 
llvm-svn: 56112
 2008-09-11 18:40:32 +00:00
Evan Cheng
9de997d5de Fix a 80 column violation. 
llvm-svn: 56097
 2008-09-11 05:58:06 +00:00
Evan Cheng
b879f93ba5 Propagate subreg index when promoting a load to a copy. 
llvm-svn: 56085
 2008-09-11 01:02:12 +00:00
Dan Gohman
ad5824104b FastISel support for i1 PHI nodes. 
llvm-svn: 56069
 2008-09-10 21:01:31 +00:00
Dan Gohman
5a6134a875 FastISel support for i1 constants. 
llvm-svn: 56068
 2008-09-10 21:01:08 +00:00
Owen Anderson
6bcc01b3eb Fix a bug in the coalescer where it didn't check if a live interval existed before trying to manipulate it. This 
was exposed by fast isel's handling of shifts on X86-64.  With this, FreeBench/pcompress2 passes on X86-64 in fast isel.

llvm-svn: 56067
 2008-09-10 20:41:13 +00:00
Dan Gohman
3ccdde5eef Add X86FastISel support for static allocas, and refences 
to static allocas. As part of this change, refactor the
address mode code for laods and stores.

llvm-svn: 56066
 2008-09-10 20:11:02 +00:00
Evan Cheng
474ba35954 Fix PR2664 - spiller GetRegForReload wasn't respecting sub-register indices on machine operands. 
llvm-svn: 56065
 2008-09-10 20:08:45 +00:00
Dan Gohman
5211f1f5fc Add a break statement that I accidentally deleted when 
I shuffled the fast-isel command-line options around. This fixes
a bunch of fast-isel failures.

llvm-svn: 56057
 2008-09-10 15:52:34 +00:00
Bill Wendling
c7c5d73866 Remove unnecessary bit-wise AND from the limited precision work. 
llvm-svn: 56049
 2008-09-10 06:26:10 +00:00
Daniel Dunbar
df44fb835c Fix 80 col violation. 
llvm-svn: 56048
 2008-09-10 04:16:29 +00:00
Evan Cheng
1ac90281be Fix typo. 
llvm-svn: 56037
 2008-09-10 00:30:50 +00:00
Bill Wendling
4dc9d148b5 Check that both operands are f32 before attempting to lower. 
llvm-svn: 56036
 2008-09-10 00:24:59 +00:00
Bill Wendling
aa39e64468 Implement "visitPow". This is mainly used to see if we have a pow() call of this 
form:

          powf(10.0f, x);

If this is the case, and also we want limited precision floating-point
calculations, then lower to do the limited-precision stuff.

llvm-svn: 56035
 2008-09-10 00:20:20 +00:00
Evan Cheng
150ee094e2 A few more places where FPOW is being ignored. 
llvm-svn: 56032
 2008-09-09 23:35:53 +00:00
Dan Gohman
5b55c46044 Change -fast-isel-no-abort to -fast-isel-abort, which now defaults 
to being off by default. Also, add assertion checks to check that
the various fast-isel-related command-line options are only used
when -fast-isel itself is enabled.

llvm-svn: 56029
 2008-09-09 23:05:00 +00:00
Evan Cheng
ba11945234 Legalizer was missing code that expand fpow to a libcall. 
llvm-svn: 56028
 2008-09-09 23:02:14 +00:00
Bill Wendling
5d6d774240 Adding 6-, 12-, and 18-bit limited-precision floating-point support for exp2 
function.

llvm-svn: 56025
 2008-09-09 22:39:21 +00:00
Dale Johannesen
ba2bbe0c55 Move the uglier parts of deciding not to emit a 
UsedDirective for some symbols in llvm.used into
Darwin-specific code.  I've decided LessPrivateGlobal
is potentially a useful abstraction and left it in
the target-independent area, with improved comment.

llvm-svn: 56024
 2008-09-09 22:29:13 +00:00
Bill Wendling
103d08d4ce Add support for 6-, 12-, and 18-bit limited precision calculations of exp for 
floating-point numbers.

llvm-svn: 56023
 2008-09-09 22:13:54 +00:00
Dan Gohman
2799e1dc63 Add a new option, -fast-isel-verbose, that can be used with 
-fast-isel-no-abort to get a dump of all unhandled instructions,
without an abort.

llvm-svn: 56021
 2008-09-09 22:06:46 +00:00
Evan Cheng
f3a3ee6d01 Clear preference when it no longer makes sense. 
llvm-svn: 56019
 2008-09-09 21:44:23 +00:00
Owen Anderson
0bdc9407ca Clean this up, based on Evan's suggestions. 
llvm-svn: 56009
 2008-09-09 20:47:17 +00:00
Bill Wendling
929486349f - Add support for 6-, 12-, and 18-bit limited precision floating-point "log" 
values.
- Refactored some of the code.

llvm-svn: 56008
 2008-09-09 20:39:27 +00:00
Evan Cheng
304fba81c9 Fix PR2757. Ignore liveinterval register allocation preference if the preference register is not in the right register class. This can happen due to sub-register coalescing. 
llvm-svn: 56006
 2008-09-09 20:22:01 +00:00
Anton Korobeynikov
6ad8b060d0 Make safer variant of alias resolution routine to be default 
llvm-svn: 56005
 2008-09-09 20:05:04 +00:00
Bill Wendling
727b25981a Add limited precision floating-point conversions of log10 for 6- and 18-bit 
precisions.

llvm-svn: 56000
 2008-09-09 18:42:23 +00:00
Owen Anderson
22debc8bec Check for type legality before materializing integer constants in fast isel. With this change, 
all of MultiSource/Applications passes on Darwin/X86 under FastISel.

llvm-svn: 55982
 2008-09-09 06:32:02 +00:00
Dan Gohman
4b334f02b1 Remove the code that protected FastISel from aborting in 
the case of loads, stores, and conditional branches. It can
handle those now, so any that aren't handled should trigger
the abort.

llvm-svn: 55977
 2008-09-09 02:40:04 +00:00
Evan Cheng
dc011a1b10 Fix a constant lowering bug. Now we can do load and store instructions with funky getelementptr embedded in the address operand. 
llvm-svn: 55975
 2008-09-09 01:26:59 +00:00
Dale Johannesen
1ed08a58d1 Fix logic for not emitting no-dead-strip for some 
objects in llvm.used (thanks Anton).  Makes visible
the magic 'l' prefix for symbols on Darwin which are
to be passed through the assembler, then removed at
linktime (previously all references to this had been
hidden in the ObjC FE code, oh well).

llvm-svn: 55973
 2008-09-09 01:21:22 +00:00
Bill Wendling
701da64da7 Add support for floating-point calculations of log2 with limited precisions of 6 
and 18.

llvm-svn: 55968
 2008-09-09 00:28:24 +00:00
Dale Johannesen
372133f1c8 Don't suppress no-dead-strip for used static functions. 
llvm-svn: 55962
 2008-09-08 21:21:49 +00:00
Anton Korobeynikov
d82cd01929 Reapply 55904: Unbreak and fix indentation 
llvm-svn: 55958
 2008-09-08 21:13:56 +00:00
Dan Gohman
121cc3c111 Fix a few I's that were meant to be renamed to BI's. 
llvm-svn: 55942
 2008-09-08 20:37:59 +00:00
Dale Johannesen
78617b727e Redo the 3 existing low-precision expansions to 
use float constants.  An oversight by the numerics
people who supplied this.

llvm-svn: 55930
 2008-09-08 18:00:26 +00:00
Bill Wendling
4cc4caab72 Reverting r55898 to r55909. One of these patches was causing an ICE during the full bootstrap on Darwin: 
/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/xgcc
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/bin/
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/lib/
-isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/include
-isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/sys-include
-O2  -O2 -g -O2  -DIN_GCC    -W -Wall -Wwrite-strings
-Wstrict-prototypes -Wmissing-prototypes -Wold-style-definition
-isystem ./include  -fPIC -pipe -g -DHAVE_GTHR_DEFAULT -DIN_LIBGCC2
-D__GCC_FLOAT_NOT_NEEDED  -I. -I. -I../../llvm-gcc.src/gcc
-I../../llvm-gcc.src/gcc/. -I../../llvm-gcc.src/gcc/../include
-I./../intl -I../../llvm-gcc.src/gcc/../libcpp/include
-I../../llvm-gcc.src/gcc/../libdecnumber -I../libdecnumber
-I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.obj/include
-I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/include
-DSHARED -m64 -DL_negdi2 -c ../../llvm-gcc.src/gcc/libgcc2.c -o
libgcc/x86_64/_negdi2_s.o
Assertion failed: (TargetRegisterInfo::isVirtualRegister(regA) &&
TargetRegisterInfo::isVirtualRegister(regB) && "cannot update physical
register live information"), function runOnMachineFunction, file
/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/lib/CodeGen/TwoAddressInstructionPass.cpp,
line 311.
/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/xgcc
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/bin/
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/lib/
-isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/include
-isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/sys-include
-O2  -O2 -g -O2  -DIN_GCC    -W -Wall -Wwrite-strings
-Wstrict-prototypes -Wmissing-prototypes -Wold-style-definition
-isystem ./include  -fPIC -pipe -g -DHAVE_GTHR_DEFAULT -DIN_LIBGCC2
-D__GCC_FLOAT_NOT_NEEDED  -I. -I. -I../../llvm-gcc.src/gcc
-I../../llvm-gcc.src/gcc/. -I../../llvm-gcc.src/gcc/../include
-I./../intl -I../../llvm-gcc.src/gcc/../libcpp/include
-I../../llvm-gcc.src/gcc/../libdecnumber -I../libdecnumber
-I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.obj/include
-I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/include
-DSHARED -m64 -DL_lshrdi3 -c ../../llvm-gcc.src/gcc/libgcc2.c -o
libgcc/x86_64/_lshrdi3_s.o
../../llvm-gcc.src/gcc/unwind-dw2.c:1527: internal compiler error: Abort trap
Please submit a full bug report,
with preprocessed source if appropriate.
See <URL:http://developer.apple.com/bugreporter> for instructions.
{standard input}:unknown:Undefined local symbol LBB21_11
{standard input}:unknown:Undefined local symbol LBB21_12
{standard input}:unknown:Undefined local symbol LBB21_13
{standard input}:unknown:Undefined local symbol LBB21_8

llvm-svn: 55928
 2008-09-08 17:59:12 +00:00
Dan Gohman
c9fdcfb189 In visitUREM, arrange for the temporary UDIV node to be 
revisited, consistent with the code in visitSREM.

llvm-svn: 55923
 2008-09-08 16:59:01 +00:00
Daniel Dunbar
ddd9b2aeb0 Add VISIBILITY_HIDDEN on SDISelAsmOperandInfo 
llvm-svn: 55922
 2008-09-08 16:56:08 +00:00
Dan Gohman
f2a912c2a7 Add AsmPrinter support for i128 and larger static initializer data. 
llvm-svn: 55919
 2008-09-08 16:40:13 +00:00
Dan Gohman
afe7e3f3b1 Fix the string for ISD::UDIVREM. 
llvm-svn: 55917
 2008-09-08 16:30:29 +00:00
Evan Cheng
432600a47a Avoid redefinition and nnbreak windows build. 
llvm-svn: 55911
 2008-09-08 16:01:27 +00:00
Anton Korobeynikov
5ea45bb9eb Unbreak and fix indentation 
llvm-svn: 55904
 2008-09-08 14:23:34 +00:00
Evan Cheng
8cb490d2f3 Add fast isel physical register definition support. 
llvm-svn: 55892
 2008-09-08 08:38:20 +00:00
Bill Wendling
2239de4290 Revert my previous change -- the subtraction of two constants was a no-op 
before. This is taken care of in the selection DAG pass. In my opinion, this
should be in one place or the other. I.e., it should probably be removed from
the DAG combiner (along with the other arithmetic transformations on constants
that are essentially no-ops).

llvm-svn: 55889
 2008-09-08 01:56:32 +00:00
Bill Wendling
91e9abe370 Convert 
// fold (sub c1, c2) -> c1-c2

from a no-op into an actual transformation.

llvm-svn: 55886
 2008-09-07 11:34:47 +00:00
Evan Cheng
396c744dfa Indentation. 
llvm-svn: 55880
 2008-09-07 09:04:52 +00:00
Evan Cheng
285350703c - Doh. Pass vector by value is bad. 
- Add a AnalyzeCallResult specialized for calls which produce a single value. This is used by fastisel.

llvm-svn: 55879
 2008-09-07 09:02:18 +00:00
Dale Johannesen
3be45974bb Next limited float precision expansion (log2 12 bits) 
llvm-svn: 55866
 2008-09-05 23:49:37 +00:00
Owen Anderson
453bcfcf8d Revert r55859. This is breaking the build in the abscence of its companion commit. 
llvm-svn: 55865
 2008-09-05 23:36:01 +00:00
Dan Gohman
85d35b92df Move the code that inserts copies for function livein registers 
out of ScheduleDAGEmit.cpp and into SelectionDAGISel.cpp. This
allows it to be run exactly once per function, even if multiple
SelectionDAG iterations happen in the entry block, as may happen
with FastISel.

llvm-svn: 55863
 2008-09-05 22:59:21 +00:00
Dale Johannesen
6b48790d88 Add the next limited-precision expansion. 
llvm-svn: 55856
 2008-09-05 21:27:19 +00:00
Dan Gohman
b22e9b050f FastISel support for AND and OR with type i1. 
llvm-svn: 55846
 2008-09-05 18:44:22 +00:00
Dale Johannesen
116163ab21 Add hooks for other intrinsics to get low-precision expansions. 
llvm-svn: 55845
 2008-09-05 18:38:42 +00:00
Dan Gohman
525caf83e5 FastISel support for ConstantExprs. 
llvm-svn: 55843
 2008-09-05 18:18:20 +00:00
Dan Gohman
13d7484b4a Revert r55817. It broke PIC. FastISel will need to find a different 
approach here.

llvm-svn: 55842
 2008-09-05 18:13:01 +00:00
Evan Cheng
339a06f29e Add a variant of AnalyzeCallOperands that can be used by fast isel. 
llvm-svn: 55838
 2008-09-05 16:59:26 +00:00
Duncan Sands
566e0f1053 "Fix" PR2762. The testcase now crashes codegen 
elsewhere due to a missing pattern for
v2f64 = sint_to_fp v2i32.  That is PR2687.

llvm-svn: 55828
 2008-09-05 08:13:35 +00:00
Dan Gohman
a3987ed4e2 Fix a search+replace-o. 
llvm-svn: 55824
 2008-09-05 01:58:21 +00:00
Dale Johannesen
ce63ed5b47 Add -flimit-float-precision to enable some faster, 
but less accurate (non-IEEE) code sequences for
certain math library functions.  Add the first of
several such expansions.  Don't worry, if you don't
turn it on it won't affect you.

llvm-svn: 55823
 2008-09-05 01:48:15 +00:00
Dan Gohman
e64326ff34 FastISel support for unreachable. 
llvm-svn: 55818
 2008-09-05 01:08:41 +00:00
Dan Gohman
fcd2cbd985 In FastISel mode, the scheduler may be invoked multiple times 
in the same block. Fix the entry-block handling to only run at
at the beginning of the entry block, and not any other times.

llvm-svn: 55817
 2008-09-05 01:07:48 +00:00
Owen Anderson
6d5b72d45a Add initial support for selecting constant materializations that require constant 
pool loads on X86 in fast isel.  This isn't actually used yet.

llvm-svn: 55814
 2008-09-05 00:06:23 +00:00
Dan Gohman
1ffb4ad3a8 Add an include of SmallSet.h. 
llvm-svn: 55793
 2008-09-04 20:49:27 +00:00
Dan Gohman
e1f9be27bc Tidy up several unbeseeming casts from pointer to intptr_t. 
llvm-svn: 55779
 2008-09-04 17:05:41 +00:00
Dan Gohman
7ee14837e6 Clean up uses of TargetLowering::getTargetMachine. 
llvm-svn: 55769
 2008-09-04 15:39:15 +00:00
Evan Cheng
dcce925eb1 Fix an overly strict assertion. Source register of a copy may not be killed, it may be killed by an implicit super-register use. 
llvm-svn: 55762
 2008-09-04 05:43:55 +00:00
Dale Johannesen
9e4d101fab Add intrinsics for log, log2, log10, exp, exp2. 
No functional change (and no FE change to generate them).

llvm-svn: 55753
 2008-09-04 00:47:13 +00:00
Dan Gohman
18f659d804 Do trivial local CSE for constants and other non-Instruction values 
in FastISel.

llvm-svn: 55748
 2008-09-03 23:32:19 +00:00
Dan Gohman
f86538dd3c Put RegsForValue in the llvm namespace to avoid warnings about 
classes in the llvm namespace having members with types from
anonymous namespaces.

llvm-svn: 55747
 2008-09-03 23:18:39 +00:00
Dan Gohman
18cc2a26df Create HandlePHINodesInSuccessorBlocksFast, a version of 
HandlePHINodesInSuccessorBlocks that works FastISel-style. This
allows PHI nodes to be updated correctly while using FastISel.

This also involves some code reorganization; ValueMap and
MBBMap are now members of the FastISel class, so they needn't
be passed around explicitly anymore. Also, SelectInstructions
is changed to SelectInstruction, and only does one instruction
at a time.

llvm-svn: 55746
 2008-09-03 23:12:08 +00:00
Dale Johannesen
ca782fcba1 Do not emit a UsedDirective for things in the llvm.used 
list that have internal linkage; the linker doesn't need
or want this.  (These objects must still be preserved
at compile time, so just removing them from the llvm.used
list doesn't work.)  Should affect only Darwin.

llvm-svn: 55722
 2008-09-03 20:34:58 +00:00
Owen Anderson
d08396955c Oops, I accidentally broke the fallback case with my last commit. 
llvm-svn: 55704
 2008-09-03 17:51:57 +00:00
Owen Anderson
906c590bb8 Fix an issue where we were reusing materializations of constants in blocks not dominated by the materialization. This is 
the simple fix, materializing the constant before every use.  It might be better to either track domination of uses or
to materialize all constants and the beginning of the function and let remat sort when to do materialization at uses.

llvm-svn: 55703
 2008-09-03 17:37:03 +00:00
Dan Gohman
3ee4edfe9c Split the SelectionDAG-building code, including the FunctionLoweringInfo 
and SelectionDAGLowering classes, out of SelectionDAGISel.cpp and put
it in a separate file, SelectionDAGBuild.cpp.

llvm-svn: 55701
 2008-09-03 16:12:24 +00:00
Dan Gohman
c58897359b Separate MachineInstr-emitting routines from actual scheduling 
routines and move them into a separate file, ScheduleDAGEmit.cpp.

llvm-svn: 55699
 2008-09-03 16:01:59 +00:00
Dan Gohman
ec225915fa Fix addRegisterDead and addRegisterKilled to be more thorough 
when searching for redundant subregister dead/kill bits.

Previously it was common to see instructions marked like this:
  "RET %EAX<imp-use,kill>, %AX<imp-use,kill>"

With this change, addRegisterKilled continues scanning after
finding the %EAX operand, so it proceeds to discover the
redundant %AX kill and eliminates it, producing this:
  "RET %EAX<imp-use,kill>"

This currently has no effect on the generated code.

llvm-svn: 55698
 2008-09-03 15:56:16 +00:00
Evan Cheng
f993be4cc8 If TargetSelectInstruction returns true, move to next instruction. 
llvm-svn: 55692
 2008-09-03 06:43:41 +00:00
Evan Cheng
5e0e6dfc7f 80 col violations. 
llvm-svn: 55668
 2008-09-02 21:59:13 +00:00
Dan Gohman
9969b223c7 Ensure that HandlePHINodesInSuccessorBlocks is run for all blocks, 
even in FastISel mode in the case where FastISel successfully 
selects all the instructions. 

llvm-svn: 55641
 2008-09-02 20:17:56 +00:00
Gabor Greif
632fa3a318 Provide two overloads of AnalyzeNewNode. 
The first can update the SDNode in an SDValue
while the second is called with SDNode* and
returns a possibly updated SDNode*.

This patch has no intended functional impact,
but helps eliminating ugly temporary SDValues.

llvm-svn: 55608
 2008-09-01 15:10:19 +00:00
Duncan Sands
efc82024e0 Even though no caller actually uses the new value 
(what matters is that it is added to the worklist),
it seems more logical to return it.

llvm-svn: 55606
 2008-09-01 13:11:13 +00:00
Bill Wendling
4a9ded80e2 Cosmetic changes to Machine LICM. No functionality change. 
llvm-svn: 55578
 2008-08-31 02:30:23 +00:00
Bill Wendling
3f918b3603 Another situation where ROTR is cheaper than ROTL. 
llvm-svn: 55577
 2008-08-31 01:13:31 +00:00
Bill Wendling
ef64d4333e For this pattern, ROTR is the cheaper option. 
llvm-svn: 55576
 2008-08-31 01:04:56 +00:00
Bill Wendling
08690f06b2 - Fix comment so that it describes how the code really works: 
// fold (or (shl x, (*ext y)), (srl x, (*ext (sub 32, y)))) ->
   //   (rotl x, y)
   // fold (or (shl x, (*ext y)), (srl x, (*ext (sub 32, y)))) ->
   //   (rotr x, (sub 32, y))

Example: (x == 0xDEADBEEF and y == 4)

    (x << 4) | (x >> 28)
 => 0xEADBEEF0 | 0x0000000D
 => 0xEADBEEFD

    (rotl x, 4)
 => 0xEADBEEFD

    (rotr x, 28)
 => 0xEADBEEFD

- Fix comment and code for second version. It wasn't using the rot* propertly.

   // fold (or (shl x, (*ext (sub 32, y))), (srl x, (*ext r))) -> 
   //   (rotr x, y)
   // fold (or (shl x, (*ext (sub 32, y))), (srl x, (*ext r))) ->
   //   (rotl x, (sub 32, y))

    (x << 28) | (x >> 4)
 => 0xD0000000 | 0x0DEADBEE
 => 0xDDEADBEE

    (rotl x, 4)
 => 0xEADBEEFD

    (rotr x, 28)
 => (0xEADBEEFD)

llvm-svn: 55575
 2008-08-31 00:37:27 +00:00
Gabor Greif
fa6e220233 typo 
llvm-svn: 55574
 2008-08-30 22:16:05 +00:00
Gabor Greif
2aef1d5e4c fix some 80-col violations 
llvm-svn: 55571
 2008-08-30 19:29:20 +00:00
Evan Cheng
b40b710766 Re-apply 55467 with fix. If copy is being replaced by remat'ed def, transfer the implicit defs onto the remat'ed instruction. 
llvm-svn: 55564
 2008-08-30 09:09:33 +00:00
Evan Cheng
4cfcf9ca51 Fold isRematerializable checks into isSafeToReMat. 
llvm-svn: 55563
 2008-08-30 09:07:18 +00:00
Evan Cheng
4bc8c9652e Transform (x << (y&31)) -> (x << y). This takes advantage of the fact x86 shift instructions 2nd operand (shift count) is limited to 0 to 31 (or 63 in the x86-64 case). 
llvm-svn: 55558
 2008-08-30 02:03:58 +00:00
Owen Anderson
6c8f04643e Fix an issue where a use might be selected before a def, and then we didn't respect the pre-chosen vreg 
assignment when selecting the def.  This is the naive solution to the problem: insert a copy to the pre-chosen
vreg.  Other solutions might be preferable, such as:
  1) Passing the dest reg into FastEmit_.  However, this would require the higher level code to know about reg classes, which they don't currently.
  2) Selecting blocks in reverse postorder.  This has some compile time cost for computing the order, and we'd need to measure its impact.

llvm-svn: 55555
 2008-08-30 00:38:46 +00:00
Evan Cheng
9ee227f1df Fix 80 col. violations. 
llvm-svn: 55551
 2008-08-29 23:20:46 +00:00
Evan Cheng
2a3e05b519 Back out 55498. It broken Apple style bootstrapping. 
llvm-svn: 55549
 2008-08-29 22:21:44 +00:00
Dan Gohman
c7b8401b77 Add a target callback for FastISel. 
llvm-svn: 55512
 2008-08-28 23:21:34 +00:00
Gabor Greif
86c795a8ca erect abstraction boundaries for accessing SDValue members, rename Val -> Node to reflect semantics 
llvm-svn: 55504
 2008-08-28 21:40:38 +00:00
Dan Gohman
481731693d Implement null and undef values for FastISel. 
llvm-svn: 55500
 2008-08-28 21:19:07 +00:00
Dan Gohman
35a69c106a Optimize DAGCombiner's worklist processing. Previously it started 
its work by putting all nodes in the worklist, requiring a big
dynamic allocation. Now, DAGCombiner just iterates over the AllNodes
list and maintains a worklist for nodes that are newly created or
need to be revisited. This allows the worklist to stay small in most
cases, so it can be a SmallVector.

This has the side effect of making DAGCombine not miss a folding
opportunity in alloca-align-rounding.ll.

llvm-svn: 55498
 2008-08-28 21:01:56 +00:00
Dan Gohman
9a6f5b0bdd Move CaseBlock, JumpTable, and BitTestBlock to be members of 
SelectionDAGLowering instead of being in an anonymous namespace.
This fixes warnings about SelectionDAGLowering having fields
using anonymous namespaces.

llvm-svn: 55497
 2008-08-28 20:38:18 +00:00
Dan Gohman
f8e43fa400 Fix a FastISel bug where the instructions from lowering the arguments 
were being emitted after the first instructions of the entry block.

llvm-svn: 55496
 2008-08-28 20:28:56 +00:00
Rafael Espindola
31c516aabe Reduce the size of the Parts vector. 
llvm-svn: 55483
 2008-08-28 18:29:58 +00:00
Owen Anderson
675ace60a1 Hook up support for fast-isel of trunc instructions, using the newly working support for EXTRACT_SUBREG. 
llvm-svn: 55482
 2008-08-28 18:26:01 +00:00
Owen Anderson
8c991b6f8a FastEmitInst_extractsubreg doesn't need to be passed the register class. It can get it from MachineRegisterInfo instead. 
llvm-svn: 55476
 2008-08-28 17:47:37 +00:00
Dan Gohman
8f4d612996 Revert r55467; it causes regressions in UnitTests/Vector/divides, 
Benchmarks/sim/sim, and others on x86-64.

llvm-svn: 55475
 2008-08-28 17:22:54 +00:00