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Author SHA1 Message Date
Jim Grosbach
06dffd2643 ARM VFP add encoding of the bitcount to fixed-point<-->floating point. insns. 
The value from the operands isn't right yet, but we weren't encoding it at
all previously. The parser needs to twiddle the values when building the
instruction.

Partial for: rdar://10558523

llvm-svn: 147170
 2011-12-22 19:55:21 +00:00
Jim Grosbach
5824007e4d Remove some bogus comments. 
llvm-svn: 147169
 2011-12-22 19:45:01 +00:00
Chris Lattner
c1c640b408 fix typo 
llvm-svn: 147159
 2011-12-22 19:20:51 +00:00
Jim Grosbach
970c4cab9e ARM pre-UAL aliases. fcmp[sd]. 
llvm-svn: 147158
 2011-12-22 19:20:45 +00:00
Rafael Espindola
1c75ae90fa Fix an incomplete refactoring of the ppc backend. Thanks to rdivacky for reporting 
it. It does need some some tests...

llvm-svn: 147154
 2011-12-22 18:38:06 +00:00
Jim Grosbach
100e3aaffa ARM assembler should accept shift-by-zero for any shifted-immediate operand. 
Just treat it as-if the shift wasn't there at all. 'as' compatibility.

rdar://10604767

llvm-svn: 147153
 2011-12-22 18:04:04 +00:00
Jim Grosbach
90f8398ee6 ARM assembly parser canonicallize on 'lsl' for shift-by-zero form. 
llvm-svn: 147152
 2011-12-22 17:37:00 +00:00
Jim Grosbach
8ca95cbf58 Tidy up. Trailing whitespace. 
llvm-svn: 147151
 2011-12-22 17:17:10 +00:00
Jim Grosbach
65cd6c7acc Nuke invalid comment from copy/paste. 
llvm-svn: 147150
 2011-12-22 17:04:50 +00:00
Benjamin Kramer
5d07d63540 Give string constants generated by IRBuilder private linkage. 
Fixes PR11640.

llvm-svn: 147144
 2011-12-22 14:22:14 +00:00
Rafael Espindola
c98cd8151e Add configure support for kfreebsd and hurd. Patch by Sylvestre Ledru. 
Fixes pr11620.

llvm-svn: 147143
 2011-12-22 14:01:18 +00:00
Chandler Carruth
acdf352b77 Make the unreachable probability much much heavier. The previous 
probability wouldn't be considered "hot" in some weird loop structures
or other compounding probability patterns. This makes it much harder to
confuse, but isn't really a principled fix. I'd actually like it if we
could model a zero probability, as it would make this much easier to
reason about. Suggestions for how to do this better are welcome.

llvm-svn: 147142
 2011-12-22 09:26:37 +00:00
Rafael Espindola
fc4563fd8c Kill the monstrosity that was ELFObjectWriter.h. 
llvm-svn: 147136
 2011-12-22 03:38:00 +00:00
Rafael Espindola
f6ea76db23 Misc cleanups. 
llvm-svn: 147135
 2011-12-22 03:24:43 +00:00
Eli Friedman
7e1bd9d328 Fix APInt::rotl and APInt::rotr so that they work correctly. Found while writing some code that tried to use them. 
llvm-svn: 147134
 2011-12-22 03:15:35 +00:00
Rafael Espindola
3ed0f04e50 Move the Mips only bits of the ELF writer to lib/Target/Mips. 
llvm-svn: 147133
 2011-12-22 03:03:17 +00:00
Rafael Espindola
57dea1bf84 Make the virtual methods in ARMELFObjectWriter public. 
llvm-svn: 147132
 2011-12-22 02:58:12 +00:00
Chad Rosier
4ab165f664 Speculatively revert r146578 to determine if it is the cause of a number of 
performance regressions (both execution-time and compile-time) on our
nightly testers.

Original commit message:
Fix for bug #11429: Wrong behaviour for switches. Small improvement for code
size heuristics.

llvm-svn: 147131
 2011-12-22 02:40:57 +00:00
Rafael Espindola
82d61c8b38 Move the MBlaze ELF writer bits to lib/Target/MBlaze. 
llvm-svn: 147129
 2011-12-22 02:28:24 +00:00
Pete Cooper
2c77045084 Hoisted some loop invariant smallvector lookups out of a MachineLICM loop 
llvm-svn: 147127
 2011-12-22 02:13:25 +00:00
Rafael Espindola
b3756d8e4d Fix cmake. 
llvm-svn: 147126
 2011-12-22 02:06:17 +00:00
Pete Cooper
be17e2bd59 Changed MachineLICM to use a worklist list MachineCSE instead of recursion. 
Fixes <rdar://problem/10584116>

llvm-svn: 147125
 2011-12-22 02:05:40 +00:00
Rafael Espindola
9c71db357e Move PPC bits to lib/Target/PowerPC. 
llvm-svn: 147124
 2011-12-22 01:57:09 +00:00
Rafael Espindola
6f3a1698f3 Hopefully fix the cmake build. 
llvm-svn: 147121
 2011-12-22 01:11:01 +00:00
Rafael Espindola
6f21886d7e Fix name in comments. 
llvm-svn: 147119
 2011-12-22 01:06:53 +00:00
Akira Hatanaka
e7bcf63d98 Local dynamic TLS model for direct object output. Create the correct TLS MIPS 
ELF relocations.

Patch by Jack Carter.

llvm-svn: 147118
 2011-12-22 01:05:17 +00:00
Richard Smith
9b355262f5 Unbreak cmake build after r147115. 
llvm-svn: 147117
 2011-12-22 01:03:35 +00:00
Rafael Espindola
ee837037ee Move the ARM specific parts of the ELF writer to Target/ARM. 
llvm-svn: 147115
 2011-12-22 00:37:50 +00:00
Rafael Espindola
943ba34584 getEFlags is const. 
llvm-svn: 147114
 2011-12-22 00:21:50 +00:00
Lang Hames
4258202987 Fixed typo. 
llvm-svn: 147113
 2011-12-22 00:12:51 +00:00
Jim Grosbach
1b11b334a4 ARM NEON mnemonic aliase for vrecpeq. 
llvm-svn: 147109
 2011-12-21 23:52:37 +00:00
Jim Grosbach
7d31680e2d ARM VFP optional data type on VMOV GPR<-->SPR. 
llvm-svn: 147104
 2011-12-21 23:24:15 +00:00
Jim Grosbach
35b5afad26 ARM NEON optional data type on VSWP instructions. 
llvm-svn: 147103
 2011-12-21 23:09:28 +00:00
Jim Grosbach
64df852f5b ARM NEON mnemonic aliases for vzipq and vswpq. 
llvm-svn: 147102
 2011-12-21 23:04:33 +00:00
Jakub Staszak
4226104d8a Revert patch from 147090. There is not point to make code less readable if we 
don't get any serious benefit there.

llvm-svn: 147101
 2011-12-21 23:02:08 +00:00
Jim Grosbach
88eacffd72 ARM asm parser should be more lenient w/ .thumb_func directive. 
Rather than require the symbol to be explicitly an argument of the directive,
allow it to look ahead and grab the symbol from the next non-whitespace
line.

rdar://10611140

llvm-svn: 147100
 2011-12-21 22:30:16 +00:00
Dan Gohman
17bd9795e9 Fix a copy+pasto. No testcase, because the symptoms of dereferencing 
an invalid iterator aren't reproducible.  rdar://10614085.

llvm-svn: 147098
 2011-12-21 21:43:50 +00:00
Jim Grosbach
2bbc41fa26 Thumb2 assembly parsing of 'mov rd, rn, rrx'. 
Maps to the RRX instruction. Missed this case earlier.

rdar://10615373

llvm-svn: 147096
 2011-12-21 21:04:19 +00:00
Chad Rosier
98251404f7 Fix 80-column violations. 
llvm-svn: 147095
 2011-12-21 20:59:09 +00:00
Jim Grosbach
91faf5d15f Thumb2 assembly parsing of 'mov(register shifted register)' aliases. 
These map to the ASR, LSR, LSL, ROR instruction definitions.

rdar://10615373

llvm-svn: 147094
 2011-12-21 20:54:00 +00:00
Nick Lewycky
cedb6b6ec4 Continue counting intrinsics as instructions (except when they aren't, such as 
debug info) and for being vector operations. Fixes regression from r147037.

llvm-svn: 147093
 2011-12-21 20:26:03 +00:00
Nick Lewycky
f147ddb0e6 Fix typo and spacing, no functionality change. 
llvm-svn: 147092
 2011-12-21 20:21:55 +00:00
Jakub Staszak
3a3ffa2d1e - Change a few operator[] to lookup which is cheaper. 
- Add some constantness.

llvm-svn: 147090
 2011-12-21 20:18:54 +00:00
Lang Hames
6bbf0c8da6 Oops - LiveIntervalUnion.cpp file does use std::find. Moving STL header include to LiveIntervalUnion.cpp file. 
llvm-svn: 147089
 2011-12-21 20:16:11 +00:00
Lang Hames
76eeaf60a9 Remove disused STL header include. 
llvm-svn: 147088
 2011-12-21 20:12:54 +00:00
Rafael Espindola
6442ed0e79 Switch from WriteEFlags to getEFlags in preparation for moving it 
to Target/.

llvm-svn: 147087
 2011-12-21 20:09:46 +00:00
Jakob Stoklund Olesen
893037ce23 Move common code into an MRI function. 
llvm-svn: 147071
 2011-12-21 19:50:05 +00:00
Jim Grosbach
f7236d1084 ARM NEON assmebly parsing for VLD2 to all lanes instructions. 
llvm-svn: 147069
 2011-12-21 19:40:55 +00:00
Chad Rosier
4e4bfcaa90 No case stmt for BUILD_VECTOR in PerformDAGCombine(), so I assume this isn't 
necessary.  Please chime in if I'm mistaken.

llvm-svn: 147065
 2011-12-21 19:14:52 +00:00
Chad Rosier
c2f31859cc Fix a couple of copy-n-paste bugs. Noticed by George Russell! 
llvm-svn: 147064
 2011-12-21 18:56:22 +00:00