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Commit Graph

140 Commits

Author SHA1 Message Date
Chris Lattner
eac243c414 Simplify the interface
llvm-svn: 5313
2003-01-15 21:13:32 +00:00
Chris Lattner
b27d60ccf1 Rename MachineInstrInfo -> TargetInstrInfo
llvm-svn: 5272
2003-01-14 22:00:31 +00:00
Chris Lattner
ab69d9da2f Move annotation to support library
llvm-svn: 5268
2003-01-14 21:29:58 +00:00
Chris Lattner
8decb3e453 Rename MachineInstrInfo -> TargetInstrInfo
llvm-svn: 5214
2003-01-13 00:21:32 +00:00
Chris Lattner
5fd0d8f44b * Start renaming MachineInstrInfo -> TargetInstrInfo
* Add new M_TERMINATOR_FLAG

llvm-svn: 5213
2003-01-13 00:21:19 +00:00
Chris Lattner
2117077d8f Add new getName method
llvm-svn: 5212
2003-01-13 00:19:44 +00:00
Chris Lattner
dfa3c21f1c More renamings of Target/Machine*Info to Target/Target*Info
llvm-svn: 5204
2002-12-29 03:13:05 +00:00
Chris Lattner
bff4411f3a Rename MachineOptInfo to TargetoptInfo
Rename MachineCacheInfo to TargetCacheInfo

llvm-svn: 5203
2002-12-29 02:50:35 +00:00
Chris Lattner
c3dbf62971 * doxygenize comment
* rename MachineFrameInfo to TargetFrameInfo

llvm-svn: 5170
2002-12-28 20:13:29 +00:00
Chris Lattner
90d1ea29ab Sparc specific methods default to abort rather than being pure virtual
llvm-svn: 5169
2002-12-28 20:12:54 +00:00
Chris Lattner
51c7c172db Expose some very simple information about the frame, rather than in-depth
target specific information.  Rename MachineFrameInfo to TargetFrameInfo

llvm-svn: 5168
2002-12-28 20:12:10 +00:00
Chris Lattner
b525ce97cc * Keep track of register alignment as well as register size
* Add comments
* Add a new allocation_order iterator for register classes which targets may
  use to control the register order and available registers based on properties
  of the function being compiled.
* Remove access to FP and SP registers
* Add new callframe setup opcode support
* Eliminate moveImm2Reg method
* Revamp frame offset handling and prolog/epilog code generation

llvm-svn: 5167
2002-12-28 20:10:23 +00:00
Chris Lattner
881ffece47 Simplify spill interface methods
llvm-svn: 5142
2002-12-25 05:02:00 +00:00
Chris Lattner
b44ebe2588 Add comment
llvm-svn: 5141
2002-12-25 05:01:46 +00:00
Chris Lattner
bc5e71ef2f Allow the target machines to specify endianness and pointer size
llvm-svn: 5128
2002-12-24 00:02:17 +00:00
Chris Lattner
079d149fbd Simplify interface to remove virtual function references
llvm-svn: 5100
2002-12-17 04:20:39 +00:00
Chris Lattner
3b7f709ebd Add support for register alias set description
llvm-svn: 5080
2002-12-16 16:39:14 +00:00
Chris Lattner
07cc730ddd Export well known instruction opcodes usable by target independant passes
llvm-svn: 5063
2002-12-15 22:16:08 +00:00
Chris Lattner
4214ac384a Simplify interfaces used by regalloc to insert code
llvm-svn: 5052
2002-12-15 20:06:35 +00:00
Chris Lattner
9b1957fd1e Simplify TargetRegisterClass a bit, also eliminating virtual function call
overhead

llvm-svn: 5049
2002-12-15 19:29:14 +00:00
Chris Lattner
51cf15cf12 * Rename const_regclass_begin/end to just regclass_begin/end
* Regclass iterators need an extra level of pointerness to work right
* Pull inverse mapping code out of target description files

llvm-svn: 5046
2002-12-15 18:40:01 +00:00
Misha Brukman
fb02408496 Added moveReg2Reg() and moveImm2Reg() to accomodate moving data around due to
PHI nodes.

llvm-svn: 5001
2002-12-13 09:54:12 +00:00
Misha Brukman
bc60f65211 Define the 2-address flag used by X86 instructions (add,sub,and,or,xor) that
need to be declared as such.

llvm-svn: 4975
2002-12-12 23:19:51 +00:00
Misha Brukman
32ec427192 Added prototypes for emitting prologue and epilogue for function code
generation.

llvm-svn: 4927
2002-12-04 23:55:56 +00:00
Misha Brukman
101076f586 storeReg2RegOffset() and loadRegOffset2Reg() now take the iterator by value
instead of by reference, since they return the modified iterator.

llvm-svn: 4914
2002-12-04 17:14:13 +00:00
Misha Brukman
6e1c4851ea Moved buildReg2RegClassMap() into from X86RegisterInfo to MRegisterInfo, since
it is target-independent.

llvm-svn: 4911
2002-12-04 16:47:04 +00:00
Chris Lattner
aeb454c30e Expose target data through a method for uniformity
llvm-svn: 4901
2002-12-04 05:20:12 +00:00
Misha Brukman
6b9cb74fdc RegisterInfo now supports handing out caller- and callee-save registers, as
well as building a map from a physical register to its register class.

llvm-svn: 4896
2002-12-03 23:09:53 +00:00
Chris Lattner
866d635098 Add entries to track information about implicit uses and definitions of
the instructions

llvm-svn: 4875
2002-12-03 05:41:32 +00:00
Chris Lattner
920d619d39 The hopefully final version of addPassesToEmitMachineCode which does not
have any question about ownership

llvm-svn: 4863
2002-12-02 21:15:42 +00:00
Chris Lattner
b7073c8c07 Add comment about ownership semantics
llvm-svn: 4859
2002-12-02 21:13:45 +00:00
Chris Lattner
9872f53512 Add stub to emit machine code for JIT
llvm-svn: 4856
2002-12-02 21:00:50 +00:00
Misha Brukman
32d007461d Added virtual functions for storing and retrieving values from the stack.
llvm-svn: 4824
2002-11-22 22:41:23 +00:00
Misha Brukman
45b9648b91 MRegisterInfo.h - Added prototypes for functions we need to map a register to
an appropriate TargetRegisterClass, also adds TargetRegisterClass definition.
TargetMachine.h - speling.

llvm-svn: 4781
2002-11-20 18:54:53 +00:00
Chris Lattner
e138d4fbc8 Make sure that print gets a targetmachine
CVS: ----------------------------------------------------------------------

llvm-svn: 4735
2002-11-17 23:21:45 +00:00
Chris Lattner
9971426ca0 Add machine independant printer interface
llvm-svn: 4729
2002-11-17 22:54:55 +00:00
Chris Lattner
19f27845eb * Add new "Target Specific Flags" field to instruction descriptor
* Rename iclass to Flags

llvm-svn: 4439
2002-10-30 01:06:53 +00:00
Chris Lattner
c7854f4c8f Add new optional getRegisterInfo to TargetMachine
llvm-svn: 4436
2002-10-30 00:53:02 +00:00
Chris Lattner
87eb530014 Eliminate virtual methods that are sparc specific
llvm-svn: 4419
2002-10-29 22:01:26 +00:00
Chris Lattner
5d798b7887 * Privatize the TargetName
* Move optSizeForSubWordData to TargetData
* Remove unused fields

llvm-svn: 4417
2002-10-29 21:48:17 +00:00
Chris Lattner
eec571dce8 Allow TargetMachine to refuse static code gen
llvm-svn: 4415
2002-10-29 21:12:46 +00:00
Chris Lattner
cc026ad4fc Rename Sparc.h to TargetMachineImpls.h. Add hook for X86 target
llvm-svn: 4412
2002-10-29 20:51:29 +00:00
Chris Lattner
8d372a1161 Add hook for JIT compiler
llvm-svn: 4411
2002-10-29 20:51:10 +00:00
Chris Lattner
16081ceef1 Move to TargetMachineImpls.h
llvm-svn: 4405
2002-10-29 20:44:18 +00:00
Chris Lattner
2859640d1c Merge to MachineInstrInfo.h
llvm-svn: 4402
2002-10-29 20:10:19 +00:00
Chris Lattner
b49e35e745 Move TargetInstrDescriptors extern to the one .cpp file that refers to it:
MachineInstr.cpp

llvm-svn: 4392
2002-10-29 17:40:30 +00:00
Chris Lattner
4c00b1bb14 Rename opCodeString to Name, add new getName() method
llvm-svn: 4388
2002-10-29 17:35:09 +00:00
Chris Lattner
4cb6ebc9a1 Rename MachineInstrInfo::getDescriptor to MachineInstrInfo::get
llvm-svn: 4387
2002-10-29 17:26:26 +00:00
Chris Lattner
8869c9be36 MachineInstrInfo doesn't need a TargetMachine member
llvm-svn: 4371
2002-10-29 15:44:40 +00:00
Chris Lattner
d5faf681bb Minor cleanups, remove noncopyable so dot doesn't cluster unrelated stuff
llvm-svn: 4365
2002-10-28 23:54:23 +00:00