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Commit Graph

143408 Commits

Author SHA1 Message Date
Ahmed Bougacha
2004f9b06a [TLI] Robustize SDAG proto checking by merging it into TLI.
SelectionDAGBuilder recognizes libfuncs using some homegrown
parameter type-checking.

Use TLI instead, removing another heap of redundant code.

This isn't strictly NFC, as the SDAG code was too lax.
Concretely, this means changes are required to two tests:
- calling a non-variadic function via a variadic prototype isn't OK;
  it just happens to work on x86_64 (but not on, e.g., aarch64).
- mempcpy has a size_t parameter;  the SDAG code accepts any integer
  type, which meant using i32 on x86_64 worked.

I don't think it's worth supporting either of these (IMO) broken
testcases.  Instead, fix them to be more correct.

llvm-svn: 292189
2017-01-17 03:10:06 +00:00
Ahmed Bougacha
c5c2e57ec2 [TLI] Add prototype checking for all remaining LibFuncs.
This is another step towards unifying all LibFunc prototype checks.
This work started in r267758 (D19469);  add the remaining checks.

Also add a unittest that checks each libfunc declared with a known-valid
and known-invalid prototype.  New libfuncs added in the future are
required to have prototype checking in place; the known-valid test will
fail otherwise.

Differential Revision: https://reviews.llvm.org/D28030

llvm-svn: 292188
2017-01-17 03:10:02 +00:00
Ahmed Bougacha
9b7fc4b339 [TLI] Alphabetize some of the prototype check switch. NFC.
llvm-svn: 292187
2017-01-17 03:10:00 +00:00
Ahmed Bougacha
bb16a66093 [unittests] Alphabetize cmake file list. NFC.
llvm-svn: 292186
2017-01-17 03:09:55 +00:00
Alexei Starovoitov
a70c585595 [bpf] error when BPF stack size exceeds 512 bytes
Signed-off-by: Alexei Starovoitov <ast@kernel.org>
llvm-svn: 292180
2017-01-17 01:05:17 +00:00
David Majnemer
b33ccfb48d [InstCombine] Fold ((C1-zext(X)) & C2) -> zext((C1-X) & C2)
This is valid if C2 fits within the bitwidth of X thanks to two's
complement modulo arithmetic.

llvm-svn: 292179
2017-01-17 00:45:57 +00:00
Matt Arsenault
a568a0d4a6 Add comment to test file I forgot to save
llvm-svn: 292178
2017-01-17 00:35:28 +00:00
Matt Arsenault
018a8adda0 SimplifyLibCalls: Remove checks for fabs
Use the intrinsic instead of emitting the libcall which
will be replaced by the intrinsic.

llvm-svn: 292176
2017-01-17 00:30:31 +00:00
Matt Arsenault
4212c78a62 AMDGPU: Remove dead pattern
This is the unsafe conversion pattern, but not guarded by
an unsafe math check. It is also already done in LegalizeDAG.

llvm-svn: 292173
2017-01-17 00:10:43 +00:00
Matt Arsenault
ccfb3dd68e SimplifyLibCalls: Replace fabs libcalls with intrinsics
Add missing fabs(fpext) optimzation that worked with the call,
and also fixes it creating a second fpext when there were multiple
uses.

llvm-svn: 292172
2017-01-17 00:10:40 +00:00
Davide Italiano
9226f41ce8 [Object] Fixup permissions of input files.
They just need to be read/dumped, so no need to set the exec
bit on any of them. NFCI, I guess.

llvm-svn: 292171
2017-01-16 23:28:58 +00:00
Davide Italiano
e3c5a63cbc [llvm-objdump] Dump PT_NOTE as part of -p.
PR: 31641
llvm-svn: 292170
2017-01-16 23:13:46 +00:00
Davide Italiano
29fe23ba32 [llvm-objdump] Dump PT_GNU_RELRO as part of -p.
PR: 31641
llvm-svn: 292169
2017-01-16 22:58:26 +00:00
Davide Italiano
38ce2ccec8 [llvm-objdump] Dump PT_OPENBSD_{BOOTDATA,RANDOMIZE,WXNEEDED}.
PR: 31641
llvm-svn: 292167
2017-01-16 22:01:41 +00:00
David Blaikie
8a7070d44f Add missing header to see if that clears up the build
llvm-svn: 292166
2017-01-16 21:40:08 +00:00
Simon Pilgrim
b3d302c9e0 [InstCombine][AVX] Tests showing missed opportunities to pass demanded elts through a permilpd/permilps shuffle mask
llvm-svn: 292165
2017-01-16 21:34:22 +00:00
Sanjay Patel
42a6eec5b2 [InstCombine] use m_APInt instead of faking it
llvm-svn: 292164
2017-01-16 21:24:41 +00:00
David Blaikie
b20ccc6bb9 Attempt to fix the MSVC build by using llvm::errc instead of std::errc
llvm-svn: 292163
2017-01-16 21:20:51 +00:00
Jan Vesely
5574abaf58 ADMGPU/EG,CM: Implement _noret global atomics
_RTN versions will be a lot more complicated

Differential Revision: https://reviews.llvm.org/D28067

llvm-svn: 292162
2017-01-16 21:20:13 +00:00
David Blaikie
e3ffa159db [XRay] Implement the llvm-xray graph subcommand
Here we define the `graph` subcommand which generates a graph from the function
call information and uses it to present the call information graphically with
additional annotations.

Reviewers: dblaikie, dberris

Differential Revision: https://reviews.llvm.org/D27243

llvm-svn: 292156
2017-01-16 20:36:26 +00:00
David Blaikie
d868b8d618 Attempt to workaround MSVC build issue where I suspect an enum class constant 0 is considered a possible null pointer
I can't reproduce this so far with web compilers, so throwing this at
the bots to see if it sticks.

llvm-svn: 292155
2017-01-16 20:28:59 +00:00
Tony Jiang
7cd663b80c [PowerPC] Expand ISEL instruction into if-then-else sequence.
Generally, the ISEL is expanded into if-then-else sequence, in some
cases (like when the destination register is the same with the true
or false value register), it may just be expanded into just the if
or else sequence.

llvm-svn: 292154
2017-01-16 20:12:26 +00:00
Sanjay Patel
4562644d26 [InstCombine] fix names in canEvaluateShiftedShift(); NFC
It's not clear what 'First' and 'Second' mean, so use 'Inner' and 'Outer'
to match foldShiftedShift() and add comments with formulas, so it's easier
to see what's going on.

llvm-svn: 292153
2017-01-16 20:05:26 +00:00
Sanjay Patel
ab8f315ba8 [InstCombine] use m_APInt to allow shift-shift folds for vectors with splat constants
Some existing 'FIXME' tests are still not folded because of splat holes in value tracking.

llvm-svn: 292151
2017-01-16 19:35:45 +00:00
Sanjay Patel
1ec279d94f [InstCombine] add tests to show missed vector folds; NFC
The shift-shift possibilities became easier to see after:
https://reviews.llvm.org/rL292145

llvm-svn: 292150
2017-01-16 19:23:34 +00:00
David Blaikie
84780cb8ae PR31650: Refer to enum constant when initializing llvm::None constant
llvm-svn: 292149
2017-01-16 18:48:52 +00:00
Justin Lebar
7ebc6e53b2 [NVPTX] Add blank line to NVPTXUsage.rst to appease the Sphinx.
Fixes:

  Warning, treated as error:
  /home/buildbot/llvm-build-dir/llvm-sphinx-docs/llvm/src/docs/NVPTXUsage.rst:333:
  ERROR: Error in "code-block" directive:
  maximum 1 argument(s) allowed, 17 supplied.

llvm-svn: 292148
2017-01-16 18:39:15 +00:00
Sanjay Patel
82cc9bfc00 [InstCombine] refactor shift-of-shift folds; NFCI
Reduces code duplication and makes it easier to extend these folds for vectors.

llvm-svn: 292145
2017-01-16 17:27:50 +00:00
Simon Pilgrim
cdda17446c [InstCombine][SSE] Tests showing missed opportunities to pass demanded elts through a packss/packus truncation
llvm-svn: 292144
2017-01-16 17:26:23 +00:00
Pavel Labath
f336e47681 [llvm-xray] Fix android build
std::to_string is not available in the android ndk. Using llvm::to_string
instead.

Committing as obvious.

llvm-svn: 292143
2017-01-16 16:38:23 +00:00
Chad Rosier
2b85e24119 [AArch64] Falkor supports Rounding Double Multiply Add/Subtract instructions.
Falkor only partially implements the ARMv8.1a extensions, so this patch
refactors the support for the SQRDML[A|S]H instruction into a separate
feature.

Differential Revision: https://reviews.llvm.org/D28681

llvm-svn: 292142
2017-01-16 16:28:43 +00:00
Daniel Sanders
9d4cd68ffa Revert r292132: [globalisel] Tablegen-erate current Register Bank Information'...
Several buildbots encountered a crash in tablegen when building this commit.
Reverting while I investigate the cause.

llvm-svn: 292136
2017-01-16 15:34:43 +00:00
Hal Finkel
90c52fd329 Fix use-after-free bug in AffectedValueCallbackVH::allUsesReplacedWith
When transferring affected values in the cache from an old value, identified by
the value of the current callback, to the specified new value we might need to
insert a new entry into the DenseMap which constitutes the cache. Doing so
might delete the current callback object. Move the copying logic into a new
function, a member of the assumption cache itself, so that we don't run into UB
should the callback handle itself be removed mid-copy.

Differential Revision: https://reviews.llvm.org/D28749

llvm-svn: 292133
2017-01-16 15:22:01 +00:00
Daniel Sanders
9102aa35bd [globalisel] Tablegen-erate current Register Bank Information
Summary:
Adds a RegisterBank tablegen class that can be used to declare the register
banks and an associated tablegen pass to generate the necessary code.

Reviewers: t.p.northover, ab, rovka, qcolombet

Subscribers: aditya_nandakumar, rengolin, kristof.beyls, vkalintiris, mgorny, dberris, llvm-commits, rovka

Differential Revision: https://reviews.llvm.org/D27338

llvm-svn: 292132
2017-01-16 15:20:43 +00:00
Tony Jiang
126ab16f24 Revert "[PowerPC] Expand ISEL instruction into if-then-else sequence."
This reverts commit 1d0e0374438ca6e153844c683826ba9b82486bb1.

llvm-svn: 292131
2017-01-16 15:01:07 +00:00
Simon Pilgrim
7522ab562f [SelectionDAG] Add knownbits support for BITREVERSE
llvm-svn: 292130
2017-01-16 14:49:26 +00:00
Tony Jiang
dc6e042270 [PowerPC] Expand ISEL instruction into if-then-else sequence.
Generally, the ISEL is expanded into if-then-else sequence, in some
cases (like when the destination register is the same with the true
or false value register), it may just be expanded into just the if
or else sequence.

llvm-svn: 292128
2017-01-16 14:43:12 +00:00
NAKAMURA Takumi
a9cea205d3 DWARFDebugInfoTest.cpp: Don't use ArrayRef with initializer. It was allocated locally.
llvm-svn: 292127
2017-01-16 14:33:37 +00:00
Simon Pilgrim
5136255171 [X86][SSE] Test showing missing BITREVERSE knownbits support
llvm-svn: 292118
2017-01-16 13:59:42 +00:00
Simon Dardis
055516f72f [mips] Correct c.cond.fmt instruction definition.
Permit explicit $fcc<X> operand in c.cond.fmt instruction.

Add c.cond.fmt to the MIPS to microMIPS instruction mapping table.

Check that $fcc1 - $fcc7 are unusable for MIPS-I to MIPS-III for
c.cond.fmt, bc1t, bc1f.

Reviewers: seanbruno, zoran.jovanovic, vkalintiris

Differential Revision: https://reviews.llvm.org/D24510

llvm-svn: 292117
2017-01-16 13:55:58 +00:00
Simon Pilgrim
a8edcf036b [SelectionDAG] Add support for BITREVERSE constant folding
We were relying on constant folding of the legalized instructions to do what constant folding we had previously

llvm-svn: 292114
2017-01-16 13:39:00 +00:00
Simon Pilgrim
bcca9b527d [X86][SSE] Tests showing missing BITREVERSE constant folding
llvm-svn: 292111
2017-01-16 13:18:07 +00:00
Simon Pilgrim
9d900b5f6e [InstCombine][SSE] Add DemandedElts support for PSHUFB instructions
Simplify a pshufb shuffle mask based on the elements of the mask that are actually demanded.

Differential Revision: https://reviews.llvm.org/D28745

llvm-svn: 292101
2017-01-16 11:30:41 +00:00
Craig Topper
9268856dc0 [X86] Merge the disassemblers handling of the different TYPE_RELs by getting the size information from the ENCODING field. NFCI
llvm-svn: 292096
2017-01-16 06:49:09 +00:00
Craig Topper
9079aa0ebe [X86] Reduce the number of operand 'types' the disassembler needs to deal with. NFCI
We were frequently checking for a list of types and the different types
conveyed no real information. So lump them together explicitly.

llvm-svn: 292095
2017-01-16 06:49:03 +00:00
Craig Topper
b3e35f8a6d [AVX-512] Teach the disassembler about all of the EVEX gather and scatter instructions.
llvm-svn: 292094
2017-01-16 05:44:33 +00:00
Craig Topper
ea790844cd [AVX-512] Begin giving the disassembler a way to recognize that VSIB is a different encoding than regular addressing modes.
This part first teaches it not to check error if EVEX.V2 is used by a VSIB instruction.

llvm-svn: 292093
2017-01-16 05:44:25 +00:00
Xin Tong
a3b9f48421 Fix typos. NFC
llvm-svn: 292092
2017-01-16 03:41:09 +00:00
Craig Topper
40215c50d7 [AVX-512] Add more gather/scatter encoding test cases.
llvm-svn: 292089
2017-01-16 00:58:20 +00:00
Craig Topper
87d810866c [AVX-512] Correct memory operand size for VPGATHERQPS and VPGATHERQD
with ZMM index. Similar for SCATTER and the prefetch gather and scatter
instructions.

Fixes PR31618.

llvm-svn: 292088
2017-01-16 00:55:58 +00:00