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Commit Graph

125441 Commits

Author SHA1 Message Date
Craig Topper
546717a76c [TableGen] Use range-based for loops. NFC
llvm-svn: 256539
2015-12-29 07:03:23 +00:00
James Y Knight
37bdf9ea3e [TrailingObjects] Dynamically realign under-aligned trailing objects.
Previously, the code enforced non-decreasing alignment of each trailing
type. However, it's easy enough to allow for realignment as needed, and
thus avoid the developer having to think about the possiblilities for
alignment requirements on all architectures.

(E.g. on Linux/x86, a struct with an int64 member is 4-byte aligned,
while on other 32-bit archs -- and even with other OSes on x86 -- it has
8-byte alignment. This sort of thing is irritating to have to manually
deal with.)

llvm-svn: 256533
2015-12-29 04:00:43 +00:00
James Y Knight
30e7ad8b6b Fix gold test after r256465.
That commit added a new pass, and this test is sensitive to what the
first pass after verify is called.

llvm-svn: 256532
2015-12-29 03:48:37 +00:00
Chandler Carruth
4693e391ce [ptr-traits] Merge the MetadataTracking helpers into the Metadata
header.

This is part of a series of patches to allow LLVM to check for complete
pointee types when computing its pointer traits. This is absolutely
necessary to get correct (or reproducible) results for things like how
many low bits are guaranteed to be zero.

The MetadataTracking helpers aren't actually independent. They rely on
constructing a PointerUnion between Metadata and MetadataAsValue
pointers, which requires know the alignment of pointers to those types
which requires them to be complete.

The .cpp file even defined a method declared in Metadata.h! These really
don't seem like something that is separable, and there is no real
layering problem with just placing them together.

llvm-svn: 256531
2015-12-29 02:14:50 +00:00
Chandler Carruth
d67d14bcb4 [ADT] Run clang-format over another file before I try to enhance it so
I don't commit the bug in r256518 again.

llvm-svn: 256530
2015-12-29 02:14:45 +00:00
Chandler Carruth
60283c96ef [ADT] Use a nonce type with at least 4 byte alignment.
We didn't actually statically check this, and so it worked 25% of the
time for me. =/ Really sorry it took so long to fix, I shouldn't leave
the commit log editor window open without saving and landing the commit.
=[

llvm-svn: 256528
2015-12-29 00:03:24 +00:00
Eric Christopher
5124e4e1f3 Accept dwarf version 5 for CIE versions.
llvm-svn: 256527
2015-12-28 23:02:42 +00:00
Artyom Skrobov
4f10d9b0f0 [Thumb] Fix assembler error 'cannot honor width suffix pop {lr}'
Summary:
* avoid generating POP {LR} in Thumb1 epilogues
* combine MOV LR, Rx + BX LR -> BX Rx in a peephole optimization pass
* combine POP {LR} + B + BX LR -> POP {PC} on v5T+

Test cases by Ana Pazos

Differential Revision: http://reviews.llvm.org/D15707

llvm-svn: 256523
2015-12-28 21:40:45 +00:00
Sanjay Patel
61b36ff574 [x86] lower calls to fmin and llvm.minnum.* using minss/minsd/minps/minpd (PR24475)
This is a follow-on to:
http://reviews.llvm.org/rL255700
http://reviews.llvm.org/rL256454
http://reviews.llvm.org/rL256510

llvm-svn: 256522
2015-12-28 21:16:55 +00:00
Easwaran Raman
efb03dbc75 Refactor inline costs analysis by removing the InlineCostAnalysis class
InlineCostAnalysis is an analysis pass without any need for it to be one.
Once it stops being an analysis pass, it doesn't maintain any useful state
and the member functions inside can be made free functions. NFC.

Differential Revision: http://reviews.llvm.org/D15701

llvm-svn: 256521
2015-12-28 20:28:19 +00:00
Manuel Jacob
b1de405597 [RS4GC] Fix rematerialization of bitcast of bitcast.
Summary:
Previously, only the outer (last) bitcast was rematerialized, resulting in a
use of the unrelocated inner (first) bitcast after the statepoint.  See the
test case for an example.

Reviewers: igor-laevsky, reames

Subscribers: reames, alex, llvm-commits, sanjoy

Differential Revision: http://reviews.llvm.org/D15789

llvm-svn: 256520
2015-12-28 20:14:05 +00:00
Elena Demikhovsky
3ed0b3c7f1 Implemented cost model for masked gather and scatter operations
The cost is calculated for all X86 targets. When gather/scatter instruction
is not supported we calculate the cost of scalar sequence.

Differential revision: http://reviews.llvm.org/D15677

llvm-svn: 256519
2015-12-28 20:10:59 +00:00
Chandler Carruth
37e9125e68 [ADT] Don't use a fixture just to get a nonce type for this unittest.
Instead, actually produce a nonce type in the test and use that. This
makes the test, IMO, both simpler and more clear.

llvm-svn: 256518
2015-12-28 20:03:16 +00:00
Eric Christopher
295a9d6bcd As a prelude to the rest of DWARF5 being supported go ahead and accept
version 5 in llvm-dwarfdump.

llvm-svn: 256515
2015-12-28 19:58:36 +00:00
Chandler Carruth
0641529155 [ADT] Run clang-format over more code, fixing numerous formatting
oddities.

llvm-svn: 256514
2015-12-28 19:54:36 +00:00
Chandler Carruth
61c4120a4f [ADT] Run clang-format over PointerUnion.h and clean up its comments.
NFC.

llvm-svn: 256513
2015-12-28 19:52:46 +00:00
Manuel Jacob
82359bb5a3 [vim] Add token type to Vim syntax file.
llvm-svn: 256512
2015-12-28 19:51:04 +00:00
Sanjay Patel
7785be794b [x86] lower calls to fmax and llvm.maxnum.* using maxps/maxpd (PR24475)
This is a follow-on to:
http://reviews.llvm.org/rL255700
http://reviews.llvm.org/rL256454

llvm-svn: 256510
2015-12-28 19:20:19 +00:00
Sanjay Patel
b0bbc45c40 Specify triple so 'make check' passes on darwin x86-64
The check lines were added with:
http://reviews.llvm.org/rL256458
http://reviews.llvm.org/rL256460

but on a darwin target, the output looks like:
  ## InlineAsm Start
  rorq  %rdi
  ## InlineAsm End
  ## InlineAsm Start
  rorq  %rsi
  ## InlineAsm End
  leaq  (%rsi,%rdi), %rax
  retq

llvm-svn: 256507
2015-12-28 18:28:44 +00:00
Sanjay Patel
9ffd44cf90 tidy up; NFC
llvm-svn: 256506
2015-12-28 18:18:22 +00:00
Roman Divacky
fa44452ed8 Support clrex instruction on ARMv6k. Patch by Andrew Turner.
llvm-svn: 256505
2015-12-28 17:47:23 +00:00
Alexander Kornienko
a8f8405138 Refactor: Simplify boolean conditional return statements in lib/Transforms/ObjCARC
Summary: Use clang-tidy to simplify boolean conditional return statements

Reviewers: craig.topper, bkramer, chandlerc, gottesmm

Subscribers: llvm-commits

Patch by Richard Thomson!

Differential Revision: http://reviews.llvm.org/D9999

llvm-svn: 256502
2015-12-28 16:19:08 +00:00
Alexander Kornienko
36e76bbf37 Refactor: Simplify boolean conditional return statements in llvm/lib/Support
Summary: Use clang-tidy to simplify boolean conditional return statements

Reviewers: rafael, bkramer, ddunbar, Bigcheese, chandlerc, chapuni, nicholas, alexfh

Subscribers: alexfh, craig.topper, llvm-commits

Patch by Richard Thomson!

Differential Revision: http://reviews.llvm.org/D9978

llvm-svn: 256500
2015-12-28 15:46:15 +00:00
Michael Kuperstein
ba0a393451 [X86] Better support for the MCU psABI (LLVM part)
This adds support for the MCU psABI in a way different from r251223 and r251224,
basically reverting most of these two patches. The problem with the approach
taken in r251223/4 is that it only handled libcalls that originated from the backend.
However, the mid-end also inserts quite a few libcalls and assumes these use the
platform's default calling convention.

The previous patch tried to insert inregs when necessary both in the FE and,
somewhat hackily, in the CG. Instead, we now define a new default calling convention
for the MCU, which doesn't use inreg marking at all, similarly to what x86-64 does.

Differential Revision: http://reviews.llvm.org/D15054

llvm-svn: 256494
2015-12-28 14:39:21 +00:00
Alexander Kornienko
c882727d66 Refactor: Simplify boolean conditional return statements in lib/Target/PowerPC
Summary: Use clang-tidy to simplify boolean conditional return statements

Reviewers: uweigand, rafael, wschmidt

Subscribers: craig.topper, llvm-commits

Patch by Richard Thomson!

Differential Revision: http://reviews.llvm.org/D9984

llvm-svn: 256493
2015-12-28 13:38:42 +00:00
Asaf Badouh
3e8d6828a0 [X86][AVX512] Lower broadcast sub vector to vector inrtrinsics
lower broadcast<type>x<vector> to shuffles.
 there are two cases:
1.src is 128 bits and dest is 512 bits: in this case we will lower it to shuffle with imm = 0.
2.src is 256 bit and dest is 512 bits: in this case we will lower it to shuffle with imm = 01000100b (0x44) that way we will broadcast the 256bit source: ymm[0,1,2,3] => zmm[0,1,2,3,0,1,2,3] then it will mask it with the passthru value (in case it's mask op).



Differential Revision: http://reviews.llvm.org/D15790

llvm-svn: 256490
2015-12-28 08:26:26 +00:00
Asaf Badouh
6fcb80c7ac [X86][AVX512] add fp scalar broadcast intrinsics
Differential Revision: http://reviews.llvm.org/D15790

llvm-svn: 256489
2015-12-28 08:09:25 +00:00
Craig Topper
228bc66bfc [AVX512] Remove VEX_LIG from vmovd/vmovq instructions. From what I can tell from the Intel docs these instructions require the L-bit to be 0.
llvm-svn: 256486
2015-12-28 06:32:47 +00:00
Craig Topper
a315cd0b1d [AVX512] Fix some places that used FR64 instead of FR64X.
llvm-svn: 256484
2015-12-28 06:11:45 +00:00
Craig Topper
cf3121d888 [AVX512] Bring vmovq instructions names into alignment with the AVX and SSE names. Add a missing encoding to disassembler and assembler.
I believe this also fixes a case where a 64-bit memory form that is documented as being unsupported in 32-bit mode was able to be selected there.

llvm-svn: 256483
2015-12-28 06:11:42 +00:00
Craig Topper
78232095c9 [X86] Move address for store target from outs to ins on a couple instructions.
llvm-svn: 256482
2015-12-28 06:11:39 +00:00
Craig Topper
bfdc4a3764 [X86] Add proper Uses/Defs/mayLoad flags for AAA/AAD/AAM/AAS/DAA/DAS/XLAT instructions.
llvm-svn: 256481
2015-12-28 06:11:37 +00:00
Chandler Carruth
57f828fd51 [lcg] Fix a few more formatting goofs found by clang-format. NFC.
llvm-svn: 256480
2015-12-28 01:54:20 +00:00
Chandler Carruth
a18e7dcea6 [lcg] Fix formatting errors found with clang-format, remove the now
optional '\brief' tag and reflow some comments based on the added
horizontal space. NFC.

llvm-svn: 256479
2015-12-28 01:54:18 +00:00
Craig Topper
e4e0592ca3 [AVX512] Remove separate instruction and patterns for lowering ctlz_zero_undef. Change the operation for CTLZ_ZERO_UNDEF to Expand so SelectionDAG will convert them to CTLZ before lowering.
llvm-svn: 256477
2015-12-27 21:33:50 +00:00
Craig Topper
ec0fd66634 [SelectionDAG] Teach LegalizeVectorOps to not unroll CTLZ_ZERO_UNDEF and CTTZ_ZERO_UNDEF if the non-ZERO_UNDEF form is legal or custom. Will be used to simplify X86 code in a follow on commit.
llvm-svn: 256476
2015-12-27 21:33:47 +00:00
Craig Topper
ce5014e9fe [AVX512] Remove alternate data type versions of VALIGND, VALIGNQ, VMOVSHDUP and VMOVSLDUP. They don't have any tests and I don't think they can be selected. If they are truly needed they should be implemented with patterns against the normal instructions and not separate instructions.
llvm-svn: 256475
2015-12-27 19:45:21 +00:00
Dan Liew
d6419a3e16 [lit] Implement support of per test timeout in lit.
This should work with ShTest (executed externally or internally) and GTest
test formats.

To set the timeout a new option ``--timeout=`` has
been added which specifies the maximum run time of an individual test
in seconds. By default this 0 which causes no timeout to be enforced.

The timeout can also be set from a lit configuration file by modifying
the ``lit_config.maxIndividualTestTime`` property.

To implement a timeout we now require the psutil Python module if a
 timeout is requested. This dependency is confined to the newly added
 ``lit.util.killProcessAndChildren()``. A note has been added into the
 TODO document describing how we can remove the dependency on the
 ``pustil`` module in the future. It would be nice to remove this
 immediately but that is a lot more work and Daniel Dunbar believes it is
better that we get a working implementation first and then improve it.

To avoid breaking the existing behaviour the psutil module will not be
imported if no timeout is requested.

The included testcases are derived from test cases provided by
 Jonathan Roelofs which were in an previous attempt to add a per test
 timeout to lit (http://reviews.llvm.org/D6584). Thanks Jonathan!

Reviewers: ddunbar, jroelofs, cmatthews, MatzeB

Subscribers: cmatthews, llvm-commits

Differential Revision: http://reviews.llvm.org/D14706

llvm-svn: 256471
2015-12-27 14:03:49 +00:00
Igor Breger
a848a96908 AVX512: Change VPMOVB2M DAG lowering , use CVT2MASK node instead TRUNCATE.
Fix TRUNCATE lowering vector to vector i1, use LSB and not MSB.
Implement VPMOVB/W/D/Q2M intrinsic.

Differential Revision: http://reviews.llvm.org/D15675

llvm-svn: 256470
2015-12-27 13:56:16 +00:00
Asaf Badouh
f94cbd0492 [X86][AVX512] change broadcast to use maskable pattern
Differential Revision: http://reviews.llvm.org/D15786

llvm-svn: 256469
2015-12-27 12:14:34 +00:00
Chandler Carruth
8beb86a806 [attrs] Extract the pure inference of function attributes into
a standalone pass.

There is no call graph or even interesting analysis for this part of
function attributes -- it is literally inferring attributes based on the
target library identification. As such, we can do it using a much
simpler module pass that just walks the declarations. This can also
happen much earlier in the pass pipeline which has benefits for any
number of other passes.

In the process, I've cleaned up one particular aspect of the logic which
was necessary in order to separate the two passes cleanly. It now counts
inferred attributes independently rather than just counting all the
inferred attributes as one, and the counts are more clearly explained.

The two test cases we had for this code path are both ... woefully
inadequate and copies of each other. I've kept the superset test and
updated it. We need more testing here, but I had to pick somewhere to
stop fixing everything broken I saw here.

Differential Revision: http://reviews.llvm.org/D15676

llvm-svn: 256466
2015-12-27 08:41:34 +00:00
Chandler Carruth
cf6f5436f5 [attrs] Split off the forced attributes utility into its own pass that
is (by default) run much earlier than FuncitonAttrs proper.

This allows forcing optnone or other widely impactful attributes. It is
also a bit simpler as the force attribute behavior needs no specific
iteration order.

I've added the pass into the default module pass pipeline and LTO pass
pipeline which mirrors where function attrs itself was being run.

Differential Revision: http://reviews.llvm.org/D15668

llvm-svn: 256465
2015-12-27 08:13:45 +00:00
Craig Topper
c79efd26f5 [AVX-512] Remove alernate integer forms for VPERMILPS and VPERMILPD. There no tests for them and I don't see any way to select them anyway. If they are really needed they should be implemented as patterns and not full fledged instructions.
llvm-svn: 256462
2015-12-27 06:55:08 +00:00
David Majnemer
b3f332af9b Make the test properly constrained
llvm-svn: 256460
2015-12-27 06:26:41 +00:00
NAKAMURA Takumi
908789394c InstrProfTest.cpp: Don't assume string literals are always merged.
MSC18 Debug didn't merge them.

FIXME: I tweaked just to appease a builder. Almost string literals should be addressed identically there.
llvm-svn: 256459
2015-12-27 06:18:57 +00:00
David Majnemer
15ba8464b4 Try to passify buildbot
llvm-svn: 256458
2015-12-27 06:18:48 +00:00
NAKAMURA Takumi
76584964f3 Prune the feature "tls". No one is using it since TLS is enabled for Cygwin.
llvm-svn: 256457
2015-12-27 06:14:33 +00:00
David Majnemer
38d1ffe261 [X86, Win64] Use a frame pointer if pushf is emitted
A frame pointer must be used if stack pointer is modified after the
prologue.  LLVM will emit pushf/popf if we need to save/restore the
FLAGS register, requiring us to have a frame pointer for the function.

There is a small twist: this sequence might exist in user code via
inline-assembly.  For now, conservatively assume that such functions
require a frame pointer.  For real world justification, please see
clang's implementation of __readeflags.

This fixes PR25945.

llvm-svn: 256456
2015-12-27 06:07:26 +00:00
David Majnemer
870f172298 [WinEH] Add comments explaining the EH tables
This is aids in debugging WinEH, similar functionality is present for
DWARF EH.

llvm-svn: 256455
2015-12-27 06:07:12 +00:00
Sanjay Patel
5cb4cfb9d6 [x86] lower calls to llvm.maxnum.v4f32 using maxps
This is a follow-on to:
http://reviews.llvm.org/rL255700

llvm-svn: 256454
2015-12-26 21:44:55 +00:00