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Author SHA1 Message Date
Reed Kotler
57455fdc7c Let rotr and bswap be handled by expansion for Mips16 since we don't 
have native instructions for this.

llvm-svn: 192207
 2013-10-08 17:32:33 +00:00
Andrew Kaylor
d7a81f88ad Removing unintended code block from lli 
llvm-svn: 192205
 2013-10-08 17:15:11 +00:00
Eric Christopher
033ddf451a Grammar. 
llvm-svn: 192199
 2013-10-08 16:47:11 +00:00
Rafael Espindola
b9b01ea30e Fix build on Solaris 11. 
Patch by Vladimir Voskresensky. The erros were:

Path.inc:274:3: error: ‘Dl_info’ was not declared in this scope
...

and

usr/include/spawn.h:52:14: error: expected ‘,’ or ‘...’ before ‘argv’

llvm-svn: 192185
 2013-10-08 16:12:58 +00:00
Rafael Espindola
9393b75d84 Only modify lto.exports.def when contents have changed. 
Patch by Greg Bedwell.

llvm-svn: 192182
 2013-10-08 15:07:00 +00:00
Rafael Espindola
6267c79fdb Add a MCTargetStreamer interface. 
This patch fixes an old FIXME by creating a MCTargetStreamer interface
and moving the target specific functions for ARM, Mips and PPC to it.

The ARM streamer is still declared in a common place because it is
used from lib/CodeGen/ARMException.cpp, but the Mips and PPC are
completely hidden in the corresponding Target directories.

I will send an email to llvmdev with instructions on how to use this.

llvm-svn: 192181
 2013-10-08 13:08:17 +00:00
NAKAMURA Takumi
f37e42a504 SparcJITInfo.cpp: Prune "default:" label to fix a warning. [-Wcovered-switch-default] 
llvm-svn: 192179
 2013-10-08 10:29:09 +00:00
NAKAMURA Takumi
18fc7c1446 Prune trailing linefeeds. 
llvm-svn: 192178
 2013-10-08 10:29:03 +00:00
Venkatraman Govindaraju
6abd2b0367 [Sparc] Implement JIT for SPARC. 
No new testcases. However, this patch makes all supported JIT testcases in 
test/ExecutionEngine  pass on Sparc.

llvm-svn: 192176
 2013-10-08 07:15:22 +00:00
Craig Topper
4c3cbfbbbc Remove unneeded MMX instruction definition by moving pattern to an equivalent instruction definition and removing the filtering from the disassembler table building. 
llvm-svn: 192175
 2013-10-08 06:30:39 +00:00
Craig Topper
2d70555027 Fix a typo in the mattr part of the run line. 
llvm-svn: 192174
 2013-10-08 06:12:26 +00:00
Craig Topper
3d7c6afb79 Explicitly disable AVX on a bunch of tests so they won't fail on AVX machines post r192171. 
llvm-svn: 192173
 2013-10-08 06:06:57 +00:00
Craig Topper
aa1a4d51f0 Remove some instructions that existed to provide aliases to the assembler. Can be done with InstAlias instead. Unfortunately, this was causing printer to use 'vmovq' or 'vmovd' based on what was parsed. To cleanup the inconsistencies convert all 'vmovd' with 64-bit registers to 'vmovq', but provide an alias so that 'vmovd' will still parse. 
llvm-svn: 192171
 2013-10-08 05:53:50 +00:00
Venkatraman Govindaraju
72515ccf89 [Sparc] Do not hardcode nop in the delay slot of TLS_CALL. Use DelaySlotFiller to fill the delay slot instead. 
llvm-svn: 192160
 2013-10-08 02:50:29 +00:00
Adrian Prantl
c584bc7266 typo. 
llvm-svn: 192158
 2013-10-08 02:30:54 +00:00
Adrian Prantl
82c328eb30 typo. 
llvm-svn: 192157
 2013-10-08 02:28:20 +00:00
Adrian Prantl
e399829d39 Reduce testcase from 1r92011. 
llvm-svn: 192156
 2013-10-08 02:21:44 +00:00
Nick Kledzik
53133391cd update mach-o EXPORT_SYMBOL_* names 
llvm-svn: 192151
 2013-10-08 00:59:13 +00:00
Hans Wennborg
8c515c229e cmake: don't set LLVM_COMPILER_IS_GCC_COMPATIBLE when using clang-cl 
Tip-of-tree CMake has become clang-cl aware [1]. In this case,
CMAKE_CXX_COMPILER_ID will still be Clang, but MSVC will be true.

[1] See http://cmake.org/gitweb?p=cmake.git;a=commitdiff;h=3d8356d4

llvm-svn: 192139
 2013-10-07 22:03:23 +00:00
David Majnemer
39a2e35dbc Windows: Avoiding resizing, use uninitialized data() instead 
This is ever-so faster but more importantly matches what we have elsewhere.

llvm-svn: 192137
 2013-10-07 21:57:07 +00:00
Akira Hatanaka
6c2bf15c93 [mips] Test case for r192124. 
llvm-svn: 192135
 2013-10-07 21:32:57 +00:00
Arnold Schwaighofer
bfe48b104a LoopVectorize: External uses must use the last value in a reduction cycle 
Otherwise, we don't perform operations that would have been performed on
the scalar version.

Fixes PR17498.

llvm-svn: 192133
 2013-10-07 21:05:43 +00:00
Reed Kotler
33301878d0 Add Mips16 patterns for sign extend byte and sign extend halfword. 
llvm-svn: 192130
 2013-10-07 20:46:19 +00:00
Manman Ren
b284db0070 Struct byval: use the correct alignment for loads generated to load 
from struct byval to registers.

We used to pass 0 which means the alignment of PtrVT. Even when the alignment
of the struct is smaller than 4, the LOADs would have alignment of 4, and
further optimizations could combine the LOADs into a ldm, which would
cause crash.

The fix is to pass the alignment of the struct byval.

rdar://problem/15144402

llvm-svn: 192126
 2013-10-07 19:47:53 +00:00
Akira Hatanaka
f21023f5c6 [mips] Coding style clean up. 
llvm-svn: 192125
 2013-10-07 19:33:02 +00:00
Akira Hatanaka
5954578b3c [mips] Disable tail merging when long branch pass is enabled. 
llvm-svn: 192124
 2013-10-07 19:13:53 +00:00
Benjamin Kramer
feace9b737 X86: Fix type check. Just because an integer type is illegal doesn't mean it's i64. 
Fixes PR17495, where an i24 triggered this code. It's intended to
optimize i64 loads on 32 bit x86.

llvm-svn: 192123
 2013-10-07 19:11:35 +00:00
Akira Hatanaka
535ef5516d [mips] Define method MipsSubtarget::enableLongBranchPass. 
llvm-svn: 192122
 2013-10-07 19:06:57 +00:00
Alexey Samsonov
a04533615d Revert r191834 until we measure the effect of this benchmarks and maybe find a better way to fix it 
llvm-svn: 192121
 2013-10-07 19:03:24 +00:00
Akira Hatanaka
da64382f71 [mips] Fix definition of mfhi and mflo instructions to read from the whole 
accumulator instead of its sub-registers, $hi and $lo. 

We need this change to prevent a mflo following a mtlo from reading an
unpredictable/undefined value, as shown in the following example:

mult $6, $7 // result of $6 * $7 is written to $lo and $hi.
mflo $2     // read lower 32-bit result from $lo.
mtlo $4     // write to $lo. the content of $hi becomes unpredictable.
mfhi $3     // read higher 32-bit from $hi, which has an unpredictable value.

I don't have a test case for this change that reliably reproduces the problem.

llvm-svn: 192119
 2013-10-07 18:49:46 +00:00
Richard Mitton
560c7ced61 Formally added an explicit enum for DWARF TLS support. No functionality change. 
llvm-svn: 192118
 2013-10-07 18:39:18 +00:00
Matt Arsenault
9c8541d286 Change objectsize intrinsic to accept different address spaces. 
Bitcasting everything to i8* won't work. Autoupgrade the old
intrinsic declarations to use the new mangling.

llvm-svn: 192117
 2013-10-07 18:06:48 +00:00
Amara Emerson
688cdc2151 [ARM] Improve build attributes emission. 
llvm-svn: 192111
 2013-10-07 16:55:23 +00:00
Chad Rosier
128d9134e7 [AArch64] Add support for NEON scalar arithmetic instructions: 
SQDMULH, SQRDMULH, FMULX, FRECPS, and FRSQRTS.

llvm-svn: 192107
 2013-10-07 16:36:15 +00:00
Joey Gouly
3ecfaf19bb [ARMv8] Add some disassembly tests for Thumb sevl/sevl.w 
llvm-svn: 192106
 2013-10-07 16:13:03 +00:00
NAKAMURA Takumi
4e9fc11644 Revert r191088, corresponding to r191823 to re-enable llvm-lto on cygming. 
r191088 is "llvm/tools/Makefile: Suppress building llvm-lto on cygming, for now, probably due to LTO.dll."

llvm-svn: 192104
 2013-10-07 15:42:22 +00:00
NAKAMURA Takumi
e7cfbb5fd1 Windows/Process.inc: Fix for +Asserts. &Buf[0] is not guaranteed if size is zero. 
llvm-svn: 192103
 2013-10-07 15:33:30 +00:00
Rafael Espindola
7630608c08 Fix typo. 
Thanks to Sean Silva for noticing it.

llvm-svn: 192102
 2013-10-07 13:57:59 +00:00
Rafael Espindola
ced9b42fb2 Remove dead code. 
Support for exception handling in the legacy JIT was removed in r181354 and
this code was dead since then.

Thanks to Yaron Keren for noticing it.

llvm-svn: 192101
 2013-10-07 13:54:50 +00:00
Rafael Espindola
e60c3625e3 Remove getEHExceptionRegister and getEHHandlerRegister. 
They haven't been used for a long time. Patch by MathOnNapkins.

llvm-svn: 192099
 2013-10-07 13:39:22 +00:00
Rafael Espindola
f1f200291c Fix the documentation of getDefaultSubtargetFeatures. 
Patch by David Nadlinger.

llvm-svn: 192098
 2013-10-07 13:34:05 +00:00
Tim Northover
1979375a30 ARM: allow cortex-m0 to use hint instructions 
The hint instructions ("nop", "yield", etc) are mostly Thumb2-only, but have
been ported across to the v6M architecture. Fortunately, v6M seems to sit
nicely between v6 (thumb-1 only) and v6T2, so we can add a feature for it
fairly easily.

rdar://problem/15144406

llvm-svn: 192097
 2013-10-07 11:10:47 +00:00
David Majnemer
14815ac119 Windows: Be more explicit with Win32 APIs 
This addresses several issues in a similar vein:
 - Use the Unicode APIs when possible, running nm on clang shows that we
   only use Unicode APIs except for FormatMessage, CreateSemaphore, and
   GetModuleHandle.  AFAICT, the latter two are coming from MinGW and
   not LLVM itself.
 - Make getMainExecutable more resilient.  It previously considered
   return values of zero from ::GetModuleFileNameA to be acceptable.

llvm-svn: 192096
 2013-10-07 09:52:36 +00:00
Simon Atanasyan
724835dff7 [Mips] Teach llvm-readobj to print MIPS-specific ELF program headers. 
The patch reviewed by Michael Spencer.
http://llvm-reviews.chandlerc.com/D1846

llvm-svn: 192093
 2013-10-07 08:58:27 +00:00
Craig Topper
6e389a510f Remove some instructions that seem to only exist to trick the filtering checks in the disassembler table creation. Just fix up the filter to let the real instruction through instead. 
llvm-svn: 192090
 2013-10-07 07:19:47 +00:00
Craig Topper
0c3bbe0644 Remove FsMOVAPSrr and friends. They have no patterns and are no longer selected anywhere. 
llvm-svn: 192089
 2013-10-07 06:10:45 +00:00
Craig Topper
4a7ff81d5f Teach X86 asm parser that VMOVAPSrr and other VEX-encoded register to register moves should be switched from using the MRMSrcReg form to the MRMDestReg form if the source register is a 64-bit extended register and the destination register is not. 
This allows the instruction to be encoded using the 2-byte VEX form instead of the 3-byte VEX form. The GNU assembler has similar behavior and instruction selection already does this.

llvm-svn: 192088
 2013-10-07 05:42:48 +00:00
Craig Topper
b5918acf04 Add disassembler support for long encodings for INC/DEC in 32-bit mode. 
llvm-svn: 192086
 2013-10-07 04:28:06 +00:00
David Majnemer
689b358b16 Revert "Revert "Windows: Add support for unicode command lines"" 
This reverts commit r192070 which reverted r192069, I forgot to
regenerate the configure scripts.

llvm-svn: 192079
 2013-10-07 01:00:07 +00:00
Craig Topper
1d2f42a3c2 Fix some assert messages to say the correct opcode name. Looks like one assert got copy and pasted to many places. 
llvm-svn: 192078
 2013-10-06 22:38:19 +00:00