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5511 Commits

Author SHA1 Message Date
Chris Lattner
59947dda25 Force 64-bit register availability in 64-bit mode. For real. 
llvm-svn: 28837
 2006-06-16 20:05:06 +00:00
Chris Lattner
126464b577 Remove the -darwin and -aix llc options, inferring darwinism and aixism from 
the target triple & subtarget info.  woo.

llvm-svn: 28835
 2006-06-16 18:50:48 +00:00
Chris Lattner
6a9ec7e80e Don't pass target name into TargetData anymore, it is never used or needed. 
Remove explicit casts to std::string now that there is no overload resolution
issues in the TargetData ctors.

llvm-svn: 28830
 2006-06-16 18:22:52 +00:00
Chris Lattner
9fcdb0d7e5 Remove ctor with each piece specifyable (which causes overload ambiguities), 
add a new init method.

llvm-svn: 28828
 2006-06-16 18:11:26 +00:00
Chris Lattner
19680a4928 Document the subtarget features better, make sure that 64-bit mode, 64-bit 
support, and 64-bit register use are all consistent with each other.

Add a new "IsPPC" feature, to distinguish ppc32 vs ppc64 targets, use this
to configure TargetData differently.  This not makes ppc64 blow up on lots
of stuff :)

llvm-svn: 28825
 2006-06-16 17:50:12 +00:00
Chris Lattner
fa884ac11b Rename some subtarget features. A CPU now can *have* 64-bit instructions, 
can in 32-bit mode we can choose to optionally *use* 64-bit registers.

llvm-svn: 28824
 2006-06-16 17:34:12 +00:00
Chris Lattner
aeb5a015cd First baby step towards ppc64 support. This adds a new -march=ppc64 backend 
that is currently just like ppc32 :)

llvm-svn: 28813
 2006-06-16 01:37:27 +00:00
Chris Lattner
4c7ba81f59 Add a note that Nate noticed. 
llvm-svn: 28808
 2006-06-15 21:33:31 +00:00
Jim Laskey
849c76e55c 1. Support standard dwarf format (was bootstrapping in Apple format.) 
2. Add vector support.

llvm-svn: 28807
 2006-06-15 20:51:43 +00:00
Evan Cheng
cc433bd065 Vector extract / insert index operand should have ptr type. 
llvm-svn: 28798
 2006-06-15 08:19:05 +00:00
Evan Cheng
32feafd76c Type of extract_element index operand should be iPTR. 
llvm-svn: 28797
 2006-06-15 08:18:06 +00:00
Evan Cheng
bc79e5f0e4 Type of vector extract / insert index operand should be iPTR. 
llvm-svn: 28796
 2006-06-15 08:14:54 +00:00
Evan Cheng
0e2235b803 X86 call instructions can take variable number of operands. Parameters of 
vector types are passed via XMM registers.

llvm-svn: 28789
 2006-06-14 22:24:55 +00:00
Chris Lattner
20c3c42c02 add a note 
llvm-svn: 28787
 2006-06-14 21:26:18 +00:00
Evan Cheng
242ebc9ab3 Add argument registers to the end of call operand list (partial fix). 
llvm-svn: 28783
 2006-06-14 18:17:40 +00:00
Jim Laskey
69d5018a05 Place dwarf headers at earliest possible point. Well behaved when skipping 
functions.

llvm-svn: 28781
 2006-06-14 11:35:03 +00:00
Andrew Lenharth
2263835c1d I am sure I had commited this workaround before. Perhaps soon I should sort it all out 
llvm-svn: 28772
 2006-06-13 20:34:47 +00:00
Andrew Lenharth
a903a21a85 It really helps to be returning to the correct place 
llvm-svn: 28769
 2006-06-13 18:27:39 +00:00
Chris Lattner
bbbcb8cceb Port some bugfixes in shift handling from SimplifyDemandedBits over to 
ComputeMaskedBits.  DemandedMasks and KnownZero/One masks should never have
bits set out of the range of the base datatype.

llvm-svn: 28768
 2006-06-13 16:52:37 +00:00
Jim Laskey
c9a71e96ae TargetLowering::ComputeMaskedBits was not clearing reciprocal bits on shifts. 
llvm-svn: 28765
 2006-06-13 13:08:58 +00:00
Evan Cheng
2a0f3b2e79 Cygwin support: use _alloca to allocate stack if > 4k. Patch by Anton Korobeynikov. 
llvm-svn: 28764
 2006-06-13 05:14:44 +00:00
Chris Lattner
6f45959365 Gaar! Don't use r11 for CR save/restore, use R0. R11 can be register 
allocated, thus live across the save/reload.  This fixes

llc-beta /MultiSource/Applications/spiff/spiff
llc-beta /MultiSource/Benchmarks/sim/sim:
llc-beta /MultiSource/Benchmarks/Ptrdist/bc/bc
llc-beta /MultiSource/Benchmarks/McCat/12-IOtest/iotest:
llc-beta /MultiSource/Benchmarks/FreeBench/fourinarow/fourinarow
llc-beta /MultiSource/Benchmarks/Fhourstones-3.1/fhourstones3.1
llc-beta /MultiSource/Benchmarks/mediabench/adpcm/rawdaudio/rawdaudio
llc-beta /MultiSource/Benchmarks/mediabench/adpcm/rawcaudio/rawcaudio
llc-beta /MultiSource/Benchmarks/mediabench/g721/g721encode/encode
llc-beta /MultiSource/Benchmarks/mediabench/jpeg/jpeg-6a/cjpeg

and probably others, with -regalloc=local.

llvm-svn: 28761
 2006-06-12 23:59:16 +00:00
Chris Lattner
93ed4373c4 Fix spilling and reloading of CR regs to reload the right values. This fixes 
Olden/power (and probably others) with -regalloc=local.

llvm-svn: 28760
 2006-06-12 21:50:57 +00:00
Andrew Lenharth
fe127f3de7 Let the alpha breakage begin. First Formals and RET. next Calls 
llvm-svn: 28753
 2006-06-12 18:09:24 +00:00
Andrew Lenharth
a2bda5b0e1 Start on my todo list 
llvm-svn: 28752
 2006-06-12 16:07:18 +00:00
Rafael Espindola
bcba226a99 lower more then 4 formal arguments. The offset is currently hard coded. 
implement SelectFrameIndex

llvm-svn: 28751
 2006-06-12 12:28:08 +00:00
Chris Lattner
7bc8eae1f0 Work around a nasty tblgen bug where it doesn't add operands for varargs 
nodes correctly.

llvm-svn: 28745
 2006-06-10 01:15:02 +00:00
Chris Lattner
b231c3d11c Fix a problem exposed by the local allocator. CALL instructions are not marked 
as using incoming argument registers, so the local allocator would clobber them
between their set and use.  To fix this, we give the call instructions a variable
number of uses in the CALL MachineInstr itself, so live variables understands
the live ranges of these register arguments.

llvm-svn: 28744
 2006-06-10 01:14:28 +00:00
Evan Cheng
9e5e585c89 Comments to appease sabre. 
llvm-svn: 28737
 2006-06-09 06:25:10 +00:00
Evan Cheng
8f46dba83d Minor compilation speed improvement. 
llvm-svn: 28736
 2006-06-09 06:24:42 +00:00
Chris Lattner
82b121e762 Add support for "m" inline asm constraints. 
llvm-svn: 28728
 2006-06-08 18:03:49 +00:00
Evan Cheng
2da9d803a4 Added X86FunctionInfo subclass of MachineFunction to record whether the 
function that is being lowered is forced to use FP. Currently this is only
true for main() / Cygwin.

llvm-svn: 28703
 2006-06-06 23:30:24 +00:00
Chris Lattner
3dbb345389 Now that PR633 is implemented, the CBE can know to emit _setjmp/_longjmp 
when available.  This speeds up hexxagon from 18.61s to 16.61s with the CBE on
PPC Mac OS (for reference, LLC is 15.48s and GCC is 23.35s).

llvm-svn: 28697
 2006-06-06 21:45:47 +00:00
Chris Lattner
bfbee64ecf Add PowerPC intrinsics to support dcbz[l] 
llvm-svn: 28696
 2006-06-06 21:29:23 +00:00
Rafael Espindola
42375303a6 add R0 to liveout 
expand "ret null" (implements test/Regression/CodeGen/ARM/ret_void.ll)
note that a Flag link is missing between the copy and the branch

llvm-svn: 28691
 2006-06-05 22:26:14 +00:00
Evan Cheng
8d9b7650f1 A few new entries. 
llvm-svn: 28683
 2006-06-04 09:08:00 +00:00
Evan Cheng
6fd191494f Be consistent with gcc. 
llvm-svn: 28682
 2006-06-04 07:24:07 +00:00
Andrew Lenharth
813c3dcf58 ignore ordered/unordered for now 
llvm-svn: 28679
 2006-06-04 00:25:51 +00:00
Evan Cheng
696779cea0 Cygwin support. Patch by Anton Korobeynikov! 
llvm-svn: 28672
 2006-06-02 22:38:37 +00:00
Evan Cheng
ddb0525a32 Use xor to clear a register. 
llvm-svn: 28667
 2006-06-02 21:20:34 +00:00
Evan Cheng
ed96100b00 Incorrect AT&T opcode. 
llvm-svn: 28666
 2006-06-02 21:09:10 +00:00
Chris Lattner
d14d882c4a Add mingw support, patch contributed by Anton 
llvm-svn: 28661
 2006-06-02 18:54:01 +00:00
Chris Lattner
1d2618c6c7 Silence -pedantic warning 
llvm-svn: 28633
 2006-06-01 17:17:06 +00:00
Chris Lattner
ac3d91f023 Silence -pedantic warning. 
llvm-svn: 28630
 2006-06-01 17:13:10 +00:00
Evan Cheng
4966cad9b5 Typos 
llvm-svn: 28617
 2006-06-01 05:53:27 +00:00
Reid Spencer
4b26f88ec9 For PR786: 
Don't warn about -pedantic errors. Add a note to the PR instead.

llvm-svn: 28616
 2006-06-01 05:49:51 +00:00
Reid Spencer
cf025eb201 For PR786: 
Turn -pedantic and -Wno-long-long compile flags on by default. In a few
places, avoid the warnings by removing these options in the local makefile.
One notable exception: lib/Target/CBackend/Writer.cpp. These warnings are
left on as a reminder to developers to clean them up.

llvm-svn: 28614
 2006-06-01 01:55:21 +00:00
Reid Spencer
94a443bb29 Use archive libraries instead of object files for VMCore, BCReader, 
BCWriter, and bzip2 libraries. Adjust the various makefiles to accommodate
these changes. This was done to speed up link times.

llvm-svn: 28610
 2006-06-01 01:30:27 +00:00
Evan Cheng
15c1f84762 Remove a warning 
llvm-svn: 28607
 2006-06-01 00:30:39 +00:00
Evan Cheng
4488266c46 Rename ASM modifier trunc8, trunc16 to subreg8, subreg16. 
llvm-svn: 28606
 2006-05-31 22:34:26 +00:00