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Commit Graph

183283 Commits

Author SHA1 Message Date
John McCall
5b6ef04ee6 Guard dumps in the coro intrinsic validation logic behind NDEBUG checks. dump() is not guaranteed to be defined in all builds.
llvm-svn: 368790
2019-08-14 03:53:31 +00:00
John McCall
5ad355756d Generalize llvm.coro.suspend.retcon to allow an arbitrary number of arguments to be passed back to the continuation function.
llvm-svn: 368789
2019-08-14 03:53:26 +00:00
John McCall
3f8b48091d Extend coroutines to support a "returned continuation" lowering.
A quick contrast of this ABI with the currently-implemented ABI:

- Allocation is implicitly managed by the lowering passes, which is fine
  for frontends that are fine with assuming that allocation cannot fail.
  This assumption is necessary to implement dynamic allocas anyway.

- The lowering attempts to fit the coroutine frame into an opaque,
  statically-sized buffer before falling back on allocation; the same
  buffer must be provided to every resume point.  A buffer must be at
  least pointer-sized.

- The resume and destroy functions have been combined; the continuation
  function takes a parameter indicating whether it has succeeded.

- Conversely, every suspend point begins its own continuation function.

- The continuation function pointer is directly returned to the caller
  instead of being stored in the frame.  The continuation can therefore
  directly destroy the frame when exiting the coroutine instead of having
  to leave it in a defunct state.

- Other values can be returned directly to the caller instead of going
  through a promise allocation.  The frontend provides a "prototype"
  function declaration from which the type, calling convention, and
  attributes of the continuation functions are taken.

- On the caller side, the frontend can generate natural IR that directly
  uses the continuation functions as long as it prevents IPO with the
  coroutine until lowering has happened.  In combination with the point
  above, the frontend is almost totally in charge of the ABI of the
  coroutine.

- Unique-yield coroutines are given some special treatment.

llvm-svn: 368788
2019-08-14 03:53:17 +00:00
Joel E. Denny
5944e43c94 [FileCheck] Document FILECHECK_OPTS in -help
Reviewed By: thopre

Differential Revision: https://reviews.llvm.org/D65707

llvm-svn: 368787
2019-08-14 02:56:20 +00:00
Joel E. Denny
86f2b361a4 [FileCheck] Move -dump-input diagnostic to first line
Without this patch, `-dump-input` prints a diagnostic at the end of
its marker range.  For example:

```
         1: Start.
check:1     ^~~~~~
         2: Bad.
next:2      X~~~
         3: Many lines
next:2      ~~~~~~~~~~
         4: of input.
next:2      ~~~~~~~~~
         5: End.
next:2      ~~~~ error: no match found
```

This patch moves it to the beginning like this:

```
         1: Start.
check:1     ^~~~~~
         2: Bad.
next:2      X~~~ error: no match found
         3: Many lines
next:2      ~~~~~~~~~~
         4: of input.
next:2      ~~~~~~~~~
         5: End.
next:2      ~~~~
```

The former somehow looks nicer because the diagnostic doesn't appear
to be somewhere within the marker range.  However, the latter is more
practical, especially when the marker range includes the remainder of
a very long dump.  First, in the case of an error, this patch enables
me to search the dump for `error:` and usually immediately land where
the detected error began.  Second, when trying to follow FileCheck's
logic, it's best to read top down, so this patch enables me to see
each diagnostic as soon as I encounter its marker.

Reviewed By: thopre

Differential Revision: https://reviews.llvm.org/D65702

llvm-svn: 368786
2019-08-14 02:56:09 +00:00
Aditya Nandakumar
241712c5aa [GlobalISel]: Fix lowering of G_Shuffle_vector where we pick up the wrong source index
https://reviews.llvm.org/D66182

llvm-svn: 368781
2019-08-14 01:23:33 +00:00
Amara Emerson
8617c6d207 [AArch64][GlobalISel] RBS: Treat s128s like vectors when unmerging.
The destinations should be FPRs (for now).

Differential Revision: https://reviews.llvm.org/D66184

llvm-svn: 368775
2019-08-13 23:51:20 +00:00
Eli Friedman
6b0256e657 [AArch64] Remove incorrect usage of MONonTemporal.
This has no effect at the moment, but might matter if we try to
implement non-temporal loads in the future.

llvm-svn: 368770
2019-08-13 23:12:14 +00:00
Lang Hames
8673c314b4 [ORC] Fix SpeculativeJIT example code broken by r368707.
llvm-svn: 368764
2019-08-13 22:44:54 +00:00
Jessica Paquette
d09bc24891 Attempt to fix issue with unresolved lit test in TableGen
Build bots are unhappy about the Common directory.

Add an excludes list to lit.local.cfg.

llvm-svn: 368760
2019-08-13 22:32:26 +00:00
Alex Langford
88fae211c4 [NFCI] Explicitly provide user-defined constructor for SectionRef
I am changing this to work around an issue that is being hit when
building with clang 3.8. Specifically, clang 3.8 requires that we have a user
defined default constructor for SectionRef for the default initialization of a
const SectionRef.

llvm-svn: 368758
2019-08-13 22:16:18 +00:00
Jessica Paquette
582c860a72 [GlobalISel][NFC] Factor out common target code from GlobalISelEmitterTests
Factor out commonly-used target code from the GlobalISelEmitter tests into
a GlobalISelEmitterCommon.td file. This is tested by the original
GlobalISelEmitter.td test.

This reduces the amount of boilerplate code necessary for tests like this.

Differential Revision: https://reviews.llvm.org/D65777

llvm-svn: 368757
2019-08-13 22:14:37 +00:00
Douglas Yung
ec89908f0e Relax opcode checks in test to check for only a number instead of a specific number.
llvm-svn: 368756
2019-08-13 22:05:18 +00:00
Aditya Nandakumar
5b8b42ce04 [GlobalISel]: Fix lowering of G_SHUFFLE_VECTOR with scalar sources
https://reviews.llvm.org/D66171

llvm-svn: 368753
2019-08-13 21:49:11 +00:00
Mark Lacey
5e891ca47b [GISel] Pass MachineRegisterInfo by const reference to matcher.
Summary: NFC.

Reviewers: aditya_nandakumar, volkan

Subscribers: llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D65971

llvm-svn: 368747
2019-08-13 21:17:14 +00:00
Xiangling Liao
8dbb0ebd5b [AIX]Lowering global address for 32/64bit small/large code models
This patch implements global address lowering for 32/64 bit with small/large code models.
    1.For 32bit large code model on AIX, there are newly added pseudo opcode LWZtocL & ADDIStocHA32, the support of which on MC layer will be
       provided by future patches.
    2.The default code model on AIX should be small code model.
    3.Since AIX does not have medium code model, "report_fatal_error" when users specify it.

    Differential Revision: https://reviews.llvm.org/D63547

llvm-svn: 368744
2019-08-13 20:29:01 +00:00
Lang Hames
b3e487c277 [ORC] Fix BuildingAJIT tutorial code broken by r368707.
llvm-svn: 368740
2019-08-13 19:38:52 +00:00
Tim Renouf
b8b095bfbc [AMDGPU] Fix to 'Fold readlane from copy of SGPR or imm'
That change (r363670) could leave a copy from vgpr to sgpr. Fixed.

Differential Revision: https://reviews.llvm.org/D66133

Change-Id: I00c3fe6fda2e8e1e36f53195b881b1449c777ea4
llvm-svn: 368736
2019-08-13 18:57:55 +00:00
David Green
e4faf73955 [ARM] Add MVE beats vector cost model
The MVE architecture has the idea of "beats", where a vector instruction can be
executed over several ticks of the architecture. This adds a similar system
into the Arm backend cost model, multiplying the cost of all vector
instructions by a factor.

This factor essentially becomes the expected difference between scalar code
and vector code, on average. MVE Vector instructions can also overlap so the a
true cost of them is often lower. But equally scalar instructions can in some
situations be dual issued, or have other optimisations such as unrolling or
make use of dsp instructions. The default is chosen as 2. This should not
prevent vectorisation is a most cases (as the vector instructions will still be
doing at least 4 times the work), but it will help prevent over vectorising in
cases where the benefits are less likely.

This adds things so far to the obvious places in ARMTargetTransformInfo, and
updates a few related costs like not treating float instructions as cost 2 just
because they are floats.

Differential Revision: https://reviews.llvm.org/D66005

llvm-svn: 368733
2019-08-13 18:12:08 +00:00
Wenlei He
2b7cf1e1b8 [llvm-profdata] Profile dump for compact binary format
Summary: Fix "llvm-profdata show" so it can work with compact binary format profile. The change is to mark all functions "used" so SampleProfileReaderCompactBinary::read will read in all profiles available for dumping. The function names will be MD5 hash for compact binary format.

Reviewers: wmi, davidxl, danielcdh

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D65162

llvm-svn: 368731
2019-08-13 17:56:08 +00:00
Steven Wu
a25e636ce4 [AutoUpgrader] Make ArcRuntime Autoupgrader more conservative
Summary:
This is a tweak to r368311 and r368646 which auto upgrades the calls to
objc runtime functions to objc runtime intrinsics, in order to make sure
that the auto upgrader does not trigger with up-to-date bitcode.

It is possible for bitcode that is up-to-date to contain direct calls to
objc runtime function and those are not inserted by compiler as part of
ARC and they should not be upgraded. Now auto upgrader only triggers as
when the old style of ARC marker is used so it is guaranteed that it
won't trigger on update-to-date bitcode.

This also means it won't do this upgrade for bitcode from llvm-8 and
llvm-9, which preserves the behavior of those releases. Ideally they
should be upgraded as well but it is more important to make sure
AutoUpgrader will not trigger on up-to-date bitcode.

Reviewers: ahatanak, rjmccall, dexonsmith, pete

Reviewed By: dexonsmith

Subscribers: hiraditya, jkorous, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D66153

llvm-svn: 368730
2019-08-13 17:52:21 +00:00
David Bolvansky
dc08001f42 [NFC] Fixed test
llvm-svn: 368729
2019-08-13 17:51:28 +00:00
Heejin Ahn
c7daa7fe6e Use Register over unsigned in LateEHPrepare (NFC)
Summary:
While D65962 is pending for review, I landed D65475 that added one more
use of `unsigned`. Changed it to `Register`.

Reviewers: dsanders

Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D66064

llvm-svn: 368727
2019-08-13 17:35:44 +00:00
Jordan Rupprecht
465368d786 [util] Allow callsigns when running git llvm revert
llvm-svn: 368726
2019-08-13 17:19:53 +00:00
David Bolvansky
4906722a6c [SimplifyLibCalls] Add noalias from known callsites
Summary:
Should be fine for memcpy, strcpy, strncpy.


Reviewers: jdoerfert, efriedma

Reviewed By: jdoerfert

Subscribers: uenoku, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D66135

llvm-svn: 368724
2019-08-13 17:18:46 +00:00
Nikita Popov
965480b790 [ValueTracking] Improve reverse assumption inference
Use isGuaranteedToTransferExecutionToSuccessor() instead of
isSafeToSpeculativelyExecute() when seeing whether we can propagate
the information in an assume backwards in isValidAssumeForContext().
The latter is more general - it also allows arbitrary loads/stores -
and is also the condition we want: if our assume is guaranteed to
execute, its condition not holding would be UB.

Original patch by arielb1.

Differential Revision: https://reviews.llvm.org/D37215

llvm-svn: 368723
2019-08-13 17:15:42 +00:00
David Bolvansky
1ee0df9a22 [NFC] Revisited/updated tests
llvm-svn: 368722
2019-08-13 17:07:02 +00:00
Hubert Tong
9a733a7710 Reland r368691: "[AIX] Implement LR prolog/epilog save/restore"
Trying again with the code changes (and not just the new test).

Summary:
This patch fixes the offsets of fields in the stack frame linkage save
area for AIX.

Reviewers: sfertile, hubert.reinterpretcast, jasonliu, Xiangling_L, xingxue, ZarkoCA, daltenty

Reviewed By: hubert.reinterpretcast

Subscribers: wuzish, nemanjai, hiraditya, kbarton, MaskRay, jsji, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64424

Patch by Chris Bowler!

llvm-svn: 368721
2019-08-13 17:05:53 +00:00
David Tenty
28f9ab4934 [NFC][AIX] Use assert instead of llvm_unreachable
Addresses post-commit comments on https://reviews.llvm.org/D64825. Use
assert instead of llvm_unreachable to check if invalid csect types are being
generated. Use report_fatal_error on unimplemented XCOFF features.

Differential Revision: https://reviews.llvm.org/D64825

llvm-svn: 368720
2019-08-13 17:04:51 +00:00
Jonas Devlieghere
096f5d18e5 [Dwarf] Complete the list of type tags.
An incorrect verification error revealed that the list of type tags was
incomplete. This patch adds the missing types by adding a tag kind to
the Dwarf.def file, which is used by the `isType` function.

A test was added for the original verification error.

Differential revision: https://reviews.llvm.org/D65914

llvm-svn: 368718
2019-08-13 17:00:54 +00:00
Simon Pilgrim
d494391172 [X86] Add some vXi8 extract subvector cost model tests
We don't have full 512-bit test coverage yet - but there's enough to help test D65892

llvm-svn: 368716
2019-08-13 16:44:40 +00:00
David Bolvansky
c4645391b0 [SLC] Improve dereferenceable bytes annotation
llvm-svn: 368715
2019-08-13 16:44:16 +00:00
Matt Arsenault
c5243ab46d GlobalISel: Partially implement fewerElementsVector G_UNMERGE_VALUES
Odd sized vectors aren't handled yet.

llvm-svn: 368713
2019-08-13 16:26:28 +00:00
Momchil Velikov
2789c6c5e3 [ARM] Fix detection of duplicates when parsing reg list operands
Differential Revision: https://reviews.llvm.org/D65957

llvm-svn: 368712
2019-08-13 16:13:00 +00:00
Momchil Velikov
b87985e436 [ARM] Fix encoding of APSR in CLRM instruction
The APSR is encoded by setting bit 15 in the register list of the CLRM
instruction (cf. https://static.docs.arm.com/ddi0553/bh/DDI0553B_h_armv8m_arm.pdf).

Differential Revision: https://reviews.llvm.org/D65873

llvm-svn: 368711
2019-08-13 16:12:46 +00:00
Matt Arsenault
338762edc0 GlobalISel: Implement lower for G_SHUFFLE_VECTOR
llvm-svn: 368709
2019-08-13 16:09:07 +00:00
Lang Hames
44eb111f3c [ORC] Refactor definition-generation, add a generator for static libraries.
This patch replaces the JITDylib::DefinitionGenerator typedef with a class of
the same name, and adds support for attaching a sequence of DefinitionGeneration
objects to a JITDylib.

This patch also adds a new definition generator,
StaticLibraryDefinitionGenerator, that can be used to add symbols fom a static
library to a JITDylib. An object from the static library will be added (via
a supplied ObjectLayer reference) whenever a symbol from that object is
referenced.

To enable testing, lli is updated to add support for the --extra-archive option
when running in -jit-kind=orc-lazy mode.

llvm-svn: 368707
2019-08-13 16:05:18 +00:00
Matt Arsenault
3482b4fef4 GlobalISel: Add more verifier checks for G_SHUFFLE_VECTOR
llvm-svn: 368705
2019-08-13 15:52:21 +00:00
Matt Arsenault
284e8e1c63 GlobalISel: Change representation of shuffle masks
Currently shufflemasks get emitted as any other constant, and you end
up with a bunch of virtual registers of G_CONSTANT with a
G_BUILD_VECTOR. The AArch64 selector then asserts on anything that
doesn't fit this pattern. This isn't an ideal representation, and
should avoid legalization and have fewer opportunities for a
representational error.

Rather than invent a new shuffle mask operand type, similar to what
ShuffleVectorSDNode does, just track the original IR Constant mask
operand. I don't completely like the idea of adding another link to
the IR, but MIR is already quite dependent on IR constants already,
and this will allow sharing the shuffle mask utility functions with
the IR.

llvm-svn: 368704
2019-08-13 15:34:38 +00:00
Roman Lebedev
07aca076e2 [CodeGen][SelectionDAG] More efficient code for X % C == 0 (SREM case)
Summary:
This implements an optimization described in Hacker's Delight 10-17:
when `C` is constant, the result of `X % C == 0` can be computed
more cheaply without actually calculating the remainder.
The motivation is discussed here: https://bugs.llvm.org/show_bug.cgi?id=35479.

One huge caveat: this signed case is only valid for positive divisors.

While we can freely negate negative divisors, we can't negate `INT_MIN`,
so for now if `INT_MIN` is encountered, we bailout.
As a follow-up, it should be possible to handle that more gracefully
via extra `and`+`setcc`+`select`.

This passes llvm's test-suite, and from cursory(!) cross-examination
the folds (the assembly) match those of GCC, and manual checking via alive
did not reveal any issues (other than the `INT_MIN` case)

Reviewers: RKSimon, spatel, hermord, craig.topper, xbolva00

Reviewed By: RKSimon, xbolva00

Subscribers: xbolva00, thakis, javed.absar, hiraditya, dexonsmith, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D65366

llvm-svn: 368702
2019-08-13 14:57:37 +00:00
Roman Lebedev
f5296f1970 [TargetLowering][NFC] prepareUREMEqFold(): fixup comment
The comment initially matched the code, but the code was incorrect
and was fixed after the initial revert back back when it was introduced,
but the comment was never updated.

llvm-svn: 368701
2019-08-13 14:57:08 +00:00
Hubert Tong
f9207ae22b Revert r368691; test checked in without changes by accident
llvm-svn: 368699
2019-08-13 14:43:34 +00:00
Jordan Rupprecht
3abe0b3ab9 [llvm-readelf] Implement note parsing for NT_FILE and unknown descriptors
Summary:
This patch implements two note parsers; one for NT_FILE coredumps, e.g.:

```
  CORE                  0x00000080      NT_FILE (mapped files)
    Page size: 4096
                 Start                 End         Page Offset
    0x0000000000001000  0x0000000000002000  0x0000000000003000
        /path/to/a.out
    0x0000000000004000  0x0000000000005000  0x0000000000006000
        /path/to/libc.so
    0x0000000000007000  0x0000000000008000  0x0000000000009000
        [stack]
```

(A more realistic example can be tested locally by creating a crashing program and running `llvm-readelf -n core`)

And also implements a raw hex dump for unknown descriptor data for unhandled descriptor types.

Reviewers: MaskRay, jhenderson, grimar, alexshap

Reviewed By: MaskRay, grimar

Subscribers: emaste, llvm-commits, labath

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D65832

llvm-svn: 368698
2019-08-13 14:38:45 +00:00
Simon Pilgrim
68d1415581 Fix -Wdocumentation warning (@returns used in void function). NFCI.
llvm-svn: 368693
2019-08-13 13:55:38 +00:00
Hubert Tong
1e00e2024f [AIX] Implement LR prolog/epilog save/restore
Summary:
This patch fixes the offsets of fields in the stack frame linkage save
area for AIX.

Reviewers: sfertile, hubert.reinterpretcast, jasonliu, Xiangling_L, xingxue, ZarkoCA, daltenty

Reviewed By: hubert.reinterpretcast

Subscribers: wuzish, nemanjai, hiraditya, kbarton, MaskRay, jsji, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64424

Patch by Chris Bowler!

llvm-svn: 368691
2019-08-13 13:38:24 +00:00
Roman Lebedev
0648d2150a [InstCombine] Non-canonical clamp-like pattern handling
Summary:
Given a pattern like:
```
%old_cmp1 = icmp slt i32 %x, C2
%old_replacement = select i1 %old_cmp1, i32 %target_low, i32 %target_high
%old_x_offseted = add i32 %x, C1
%old_cmp0 = icmp ult i32 %old_x_offseted, C0
%r = select i1 %old_cmp0, i32 %x, i32 %old_replacement
```
it can be rewritten as more canonical pattern:
```
%new_cmp1 = icmp slt i32 %x, -C1
%new_cmp2 = icmp sge i32 %x, C0-C1
%new_clamped_low = select i1 %new_cmp1, i32 %target_low, i32 %x
%r = select i1 %new_cmp2, i32 %target_high, i32 %new_clamped_low
```
Iff `-C1 s<= C2 s<= C0-C1`
Also, `ULT` predicate can also be `UGE`; or `UGT` iff `C0 != -1` (+invert result)
Also, `SLT` predicate can also be `SGE`; or `SGT` iff `C2 != INT_MAX` (+invert result)

If `C1 == 0`, then all 3 instructions must be one-use; else at most either `%old_cmp1` or `%old_x_offseted` can have extra uses.
NOTE: if we could reuse `%old_cmp1` as one of the comparisons we'll have to build, this could be less limiting.

So there are two icmp's, each one with 3 predicate variants, so there are 9 fold variants:

|     | ULT                            | UGE                             | UGT                             |
| SLT | https://rise4fun.com/Alive/yIJ | https://rise4fun.com/Alive/5BfN | https://rise4fun.com/Alive/INH  |
| SGE | https://rise4fun.com/Alive/hd8 | https://rise4fun.com/Alive/Abk  | https://rise4fun.com/Alive/PlzS |
| SGT | https://rise4fun.com/Alive/VYG | https://rise4fun.com/Alive/oMY  | https://rise4fun.com/Alive/KrzC |
{F9730206}

This fold was brought up in https://reviews.llvm.org/D65148#1603922 by @dmgreen, and is needed to unblock that patch.
This patch requires D65530.

Reviewers: spatel, nikic, xbolva00, dmgreen

Reviewed By: spatel

Subscribers: hiraditya, llvm-commits, dmgreen

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D65765

llvm-svn: 368687
2019-08-13 12:49:28 +00:00
Roman Lebedev
c08ef12796 [InstCombine][NFC] Rename IsFreeToInvert() -> isFreeToInvert() for consistency
As per https://reviews.llvm.org/D65530#inline-592325

llvm-svn: 368686
2019-08-13 12:49:16 +00:00
Roman Lebedev
a6a7f2817b [InstCombine] foldXorOfICmps(): don't give up on non-single-use ICmp's if all users are freely invertible
Summary:
This is rather unconventional..

As the comment there says, we don't have much folds for xor-of-icmps,
we try to turn them into an and-of-icmps, for which we have plenty of folds.
But if the ICmp we need to invert is not single-use - we give up.

As discussed in https://reviews.llvm.org/D65148#1603922,
we may have a non-canonical CLAMP pattern, with bit match and
select-of-threshold that we'll potentially clamp.
As it can be seen in `canonicalize-clamp-with-select-of-constant-threshold-pattern.ll`,
out of all 8 variations of the pattern, only two are **not** canonicalized into
the variant with and+icmp instead of bit math.
The reason is because the ICmp we need to invert is not single-use - we give up.

We indeed can't perform this fold at will, the general rule is that
we should not increase instruction count in InstCombine,

But we wouldn't end up increasing instruction count if we can adapt every other
user to the inverted value. This way the `not` we create **will** get folded,
and in the end the instruction count did not increase.

For that, of course, we need to look at the users of a Value,
which is again rather unconventional for InstCombine :S

Thus i'm proposing to be a little bit more insistive in `foldXorOfICmps()`.
The alternatives would be to not create that `not`, but add duplicate code to
manually invert all users; or to add some even less general combine to handle
some more specific pattern[s].

Reviewers: spatel, nikic, RKSimon, craig.topper

Reviewed By: spatel

Subscribers: hiraditya, jdoerfert, dmgreen, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D65530

llvm-svn: 368685
2019-08-13 12:49:06 +00:00
George Rimar
cb83c675d9 [llvm-readobj] - Remove 'error(Error EC)' helper.
We do not need it. I replaced it with
reportError(StringRef Input, Error Err).

Differential revision: https://reviews.llvm.org/D66011

llvm-svn: 368677
2019-08-13 12:07:41 +00:00
Nico Weber
94809595b4 gn build: Extract git() and git_out() functions in sync script
llvm-svn: 368671
2019-08-13 11:48:15 +00:00