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429 Commits

Author SHA1 Message Date
Devang Patel
85b3a170f5 Fix DWARF description of S registers. 
llvm-svn: 129947
 2011-04-21 22:48:26 +00:00
Chris Lattner
0304b82f80 Fix a ton of comment typos found by codespell. Patch by 
Luis Felipe Strano Moraes!

llvm-svn: 129558
 2011-04-15 05:18:47 +00:00
Bill Wendling
a2eec46242 We need to pass the TargetMachine object to the InstPrinter if we are printing 
the alias of an InstAlias instead of the thing being aliased. Because we need to
know the features that are valid for an InstAlias.

This is part of a work-in-progress.

llvm-svn: 127986
 2011-03-21 04:13:46 +00:00
Jim Grosbach
3de97c6e32 Clean up ARM tail calls a bit. They're pseudo-instructions for normal branches. 
Also more cleanly separate the ARM vs. Thumb functionality. Previously, the
encoding would be incorrect for some Thumb instructions (the indirect calls).

llvm-svn: 127637
 2011-03-15 00:30:40 +00:00
Jim Grosbach
555d910477 Pseudo-ize the ARM Darwin *r9 call instruction definitions. They're the same 
actual instruction as the non-Darwin defs, but have different call-clobber
semantics and so need separate patterns. They don't need to duplicate the
encoding information, however.

llvm-svn: 127515
 2011-03-12 00:45:26 +00:00
Jim Grosbach
daffeb06fb Pseudo-ize the ARM 'B' instruction. 
llvm-svn: 127510
 2011-03-11 23:24:15 +00:00
Jim Grosbach
27eaca3e0d Properly pseudo-ize the ARM LDMIA_RET instruction. This has the nice side- 
effect that we get proper instruction printing using the "pop" mnemonic for it.

llvm-svn: 127502
 2011-03-11 22:51:41 +00:00
Anton Korobeynikov
8c7010e832 ARM assembler stuff is crazy: for .setfp positive values of offset corresponds to "add" instruction, not to "sub" as in .pad case 
llvm-svn: 127106
 2011-03-05 18:44:00 +00:00
Anton Korobeynikov
f15e269356 In Thumb1 mode the constant might be materialized via the load from constpool. Emit unwinding information in case when this load from constpool is used to change the stack pointer in the prologue. 
llvm-svn: 127105
 2011-03-05 18:43:55 +00:00
Anton Korobeynikov
d8873d31a8 Implement frame unwinding information emission for Thumb1. Not finished yet because there is no way given the constpool index to examine the actual entry: the reason is clones inserted by constant island pass, which are not tracked at all! The only connection is done during asmprinting time via magic label names which is really gross and needs to be eventually fixed. 
llvm-svn: 127104
 2011-03-05 18:43:50 +00:00
Anton Korobeynikov
d4828b54ec Add unwind information emission for thumb stuff 
llvm-svn: 127103
 2011-03-05 18:43:43 +00:00
Anton Korobeynikov
917ca94111 Preliminary support for ARM frame save directives emission via MI flags. 
This is just very first approximation how the stuff should be done
(e.g. ARM-only for now). More to follow.

llvm-svn: 127101
 2011-03-05 18:43:32 +00:00
Renato Golin
967b93c6e3 Fixing a bug when printing fpu text to object file. Patch by Mans Rullgard. 
llvm-svn: 126882
 2011-03-02 21:20:09 +00:00
Renato Golin
986151bc09 Fix .fpu printing in ARM assembly, regarding bug http://llvm.org/bugs/show_bug.cgi?id=8931 
llvm-svn: 126689
 2011-02-28 22:04:27 +00:00
Jason W Kim
1a423a93dc ARM/MC/ELF Lowercase .cpu attributes in .s, but make them uppercase in .o 
llvm-svn: 125025
 2011-02-07 19:07:11 +00:00
Jason W Kim
b0d4492aa1 Rework some .ARM.attribute work for improved gcc compatibility. 
Unified EmitTextAttribute for both Asm and Obj emission (.cpu only)
Added necessary cortex-A8 related attrs for codegen compat tests.

llvm-svn: 124995
 2011-02-07 00:49:53 +00:00
Evan Cheng
0dfe28a9b5 Last round of fixes for movw + movt global address codegen. 
1. Fixed ARM pc adjustment.
2. Fixed dynamic-no-pic codegen
3. CSE of pc-relative load of global addresses.

It's now enabled by default for Darwin.

llvm-svn: 123991
 2011-01-21 18:55:51 +00:00
Evan Cheng
53ec6fc591 Materialize GA addresses with movw + movt pairs for Darwin in PIC mode. e.g. 
movw    r0, :lower16:(L_foo$non_lazy_ptr-(LPC0_0+4))
        movt    r0, :upper16:(L_foo$non_lazy_ptr-(LPC0_0+4))
LPC0_0:
        add     r0, pc, r0

It's not yet enabled by default as some tests are failing. I suspect bugs in
down stream tools.

llvm-svn: 123619
 2011-01-17 08:03:18 +00:00
Jason W Kim
6464be5b92 JimG sez: "The value-kinds look like masks, but they're not consistently used 
that way, unfortunately. If you want to change them to work additively instead
of a one-variant-kind-per-symbolref, that's great and I completely agree it's
worth doing, but it really should be a separate patch. Until then, this isn't
correct."

So I am reverting this bit until a more opportune time.

llvm-svn: 123340
 2011-01-12 23:21:49 +00:00
Jason W Kim
ae183f9862 1. Support ELF pcrel relocations for movw/movt: 
R_ARM_MOVT_PREL and R_ARM_MOVW_PREL_NC.
2. Fix minor bug in ARMAsmPrinter - treat bitfield flag as a bitfield, not an enum.
3. Add support for 3 new elf section types (no-ops)

llvm-svn: 123294
 2011-01-12 00:19:25 +00:00
Evan Cheng
05ef00f4dc Clean up ARM subtarget code by using Triple ADT. 
llvm-svn: 123276
 2011-01-11 21:46:47 +00:00
Anton Korobeynikov
d37cb4cd1c Model operand restrictions of mul-like instructions on ARMv5 via 
earlyclobber stuff. This should fix PRs 2313 and 8157.

Unfortunately, no testcase, since it'd be dependent on register
assignments.

llvm-svn: 122663
 2011-01-01 20:38:38 +00:00
Bill Wendling
9b2ef1c9be r120333 changed the opcode for the Thumb1 stuff from ARM::tMOVr to 
ARM::tMOVgpr2gpr. But this check didn't change. As a result, we were getting
misaligned references to the jump table from an ADR instruction.

There is a test case, but unfortunately it's sensitive to random code changes.

<rdar://problem/8782223>

llvm-svn: 122131
 2010-12-18 02:13:59 +00:00
Bob Wilson
12f2b81599 Avoid report_fatal_error in ARM's PrintAsmOperand method. 
The standard error handling in AsmPrinter::EmitInlineAsm handles this much
better, so just use it.

llvm-svn: 122100
 2010-12-17 23:06:42 +00:00
Jim Grosbach
ce773319e4 Pseudo-ize the Thumb1 tBfar pattern. rdar://8777974 
llvm-svn: 121990
 2010-12-16 19:11:16 +00:00
Jim Grosbach
1e943cc60d Add support for MC-ized encoding of tLEApcrel and tLEApcrelJT. rdar://8755755 
llvm-svn: 121798
 2010-12-14 22:28:03 +00:00
Jim Grosbach
e84e95e6d2 Refactor a bit for legibility. 
llvm-svn: 121790
 2010-12-14 21:10:47 +00:00
Jim Grosbach
13d82ea2b1 Make sure to propagate the predicate operands for LEApcrel to ADR. 
llvm-svn: 121788
 2010-12-14 20:45:47 +00:00
Bill Wendling
61720b79f9 The tLDR et al instructions were emitting either a reg/reg or reg/imm 
instruction based on the t_addrmode_s# mode and what it returned. There is some
obvious badness to this. In particular, it's hard to do MC-encoding when the
instruction may change out from underneath you after the t_addrmode_s# variable
is finally resolved.

The solution is to revert a long-ago change that merged the reg/reg and reg/imm
versions. There is the addition of several new addressing modes. They no longer
have extraneous operands associated with them. I.e., if it's reg/reg we don't
have to have a dummy zero immediate tacked on to the SDNode.

There are some obvious cleanups here, which will happen shortly.

llvm-svn: 121747
 2010-12-14 03:36:38 +00:00
Owen Anderson
c84f8c23b3 Second attempt at make Thumb2 LEAs pseudos. This time, perform the lowering much later, which makes the entire 
process cleaner.

llvm-svn: 121735
 2010-12-14 00:36:49 +00:00
Jim Grosbach
5658d982b4 Add a textual message to the assert. 
llvm-svn: 121349
 2010-12-09 01:23:51 +00:00
Jim Grosbach
da9353523f Add a sanity check assert() for t2ADD/SUBrSPi instructions that they really are 
referencing the stack pointer as they say they are.

llvm-svn: 121347
 2010-12-09 01:22:19 +00:00
Jim Grosbach
0e71db6919 Add support for binary encoding of ARM 'adr' instructions referencing constant 
pool entries (LEApcrel pseudo). Ongoing saga of rdar://8542291.

llvm-svn: 120635
 2010-12-02 00:28:45 +00:00
Jim Grosbach
b2a12afa5f Refactor LEApcrelJT as a pseudo-instructionlowered to a cannonical ADR 
instruction at MC lowering. Add binary encoding information for the ADR,
including fixup data for the label operand.

llvm-svn: 120594
 2010-12-01 19:47:31 +00:00
Jim Grosbach
b2044fcba1 Move the ARMAsmPrinter class defintiion into a header file. 
llvm-svn: 120551
 2010-12-01 03:45:07 +00:00
Jim Grosbach
aa96c057be Pseudo-ize ARM MOVPCRX 
llvm-svn: 120442
 2010-11-30 18:56:36 +00:00
Jim Grosbach
cb8193b99e Pseudo-ize BX_CALL and friends. Remove dead instruction format classes. 
rdar://8685712

llvm-svn: 120438
 2010-11-30 18:30:19 +00:00
Bill Wendling
5030f8359b s/ARM::BRIND/ARM::BX/g to coincide with r120366. 
llvm-svn: 120371
 2010-11-30 00:48:15 +00:00
Jim Grosbach
89e90b7310 Pseudo-ize Thumb2 jump tables with explicit MC lowering to the raw 
instructions. This simplifies instruction printing and disassembly.

llvm-svn: 120333
 2010-11-29 22:37:40 +00:00
Jim Grosbach
71042b51a1 Rename t2 TBB and TBH instructions to reference that they encode the jump table 
data. Next up, pseudo-izing them.

llvm-svn: 120320
 2010-11-29 21:28:32 +00:00
Jim Grosbach
3e84f9d6cb ARM Pseudo-ize tBR_JTr. 
llvm-svn: 120310
 2010-11-29 19:32:47 +00:00
Jim Grosbach
9e2ed21ad0 Switch ARM BR_JTm and BR_JTr instructions to be MC-expanded pseudos. 
llvm-svn: 120303
 2010-11-29 18:37:44 +00:00
Jim Grosbach
37233d0ea6 Make the ARM BR_JTadd instruction an explicit pseudo and lower it properly 
in the MC lowering process.

llvm-svn: 119559
 2010-11-17 21:05:55 +00:00
Jim Grosbach
e0122f5d54 Add FIXMEs. 
llvm-svn: 119167
 2010-11-15 18:36:48 +00:00
Chris Lattner
b2daeac125 add fields to the .td files unconditionally, simplifying tblgen a bit. 
Switch the ARM backend to use 'let' instead of 'set' with this change.

llvm-svn: 119120
 2010-11-15 05:19:05 +00:00
Chris Lattner
3a01d37b66 rename LowerToMCInst -> LowerARMMachineInstrToMCInst. 
llvm-svn: 119071
 2010-11-14 21:00:02 +00:00
Chris Lattner
4dac1b2742 even more simplifications. ARM MCInstLowering is now just 
a single function instead of a class.  It doesn't need the
complexity that X86 does.

llvm-svn: 119070
 2010-11-14 20:58:38 +00:00
Chris Lattner
2393da7c40 simplify and tidy up 
llvm-svn: 119066
 2010-11-14 20:31:06 +00:00
Jim Grosbach
c5001c0f1d Simplify and clean up MC symbol lookup for ARM constant pool values. This fixes 
double quoting of ObjC symbol names in constant pool entries.

rdar://8652107

llvm-svn: 118688
 2010-11-10 17:59:10 +00:00
Jim Grosbach
4e3653e4e1 Update ARMConstantPoolValue to not use a modifier string. Use an explicit 
VariantKind marker to indicate the additional information necessary. Update
MC to handle the new Kinds. rdar://8647623

llvm-svn: 118671
 2010-11-10 03:26:07 +00:00
Jim Grosbach
be0d795478 Change the ARMConstantPoolValue modifier string to an enumeration. This will 
help in MC'izing the references that use them.

llvm-svn: 118633
 2010-11-09 21:36:17 +00:00
Jim Grosbach
d98cc456d2 Handle ARM constant pool values that need an explicit reference to the '.' 
pseudo-label. (TLS stuff).

llvm-svn: 118609
 2010-11-09 19:40:22 +00:00
Jim Grosbach
2c60dfb555 Further MCize ARM constant pool values. This allows basic PIC references for 
object file emission.

llvm-svn: 118601
 2010-11-09 18:45:04 +00:00
Dale Johannesen
f16acd1325 Revert 118422 in search of bot verdancy. 
llvm-svn: 118429
 2010-11-08 19:17:22 +00:00
Jason W Kim
a253ed4e26 Support -mcpu=cortex-a8 in ARM attributes - Has Fixme. 1 Test modified. 
llvm-svn: 118422
 2010-11-08 17:58:07 +00:00
Jim Grosbach
bbef2c5fcc MC'ize the '.code 16' and '.thumb_func' ARM directives. 
llvm-svn: 118301
 2010-11-05 22:08:08 +00:00
Jim Grosbach
55b250bb64 MC'ize simple ARMConstantValue entry emission (with a FIXME). 
llvm-svn: 118295
 2010-11-05 20:34:24 +00:00
Jim Grosbach
49dd16ea6f Add FIXME. 
llvm-svn: 118280
 2010-11-05 17:37:13 +00:00
Jim Grosbach
fcfc42b7bb Convert ARM::MOVi2pieces to a true pseudo-instruction and expand it in 
the ARMExpandPseudos pass rather than during the asm lowering.

llvm-svn: 117714
 2010-10-29 21:35:25 +00:00
Jim Grosbach
93fbda05ee ARM::MOVi32imm is expanded in ARMExpandPseudoInsts, so there's no need to 
handle it in the asm lowering.

llvm-svn: 117707
 2010-10-29 20:37:06 +00:00
Jim Grosbach
86ecfda983 Refactor ARM STR/STRB instruction patterns into STR{B}i12 and STR{B}rs, like 
the LDR instructions have. This makes the literal/register forms of the
instructions explicit and allows us to assign scheduling itineraries
appropriately. rdar://8477752

llvm-svn: 117505
 2010-10-27 23:12:14 +00:00
Jim Grosbach
4d4caf1384 Split ARM::LDRB into LDRBi12 and LDRBrs. Adjust accordingly. Continuing on 
rdar://8477752.

llvm-svn: 117419
 2010-10-27 00:19:44 +00:00
Jim Grosbach
30f6744f05 First part of refactoring ARM addrmode2 (load/store) instructions to be more 
explicit about the operands. Split out the different variants into separate
instructions. This gives us the ability to, among other things, assign
different scheduling itineraries to the variants. rdar://8477752.

llvm-svn: 117409
 2010-10-26 22:37:02 +00:00
Rafael Espindola
5fecad6a27 Produce the headers directly in the Finish method. This allows us to use 
the existing streamer methods that are endian safe.

llvm-svn: 117323
 2010-10-25 22:26:55 +00:00
Rafael Espindola
7f67e5ad77 Add a virtual destructor. 
llvm-svn: 117280
 2010-10-25 18:38:32 +00:00
Rafael Espindola
5748458e7d Add support for emitting ARM file attributes. 
llvm-svn: 117275
 2010-10-25 17:50:35 +00:00
Jason W Kim
59375bae75 Second set of ARM/MC/ELF changes. 
Added ARM specific ELF section types.
Added AttributesSection to ARMElfTargetObject
First step in unifying .cpu assembly tag with ELF/.o
llc now asserts on actual ELF emission on -filetype=obj :-)

llvm-svn: 116257
 2010-10-11 23:01:44 +00:00
Jim Grosbach
f2c54c9cf3 remove trailing whitespace 
llvm-svn: 115860
 2010-10-06 22:46:47 +00:00
Jason W Kim
de3044dcd1 First in a sequence of ARM/MC/*ELF* specific work. 
Lifted the EmitRawText calls to ARMAsmPrinter::emitAttribute()
Added ARMAsmPrinter::emitAttributes() (plural s).
TODO:
.cpu attribute needs to be refactored

llvm-svn: 115859
 2010-10-06 22:36:46 +00:00
Jim Grosbach
4c7da8acbc Kill of the vestiges of the 'call' Modifier (no longer needed for PLT). 
llvm-svn: 115845
 2010-10-06 21:36:43 +00:00
Jim Grosbach
e8a4fef4ea Now that VDUPfqf and VDUPfdfare properly pseudos, kill the no-longer-needed 
"lane" operand modifier.

llvm-svn: 115843
 2010-10-06 21:22:32 +00:00
Jim Grosbach
dd7ee2836f target operand flag values aren't a bitmask 
llvm-svn: 115798
 2010-10-06 16:51:55 +00:00
Jim Grosbach
619f1c1cc5 Nuke the rest of the :comment references 
llvm-svn: 115373
 2010-10-01 23:21:38 +00:00
Jim Grosbach
2143c9d321 Rename the AsmPrinter directory to InstPrinter for those targets that have 
been MC-ized for assembly printing. MSP430 is mostly so, but still has the
asm printer and lowering code in the printer subdir for the moment.

llvm-svn: 115360
 2010-10-01 22:39:28 +00:00
Jim Grosbach
2bf1c488de Nuke a few more unused asm strings 
llvm-svn: 115193
 2010-09-30 19:53:58 +00:00
Jim Grosbach
37fbea8ac9 80 column fix 
llvm-svn: 115149
 2010-09-30 15:25:22 +00:00
Jason W Kim
7822e6aab5 Tiny patch for proof-of-concept cleanup of ARMAsmPrinter::EmitStartOfAsmFile() 
Small test for sanity check of resulting ARM .s file.
Tested against -r115129.

llvm-svn: 115133
 2010-09-30 02:45:56 +00:00
Jim Grosbach
efad965653 Nuke it from orbit. It's the only way to be sure. 
(Kill the dead non-MC asm printer for the ARM target.)

llvm-svn: 115127
 2010-09-30 01:57:53 +00:00
Jim Grosbach
fe21554145 One Printer to rule them all, One Printer to find them, 
One Printer to lower them all and in the back end bind them.


(Remove option to use the old non-MC asm printer.)

llvm-svn: 115038
 2010-09-29 15:23:40 +00:00
Jim Grosbach
7915d03313 Factor out dbg_value comment printing and teach MC asm printing to use it. 
This should make the arm-linux self-host buildbot happy again.

llvm-svn: 114964
 2010-09-28 17:05:56 +00:00
Jim Grosbach
ffbf83e49f Enable the MC-ized ARM asm printer. Passing all local tests, so it's time to 
enable it for real. Leaving the CL option in place to it's easy to disable it
again if (when) testers find something I've missed.

llvm-svn: 114915
 2010-09-27 22:28:11 +00:00
Jim Grosbach
0d15b006f7 ARM-mode eh.sjlj.longjmp MC lowering 
llvm-svn: 114896
 2010-09-27 21:47:04 +00:00
Jim Grosbach
8cf10ca1cc Enable the MC-ized ARM asm printer. Passing all local tests, so it's time to 
enable it for real. Leaving the CL option in place to it's easy to disable it
again if (when) testers find something I've missed.

llvm-svn: 114892
 2010-09-27 21:28:44 +00:00
Jim Grosbach
f0bbd8c533 Add ARM explicit MCInst lowering for the Thumb eh.sjlj.setjmp sequence. 
llvm-svn: 114758
 2010-09-24 20:47:58 +00:00
Jim Grosbach
66ced0b804 ARM-mode eh.sjlj.setjmp pseudo MC-inst lowering expansion 
llvm-svn: 114707
 2010-09-23 23:33:56 +00:00
Jim Grosbach
15096f056a never mind. I can't read, apparently 
llvm-svn: 114689
 2010-09-23 19:42:17 +00:00
Jim Grosbach
a6816c40db Fix opcode value for the 'trap' instruction, keeping the type suffix on the 
constant. Hopefully the non-Darwin bots will like it...

llvm-svn: 114687
 2010-09-23 19:32:40 +00:00
Jim Grosbach
a21f51b48f explicit 'unsigned long' on constant value. Hopefully make bots happier. 
llvm-svn: 114686
 2010-09-23 19:08:04 +00:00
Benjamin Kramer
09fb37512b Unbreak build. Jim, please review. 
llvm-svn: 114684
 2010-09-23 18:57:26 +00:00
Jim Grosbach
bcafcce601 Clean up the 'trap' instruction printing a bit. Non-Darwin assemblers don't 
(yet) recognize the 'trap' mnemonic, so we use .short/.long to emit the
opcode directly. On Darwin, however, we do want the mnemonic for more
readable assembly code and better disassembly.

Adjust the .td file to use the 'trap' mnemonic and handle using the binutils
workaround in the assembly printer. Also tweak the formatting of the opcode
values to make them consistent between the MC printer and the old printer.

llvm-svn: 114679
 2010-09-23 18:05:37 +00:00
Jim Grosbach
9764011905 add FIXME 
llvm-svn: 114578
 2010-09-22 20:55:15 +00:00
Jim Grosbach
cab700c79b Add MC instruction printer support for ARM and Thumb1 jump tables. 
llvm-svn: 114555
 2010-09-22 17:39:48 +00:00
Jim Grosbach
17bd4796c6 Add MC instruction printer support for TB[BH] style thumb2 jump tables. 
llvm-svn: 114553
 2010-09-22 17:15:35 +00:00
Jim Grosbach
dd102d535e Clean up comment. 
llvm-svn: 114550
 2010-09-22 16:45:13 +00:00
Jim Grosbach
b2d256e696 Add start of support for MC instruction printer of ARM jump tables. Filling in 
the rest of it is next up.

llvm-svn: 114500
 2010-09-21 23:28:16 +00:00
Jim Grosbach
32cfcf5bba Fix errant printing of [v]ldm instructions that aren't a pop 
llvm-svn: 114445
 2010-09-21 16:45:31 +00:00
Jim Grosbach
c909422ee9 factor out a simple helper function to create a label for PC-relative 
instructions (PICADD, PICLDR, et.al.)

llvm-svn: 114243
 2010-09-18 00:05:05 +00:00
Jim Grosbach
8b988eb1d4 Add MC-inst handling for tPICADD 
llvm-svn: 114237
 2010-09-17 23:41:53 +00:00
Jim Grosbach
8ae5cfffdd Teach the (non-MC) instruction printer to use the cannonical names for push/pop, 
and shift instructions on ARM. Update the tests to match.

llvm-svn: 114230
 2010-09-17 22:36:38 +00:00
Jim Grosbach
6e477cd3d8 Hook up verbose asm comment printing for SOImm operands in MC printer 
llvm-svn: 114215
 2010-09-17 21:33:25 +00:00
Jim Grosbach
34a1adb4ea handle the upper16/lower16 target operand flags on symbol references for MC 
instruction lowering.

llvm-svn: 114191
 2010-09-17 18:25:25 +00:00
Jim Grosbach
23ac157064 expand PICLDR MC lowering to handle other PICLDR and PICSTR versions. 
llvm-svn: 114183
 2010-09-17 16:25:52 +00:00
Jim Grosbach
73f2f39001 MC-ization of the PICLDR pseudo. Next up, adding the other variants 
(PICLDRB, et. al.) and PICSTR*

llvm-svn: 114098
 2010-09-16 17:43:25 +00:00
Bob Wilson
622f0a7592 Remove support for "dregpair" operand modifier, now that it is no longer being 
used for anything.

llvm-svn: 114067
 2010-09-16 04:55:00 +00:00
Jim Grosbach
2699e92c0e move getRegisterNumbering() to out of ARMBaseRegisterInfo into the helper 
functions in ARMBaseInfo.h so it can be used in the MC library as well.
For anything bigger than this, we may want a means to have a small support
library for shared helper functions like this. Cross that bridge when we
come to it.

llvm-svn: 114016
 2010-09-15 20:26:25 +00:00
Jim Grosbach
a43d109cb3 Add predicate and 's' bit operands to PICADD instruction lowering. 
llvm-svn: 113860
 2010-09-14 21:28:17 +00:00
Jim Grosbach
6ade4ae68d fix comment typo 
llvm-svn: 113856
 2010-09-14 21:05:34 +00:00
Jim Grosbach
bb3bfa20e1 Remove trailing whitespace 
llvm-svn: 112790
 2010-09-02 01:02:06 +00:00
Bob Wilson
31d487d235 Change ARM VFP VLDM/VSTM instructions to use addressing mode #4, just like 
all the other LDM/STM instructions.  This fixes asm printer crashes when
compiling with -O0.  I've changed one of the NEON tests (vst3.ll) to run
with -O0 to check this in the future.

Prior to this change VLDM/VSTM used addressing mode #5, but not really.
The offset field was used to hold a count of the number of registers being
loaded or stored, and the AM5 opcode field was expanded to specify the IA
or DB mode, instead of the standard ADD/SUB specifier.  Much of the backend
was not aware of these special cases.  The crashes occured when rewriting
a frameindex caused the AM5 offset field to be changed so that it did not
have a valid submode.  I don't know exactly what changed to expose this now.
Maybe we've never done much with -O0 and NEON.  Regardless, there's no longer
any reason to keep a count of the VLDM/VSTM registers, so we can use
addressing mode #4 and clean things up in a lot of places.

llvm-svn: 112322
 2010-08-27 23:18:17 +00:00
Bob Wilson
985dab611d Rename sat_shift operand to shift_imm, in preparation for using it for other 
instructions besides saturate instructions.  No functional changes.

llvm-svn: 111168
 2010-08-16 18:27:34 +00:00
Johnny Chen
78345b1dfe Cleaned up the for-disassembly-only entries in the arm instruction table so that 
the memory barrier variants (other than 'SY' full system domain read and write)
are treated as one instruction with option operand.

llvm-svn: 110951
 2010-08-12 20:46:17 +00:00
Bob Wilson
3582107cf8 Move the ARM SSAT and USAT optional shift amount operand out of the 
instruction opcode.  This also fixes part of PR7792.

llvm-svn: 110875
 2010-08-11 23:10:46 +00:00
Bob Wilson
214b004717 ARM "rrx" shift operands do not have an immediate. PR7790. 
llvm-svn: 110292
 2010-08-05 00:34:42 +00:00
Devang Patel
53e2e4feae Implement target specific getDebugValueLocation(). 
llvm-svn: 110267
 2010-08-04 22:39:39 +00:00
Bob Wilson
58c8a5da9e Move newlines before inline jumptables from the asm strings in .td files to 
the jtblock_operand print methods.  This avoids extra newlines in the
disassembler's output.  PR7757.

llvm-svn: 109948
 2010-07-31 06:28:10 +00:00
Bob Wilson
bd1dc153a5 Add the __TEXT,__StaticInit section to the list of sections emitted at the 
beginning on ARM Darwin assembly files so that it won't be placed after
debug sections.  Radar 8252813.

llvm-svn: 109879
 2010-07-30 19:55:47 +00:00
Jim Grosbach
489d758ea8 For ARM/Darwin, add a dwarf entry indicating whether a function is arm or thumb 
rdar://8202967

llvm-svn: 109057
 2010-07-21 23:03:52 +00:00
Chris Lattner
9ae74337ef sink the arm implementations of ASmPrinter and MCInstLower 
out of the AsmPrinter directory into libarm.  Now the
ARM InstPrinters depend jsut on the MC stuff, not on vmcore
or codegen.

llvm-svn: 108783
 2010-07-19 23:44:46 +00:00
Anton Korobeynikov
4b6a6e3e8d Move ARM to pluggable asmprinter 
llvm-svn: 54889
 2008-08-17 13:55:10 +00:00
Anton Korobeynikov
8d77445753 Handle visibility printing with all generality. Remove bunch of duplicate code. 
llvm-svn: 54540
 2008-08-08 18:25:07 +00:00
Evan Cheng
804e157031 Undo most of r54519. 
llvm-svn: 54534
 2008-08-08 17:56:50 +00:00
Evan Cheng
4708df4776 It's not legal to output a GV in a coalesced section if it's used in an ARM PIC relative constantpool. 
llvm-svn: 54519
 2008-08-08 06:56:16 +00:00
Anton Korobeynikov
0c8d06f030 Switch ARM to new section handling stuff 
llvm-svn: 54458
 2008-08-07 09:54:23 +00:00
Dale Johannesen
11d39779a1 Emit debug info for data-only files. ARM version. 
llvm-svn: 53360
 2008-07-09 21:20:54 +00:00
Evan Cheng
f51c436a1b Back out 53254. It broke ppc debug info codegen. 
llvm-svn: 53280
 2008-07-09 06:36:53 +00:00
Dale Johannesen
d609d7166c Make debug info come out in data-only files. 
This is a question of the debugging setup code not
being called at the right time, and it's called from
target-dependent code for some reason.  I have only
attempted to fix Darwin, but I'm pretty sure it's
broken elsewhere; I'll leave that to people who can
test it.

llvm-svn: 53254
 2008-07-08 21:56:22 +00:00
Dan Gohman
7fb6670108 Minor const-correctness fixes. 
llvm-svn: 53196
 2008-07-07 20:06:06 +00:00
Dale Johannesen
e6977495aa Handle quoted names when constructing $stub's, 
$non_lazy_ptr's and $lazy_ptr's.

llvm-svn: 51277
 2008-05-19 21:38:18 +00:00
Evan Cheng
f8b1257d2e Add a quick and dirty "loop aligner pass". x86 uses it to align its loops to 16-byte boundaries. 
llvm-svn: 47703
 2008-02-28 00:43:03 +00:00
Bill Wendling
50f5c4be14 Change "Name" to "AsmName" in the target register info. Gee, a refactoring tool 
would have been a Godsend here!

llvm-svn: 47625
 2008-02-26 21:11:01 +00:00
Chris Lattner
d55c26a77d Handle \n's in value names for more targets. The asm printers 
really really really need refactoring :(

llvm-svn: 47171
 2008-02-15 19:04:54 +00:00
Dale Johannesen
4621e574c9 __DATA not __DATA__ is the right segment name on darwin. 
Spotted by Nick Kledzik.

llvm-svn: 47037
 2008-02-12 23:35:09 +00:00
Dan Gohman
cabaec582f Rename MRegisterInfo to TargetRegisterInfo. 
llvm-svn: 46930
 2008-02-10 18:45:23 +00:00
Evan Cheng
f61d1115af Get rid of the annoying blank lines before labels. 
llvm-svn: 46667
 2008-02-02 08:39:46 +00:00
Bill Wendling
5b6f587a80 If the function has no machine instructions, then emit a "nop" so that 
the function label isn't associated with something it shouldn't be.

llvm-svn: 46449
 2008-01-28 09:15:03 +00:00
Dale Johannesen
a54401ee30 Honor explicit section information on Darwin. 
llvm-svn: 46267
 2008-01-23 00:58:14 +00:00
Dale Johannesen
0e1328e880 Revert the part of 45849 that treated weak globals 
as weak globals rather than commons.  While not wrong,
this change tickled a latent bug in Darwin's strip,
so revert it for now as a workaround.

llvm-svn: 46147
 2008-01-17 23:36:04 +00:00
Dale Johannesen
83852e3451 Weak zeroes don't go in bss on Darwin. 
llvm-svn: 45849
 2008-01-11 01:59:45 +00:00
Chris Lattner
9e5cc35593 Add new shorter predicates for testing machine operands for various types: 
e.g. MO.isMBB() instead of MO.isMachineBasicBlock().  I don't plan on 
switching everything over, so new clients should just start using the 
shorter names.

Remove old long accessors, switching everything over to use the short
accessor: getMachineBasicBlock() -> getMBB(), 
getConstantPoolIndex() -> getIndex(), setMachineBasicBlock -> setMBB(), etc.

llvm-svn: 45464
 2007-12-30 23:10:15 +00:00
Chris Lattner
12477d46b4 Use MachineOperand::getImm instead of MachineOperand::getImmedValue. Likewise setImmedValue -> setImm 
llvm-svn: 45453
 2007-12-30 20:49:49 +00:00
Chris Lattner
ad9a6ccb83 Remove attribution from file headers, per discussion on llvmdev. 
llvm-svn: 45418
 2007-12-29 20:36:04 +00:00
Evan Cheng
7d8deec92f Much improved pic jumptable codegen: 
Then:
        call    "L1$pb"
"L1$pb":
        popl    %eax
		...
LBB1_1: # entry
        imull   $4, %ecx, %ecx
        leal    LJTI1_0-"L1$pb"(%eax), %edx
        addl    LJTI1_0-"L1$pb"(%ecx,%eax), %edx
        jmpl    *%edx

        .align  2
        .set L1_0_set_3,LBB1_3-LJTI1_0
        .set L1_0_set_2,LBB1_2-LJTI1_0
        .set L1_0_set_5,LBB1_5-LJTI1_0
        .set L1_0_set_4,LBB1_4-LJTI1_0
LJTI1_0:
        .long    L1_0_set_3
        .long    L1_0_set_2

Now:
        call    "L1$pb"
"L1$pb":
        popl    %eax
		...
LBB1_1: # entry
        addl    LJTI1_0-"L1$pb"(%eax,%ecx,4), %eax
        jmpl    *%eax

		.align  2
		.set L1_0_set_3,LBB1_3-"L1$pb"
		.set L1_0_set_2,LBB1_2-"L1$pb"
		.set L1_0_set_5,LBB1_5-"L1$pb"
		.set L1_0_set_4,LBB1_4-"L1$pb"
LJTI1_0:
        .long    L1_0_set_3
        .long    L1_0_set_2

llvm-svn: 43924
 2007-11-09 01:32:10 +00:00
Lauro Ramos Venancio
f5081ba980 [ARM] Fix code generation for: 
static __thread struct {
    int a;
    int b;
} teste = {0, 0};

llvm-svn: 43722
 2007-11-05 18:33:37 +00:00
Duncan Sands
d1bdbd010b Eliminate the remaining uses of getTypeSize. This 
should only effect x86 when using long double.  Now
12/16 bytes are output for long double globals (the
exact amount depends on the alignment).  This brings
globals in line with the rest of LLVM: the space
reserved for an object is now always the ABI size.
One tricky point is that only 10 bytes should be
output for long double if it is a field in a packed
struct, which is the reason for the additional
argument to EmitGlobalConstant.

llvm-svn: 43688
 2007-11-05 00:04:43 +00:00
Evan Cheng
33df6a6bed Revert 42908 for now. 
llvm-svn: 42960
 2007-10-14 05:57:21 +00:00
Dan Gohman
a75e4a62e6 Change the names used for internal labels to use the current 
function symbol name instead of a codegen-assigned function
number.

Thanks Evan! :-)

llvm-svn: 42908
 2007-10-12 14:53:36 +00:00
Dan Gohman
30ba45b569 Use empty() member functions when that's what's being tested for instead 
of comparing begin() and end().

llvm-svn: 42585
 2007-10-03 19:26:29 +00:00
Gordon Henriksen
9b5a117d01 AsmPrinters overriding getAnalysisUsage should call super. 
And not super's super, either.

llvm-svn: 42482
 2007-09-30 13:39:29 +00:00
Evan Cheng
d675ed5400 Honor user-defined section specification of a global, ignores whether its initializer is null. 
llvm-svn: 42182
 2007-09-21 00:41:19 +00:00
Dan Gohman
0fc4e0cf47 Don't ignore the return value of AsmPrinter::doInitialization and 
AsmPrinter::doFinalization.

llvm-svn: 40487
 2007-07-25 19:33:14 +00:00
Evan Cheng
721b83bbe6 Print the s bit if the instruction is toggled to its CPSR setting form. 
llvm-svn: 37932
 2007-07-06 01:01:34 +00:00
Dale Johannesen
e1c767df50 Quote complex names for Darwin X86 and ARM. 
llvm-svn: 37700
 2007-06-22 00:54:56 +00:00
Evan Cheng
886c1f49ca Print predicate of the second instruction of the two-piece constant MI. 
llvm-svn: 37437
 2007-06-05 18:55:18 +00:00
Evan Cheng
820e352652 PIC label asm printing cosmetic changes. 
llvm-svn: 37434
 2007-06-05 07:36:38 +00:00
Chris Lattner
72e07238ba Fix the asmprinter so that a globalvalue can specify an explicit alignment 
smaller than the preferred alignment, but so that the target can actually
specify a minimum alignment if needed.  This fixes some objc protocol
failures Devang tracked down.

llvm-svn: 37373
 2007-05-31 18:57:45 +00:00
Evan Cheng
9f0ffdf4b3 Add PredicateOperand to all ARM instructions that have the condition field. 
llvm-svn: 37066
 2007-05-15 01:29:07 +00:00
Evan Cheng
73abcaa525 Switch BCC, MOVCCr, etc. to PredicateOperand. 
llvm-svn: 36948
 2007-05-08 21:08:43 +00:00
Evan Cheng
8e5e87a16b Should never see an indexed load / store with zero offset. 
llvm-svn: 36714
 2007-05-03 23:30:36 +00:00
Lauro Ramos Venancio
1d84c031a0 Debug support for arm-linux. 
Patch by Raul Herbster.

llvm-svn: 36690
 2007-05-03 20:28:35 +00:00
Chris Lattner
5d81bf937b add support for printing offset from global 
llvm-svn: 36669
 2007-05-03 16:42:23 +00:00
Lauro Ramos Venancio
727156d5f0 Enable protected visibility on ARM. 
llvm-svn: 36583
 2007-04-30 00:23:51 +00:00
Lauro Ramos Venancio
f385b56870 ARM TLS: implement "general dynamic", "initial exec" and "local exec" models. 
llvm-svn: 36506
 2007-04-27 13:54:47 +00:00
Lauro Ramos Venancio
d922b8ca9b remember to emit weak reference in one more case. 
llvm-svn: 36438
 2007-04-25 14:50:40 +00:00
Dale Johannesen
f7d3443fa7 add Align field, and use when generating function alignment 
llvm-svn: 36371
 2007-04-23 20:07:25 +00:00
Lauro Ramos Venancio
f8b49e5ee0 Implement PIC for arm-linux. 
llvm-svn: 36324
 2007-04-22 00:04:12 +00:00
Evan Cheng
44488cb676 Implement inline asm modifier P. 
llvm-svn: 35640
 2007-04-04 00:13:29 +00:00
Evan Cheng
bde0409264 Add support for hidden visibility to darwin/arm. 
llvm-svn: 35448
 2007-03-29 07:49:34 +00:00
Evan Cheng
4fec9d7228 Make two piece constant generation as a single instruction. It's re-materialized as a load from constantpool. 
llvm-svn: 35207
 2007-03-20 08:11:30 +00:00
Evan Cheng
7ef8db2fb5 Implement inline asm modifier c. 
llvm-svn: 35035
 2007-03-08 22:42:46 +00:00
Evan Cheng
7d528d089c Putting more constants which do not contain relocations into .literal{4|8|16} 
llvm-svn: 35026
 2007-03-08 08:31:54 +00:00
Evan Cheng
c79408b032 For Darwin, put constant data into .const, .const_data, .literal{4|8|16} 
sections.

llvm-svn: 35017
 2007-03-08 01:25:25 +00:00
Bill Wendling
2aabf75e82 Get rid of verboten <iostream> include. 
llvm-svn: 34777
 2007-03-01 06:05:39 +00:00
Lauro Ramos Venancio
5781691b22 Fix .thumb_func directive on linux. 
llvm-svn: 33759
 2007-02-01 18:25:34 +00:00
Evan Cheng
54a1324bae Don't emit unnecessary .align directive. 
llvm-svn: 33729
 2007-01-31 23:39:39 +00:00
Evan Cheng
0f07707270 - Fix codegen for pc relative constant (e.g. JT) in thumb mode: 
.set PCRELV0, (LJTI1_0_0-(LPCRELL0+4))
LPCRELL0:
        add r1, pc, #PCRELV0
This is not legal since add r1, pc, #c requires the constant be a multiple of 4.
Do the following instead:
        .set PCRELV0, (LJTI1_0_0-(LPCRELL0+4))
LPCRELL0:
        mov r1, #PCRELV0
        add r1, pc

- In thumb mode, it's not possible to use .set generate a pc relative stub
  address. The stub is ARM code which is in a different section from the thumb
  code. Load the value from a constpool instead.
- Some asm printing clean up.

llvm-svn: 33664
 2007-01-30 20:37:08 +00:00
Reid Spencer
19af04a142 For PR1136: Rename GlobalVariable::isExternal as isDeclaration to avoid 
confusion with external linkage types.

llvm-svn: 33663
 2007-01-30 20:08:39 +00:00
Evan Cheng
3f02e5b1e7 Darwin -static should codegen static ctors / dtors to .constructor / .destructor sections. 
llvm-svn: 33657
 2007-01-30 08:04:53 +00:00
Evan Cheng
99a2f7d598 Change the operand orders to t_addrmode_s* to make it easier to morph 
instructions that use these address modes to instructions that use
t_addrmode_sp.

llvm-svn: 33651
 2007-01-30 02:35:32 +00:00
Evan Cheng
4618d3131c Thumb jumptable support. 
llvm-svn: 33568
 2007-01-27 02:29:45 +00:00
Jim Laskey
64f4242072 Change the MachineDebugInfo to MachineModuleInfo to better reflect usage 
for debugging and exception handling.

llvm-svn: 33550
 2007-01-26 21:22:28 +00:00
Lauro Ramos Venancio
ea815a6137 If the constant pool value is a extern weak symbol, emit the weak reference. 
llvm-svn: 33543
 2007-01-26 19:51:32 +00:00
Lauro Ramos Venancio
a3788dc56b Fix elf object definition. 
llvm-svn: 33502
 2007-01-25 20:11:04 +00:00
Evan Cheng
9d937d1065 Getting rid uses of evil std::set<> 
llvm-svn: 33496
 2007-01-25 03:07:27 +00:00
Evan Cheng
5f947e4e2f - Reorg Thumb load / store instructions. Combine each rr and ri pair of 
instructions into one (e.g. tLDRrr, tLDRri -> tLDR).
- Thumb ldrsb and ldrsh only have the [reg, reg] address format. If the
  address is not an add, materialize a 0 immediate into a register and use
  it as the offset field.

llvm-svn: 33470
 2007-01-23 22:59:13 +00:00
Evan Cheng
99725bd310 Restructure code a bit to make use of continue (simplifying things). Generalize 
the .zerofill directive emission to not be darwin-specific.

llvm-svn: 33365
 2007-01-19 19:25:36 +00:00
Lauro Ramos Venancio
f53f62b91d Fix section definition. 
llvm-svn: 33359
 2007-01-19 17:33:22 +00:00
Evan Cheng
c6e1d453d3 ARM backend contribution from Apple. 
llvm-svn: 33353
 2007-01-19 07:51:42 +00:00
Chris Lattner
fd16bf61d8 Fix for ARM weak symbols, patch by Lauro Ramos Venancio! 
llvm-svn: 32740
 2006-12-21 22:59:58 +00:00
Chris Lattner
8896b6cb46 eliminate static ctors for Statistic objects. 
llvm-svn: 32703
 2006-12-19 22:59:26 +00:00
Rafael Espindola
08c0825f18 move ExtWeakSymbols to AsmPrinter 
llvm-svn: 32648
 2006-12-18 03:37:18 +00:00
Rafael Espindola
9fe91fc84f .align is in bits 
.comm is in bytes
:-(

llvm-svn: 32408
 2006-12-10 02:53:14 +00:00
Rafael Espindola
620b3430c8 %progbits not @progbits 
llvm-svn: 32376
 2006-12-08 22:06:02 +00:00
Rafael Espindola
7e99603152 add \"aw\",@progbits" to ctors and dtors 
llvm-svn: 32373
 2006-12-08 21:24:58 +00:00
Rafael Espindola
bb753d7121 fix alignment 
llvm-svn: 32337
 2006-12-07 22:38:06 +00:00
Bill Wendling
f13d78d3b8 What should be the last unnecessary <iostream>s in the library. 
llvm-svn: 32333
 2006-12-07 22:21:48 +00:00
Rafael Espindola
a908b2dfd9 make sure that we don't use a common symbol if a section was specified 
llvm-svn: 32310
 2006-12-07 18:33:58 +00:00
Chris Lattner
a531ce882e Detemplatize the Statistic class. The only type it is instantiated with 
is 'unsigned'.

llvm-svn: 32279
 2006-12-06 17:46:33 +00:00
Rafael Espindola
7ad537568f print weak references 
llvm-svn: 32276
 2006-12-06 13:35:10 +00:00
Chris Lattner
fd152e4ed6 These asm printers shouldn't use assembly/writer.h 
llvm-svn: 32262
 2006-12-06 06:13:25 +00:00
Rafael Espindola
da1fffc4e1 add support for weak linkage 
llvm-svn: 32222
 2006-12-05 17:00:17 +00:00
Rafael Espindola
5daebfdae0 implement load effective address similar to the alpha backend 
remove lea_addri and the now unused memri addressing mode

llvm-svn: 31592
 2006-11-09 13:58:55 +00:00
Rafael Espindola
f7b898d497 initial implementation of addressing mode 2 
TODO: fix lea_addri

llvm-svn: 31552
 2006-11-08 17:07:32 +00:00
Rafael Espindola
04afe6eb37 move ARMCondCodeToString to ARMAsmPrinter.cpp 
remove unused variables from lowerCall

llvm-svn: 31378
 2006-11-02 15:00:02 +00:00
Rafael Espindola
3ae2b33d17 print null values in bss 
llvm-svn: 31349
 2006-11-01 14:26:44 +00:00
Rafael Espindola
f7a41f3ddd print common symbols 
llvm-svn: 31048
 2006-10-19 13:30:40 +00:00
Rafael Espindola
47970f96ac initial implementation of addressing mode 5 
llvm-svn: 31002
 2006-10-17 18:04:53 +00:00
Rafael Espindola
4f61431679 expand ISD::SHL_PARTS, ISD::SRA_PARTS and ISD::SRL_PARTS 
llvm-svn: 30987
 2006-10-16 21:10:32 +00:00
Chris Lattner
068190eb91 Pass the MachineFunction into EmitJumpTableInfo. 
llvm-svn: 30742
 2006-10-05 03:01:21 +00:00
Chris Lattner
cc21d20348 Use getSectionForFunction. 
llvm-svn: 30740
 2006-10-05 02:49:23 +00:00
Rafael Espindola
1a3020bfcf add shifts to addressing mode 1 
llvm-svn: 30291
 2006-09-13 12:09:43 +00:00
Rafael Espindola
89ac048c5d partial implementation of the ARM Addressing Mode 1 
llvm-svn: 30252
 2006-09-11 17:25:40 +00:00
Rafael Espindola
a8dd3960f1 call AsmPrinter::doInitialization in ARMAsmPrinter::doInitialization 
llvm-svn: 30246
 2006-09-11 12:49:38 +00:00
Anton Korobeynikov
4141c7992e Removed unnecessary Mangler creation. 
llvm-svn: 30239
 2006-09-10 21:17:03 +00:00
Jim Laskey
9da25f6119 Make target asm info a property of the target machine. 
llvm-svn: 30162
 2006-09-07 22:06:40 +00:00
Jim Laskey
6b86ef852c Separate target specific asm properties from the asm printers. 
llvm-svn: 30126
 2006-09-06 18:34:40 +00:00
Rafael Espindola
91954ae78f use @ for comments 
store LR in an arbitrary stack slot
add support for writing varargs functions

llvm-svn: 29876
 2006-08-25 17:55:16 +00:00
Rafael Espindola
cf999a6d39 create a generic bcond instruction that has a conditional code argument 
llvm-svn: 29856
 2006-08-24 16:13:15 +00:00
Rafael Espindola
9e2a2dfb2d initial support for branches 
llvm-svn: 29854
 2006-08-24 13:45:55 +00:00
Rafael Espindola
ff879761c1 add a "load effective address" 
llvm-svn: 29748
 2006-08-17 17:09:40 +00:00
Rafael Espindola
719336441f start comments with # 
move the constant pool to .text
correctly print loads of labels
mark R0, R1, R2 and R3 as caller save

llvm-svn: 29451
 2006-08-01 18:53:10 +00:00
Rafael Espindola
f11277971f implement LowerConstantPool and LowerGlobalAddress 
llvm-svn: 29433
 2006-08-01 12:58:43 +00:00
Rafael Espindola
0ea0399411 handle GlobalValue::InternalLinkage in doFinalization 
llvm-svn: 29417
 2006-07-31 20:38:13 +00:00
Rafael Espindola
c0ede90402 emit global constants 
llvm-svn: 29344
 2006-07-27 11:38:51 +00:00
Rafael Espindola
40073f5767 skeleton of a lowerCall implementation for ARM 
llvm-svn: 29159
 2006-07-16 01:02:57 +00:00
Rafael Espindola
fdfaee67f5 add the memri memory operand 
this makes it possible for ldr instructions with non-zero immediate

llvm-svn: 29103
 2006-07-11 11:36:48 +00:00
Rafael Espindola
f7c5af4863 On ARM, alignment is in bits 
Add lr as a hard coded operand of bx

llvm-svn: 28494
 2006-05-26 10:56:17 +00:00
Rafael Espindola
31b98f8e04 implement initial version of ARMAsmPrinter::printOperand 
llvm-svn: 28470
 2006-05-25 12:57:06 +00:00
Rafael Espindola
bb1e2e2c52 implement minimal versions of 
ARMAsmPrinter::runOnMachineFunction
LowerFORMAL_ARGUMENTS
ARMInstrInfo::isMoveInstr

llvm-svn: 28431
 2006-05-23 02:48:20 +00:00
Rafael Espindola
dd49dfc0df added a skeleton of the ARM backend 
llvm-svn: 28301
 2006-05-14 22:18:28 +00:00