Bob Wilson
fbec6680d1
When moving zext/sext to be folded with a load, ignore the issue of whether
...
truncates are free only in the case where the extended type is legal but the
load type is not. If both types are illegal, such as when they are too big,
the load may not be legalized into an extended load.
llvm-svn: 114568
2010-09-22 18:44:56 +00:00
Jim Grosbach
f264fe8e05
Add PrintSpecial() handling for in ARM MC instruction printer.
...
llvm-svn: 114563
2010-09-22 18:37:14 +00:00
Jim Grosbach
8899a330c7
grammar tweakage
...
llvm-svn: 114561
2010-09-22 18:18:30 +00:00
Jim Grosbach
f8956463a7
remove trailing whitespace
...
llvm-svn: 114560
2010-09-22 18:16:55 +00:00
Daniel Dunbar
ea457b3edb
CrashRecovery/Darwin: Override raise() as well so that crash recovery doesn't
...
end up altering the thread on which crashes are done because of its use of
Darwin's broken raise() implementation.
llvm-svn: 114558
2010-09-22 17:46:10 +00:00
Rafael Espindola
a2d73f0a38
Correctly align bss.
...
llvm-svn: 114556
2010-09-22 17:43:04 +00:00
Jim Grosbach
cab700c79b
Add MC instruction printer support for ARM and Thumb1 jump tables.
...
llvm-svn: 114555
2010-09-22 17:39:48 +00:00
Bob Wilson
3ff9f2d102
Attempt to fix llvm-gcc build. It was crashing when building gcov.o for an
...
ARM cross-compiler on x86, because the MMO size did not match the type size.
This fixes the MMO size and also the size of the stack object to match the
type size.
llvm-svn: 114554
2010-09-22 17:35:14 +00:00
Jim Grosbach
17bd4796c6
Add MC instruction printer support for TB[BH] style thumb2 jump tables.
...
llvm-svn: 114553
2010-09-22 17:15:35 +00:00
Jim Grosbach
dd102d535e
Clean up comment.
...
llvm-svn: 114550
2010-09-22 16:45:13 +00:00
Chris Lattner
f90b2a5a26
fix rdar://8456371 - Handle commutable instructions written backward.
...
llvm-svn: 114536
2010-09-22 06:26:39 +00:00
Chris Lattner
1864d6728d
Fix an inconsistency in the x86 backend that led it to reject "calll foo" on
...
x86-32: 32-bit calls were named "call" not "calll". 64-bit calls were correctly
named "callq", so this only impacted x86-32.
This fixes rdar://8456370 - llvm-mc rejects 'calll'
This also exposes that mingw/64 is generating a 32-bit call instead of a 64-bit call,
I will file a bugzilla.
llvm-svn: 114534
2010-09-22 05:49:14 +00:00
Chris Lattner
1ff3935290
fix rdar://8456412 - llvm-mc crash in encoder on "mov %rdx, %cr8"
...
Teaching the code generator about CR8-15, how to rex them up, etc.
llvm-svn: 114533
2010-09-22 05:29:50 +00:00
Chris Lattner
1c5e55f787
fix rdar://8456417 - llvm-mc can't do basic math
...
llvm-svn: 114532
2010-09-22 05:05:16 +00:00
Chris Lattner
77d657ae6a
add the missing aliases for fp stack cmovs, rdar://8456391
...
llvm-svn: 114531
2010-09-22 04:56:20 +00:00
Chris Lattner
26d11d7501
reimplement elf TLS support in terms of addressing modes, eliminating SegmentBaseAddress.
...
llvm-svn: 114529
2010-09-22 04:39:11 +00:00
Chris Lattner
2e61516c5a
Fix rdar://8456364 - llvm-mc rejects '%CS'
...
llvm-svn: 114528
2010-09-22 04:11:10 +00:00
Chris Lattner
2d350c46e2
fix rdar://8456389 - llvm-mc mismatch with 'as' on 'fstp'
...
-This line, and those below, will be ignored--
M test/MC/AsmParser/X86/x86_instructions.s
M lib/Target/X86/AsmParser/X86AsmParser.cpp
llvm-svn: 114527
2010-09-22 04:04:03 +00:00
Chris Lattner
f43f09693e
fix rdar://8456361 - llvm-mc rejects 'rep movsd'
...
llvm-svn: 114526
2010-09-22 03:50:32 +00:00
Chris Lattner
c81dcbec9e
convert the last 4 X86ISD nodes that should have memoperands to have them.
...
llvm-svn: 114523
2010-09-22 01:28:21 +00:00
Chris Lattner
29754fc406
give X86ISD::FNSTCW16m a memoperand, since it touches memory. It only
...
can access the stack due to how it is generated though.
llvm-svn: 114522
2010-09-22 01:11:26 +00:00
Chris Lattner
fee1ac61bd
give FP_TO_INT16_IN_MEM and friends a memoperand. They are only
...
used with stack slots, but hey, lets be safe.
llvm-svn: 114521
2010-09-22 01:05:16 +00:00
Chris Lattner
e52da86fab
give VZEXT_LOAD a memory operand, it now works with segment registers.
...
llvm-svn: 114515
2010-09-22 00:34:38 +00:00
Chris Lattner
706b9206da
revert r114386 now that address modes work correctly, we get a nice
...
call through gs-relative memory now.
llvm-svn: 114510
2010-09-22 00:11:31 +00:00
Chris Lattner
f9861312cb
give LCMPXCHG_DAG[8] a memory operand, allowing it to work with addrspace 256/257
...
llvm-svn: 114508
2010-09-21 23:59:42 +00:00
Evan Cheng
1d58965067
OptimizeCompareInstr should avoid iterating pass the beginning of the MBB when the 'and' instruction is after the comparison.
...
llvm-svn: 114506
2010-09-21 23:49:07 +00:00
Jim Grosbach
b2d256e696
Add start of support for MC instruction printer of ARM jump tables. Filling in
...
the rest of it is next up.
llvm-svn: 114500
2010-09-21 23:28:16 +00:00
Owen Anderson
d9fd152c3a
Enable target-specific mul-lowering on ARM, even at -Os. Remove a test that this makes
...
irrelevant, but add a new test for the new, improved functionality.
llvm-svn: 114494
2010-09-21 22:51:46 +00:00
Jakob Stoklund Olesen
c5ea87bca7
Build the complement interval dupli after the split intervals instead of
...
creating it before and subtracting split ranges.
This way, the SSA update code in LiveIntervalMap can properly create and use new
phi values in dupli. Now it is possible to create split regions where a value
escapes along two different CFG edges, creating phi values outside the split
region.
This is a work in progress and probably quite broken.
llvm-svn: 114492
2010-09-21 22:32:21 +00:00
Chris Lattner
b227ae4ddb
reimplement support for GS and FS relative address space matching
...
by having X86DAGToDAGISel::SelectAddr get passed in the parent node
of the operand match (the load/store/atomic op) and having it get
the address space from that, instead of having special FS/GS addr
mode operations that require duplicating the entire instruction set
to support.
This makes FS and GS relative accesses *far* more predictable and
work much better. It also simplifies the X86 backend a bit, more
to come.
There is still a pending issue with nodes like ISD::PREFETCH and
X86ISD::FLD, which really should be MemSDNode's but aren't.
llvm-svn: 114491
2010-09-21 22:07:31 +00:00
John Thompson
5c363e0ebf
Fixed pr20314-2.c failure, added E, F, p constraint letters.
...
llvm-svn: 114490
2010-09-21 22:04:54 +00:00
Chris Lattner
6543dacfac
Rework passing parent pointers into complexpatterns, I forgot
...
that complex patterns are matched after the entire pattern has
a structural match, therefore the NodeStack isn't in a useful
state when the actual call to the matcher happens.
llvm-svn: 114489
2010-09-21 22:00:25 +00:00
Bob Wilson
a22747a563
Move a sign-extend or a zero-extend of a load to the same basic block as the
...
load when the type of the load is not legal, even if truncates are not free.
The load is going to be legalized to an extending load anyway.
llvm-svn: 114488
2010-09-21 21:54:27 +00:00
Bob Wilson
064f6a1a3d
Clarify a comment.
...
llvm-svn: 114487
2010-09-21 21:44:14 +00:00
Devang Patel
a6b9c79c24
If only user of a vreg is an copy instruction to export copy of vreg out of current basic block then insert DBG_VALUE so that debug value of the variable is also transfered to new vreg.
...
Testcase is in r114476.
This fixes radar 8412415.
llvm-svn: 114478
2010-09-21 20:56:33 +00:00
Chris Lattner
7798a97041
correct this logic.
...
llvm-svn: 114474
2010-09-21 20:46:40 +00:00
Owen Anderson
f6dd8e7f5c
Reimplement r114460 in target-independent DAGCombine rather than target-dependent, by using
...
the predicate to discover the number of sign bits. Enhance X86's target lowering to provide
a useful response to this query.
llvm-svn: 114473
2010-09-21 20:42:50 +00:00
Chris Lattner
a911c9ed3a
just like they can opt into getting the root of the pattern being
...
matched, allow ComplexPatterns to opt into getting the parent node
of the operand being matched.
llvm-svn: 114472
2010-09-21 20:37:12 +00:00
Chris Lattner
55043ef46a
fix a long standing wart: all the ComplexPattern's were being
...
passed the root of the match, even though only a few patterns
actually needed this (one in X86, several in ARM [which should
be refactored anyway], and some in CellSPU that I don't feel
like detangling). Instead of requiring all ComplexPatterns to
take the dead root, have targets opt into getting the root by
putting SDNPWantRoot on the ComplexPattern.
llvm-svn: 114471
2010-09-21 20:31:19 +00:00
Jakob Stoklund Olesen
cb8f334578
Refix MSVC9 and upper_bound. It actually needs a fully symmetric comparator.
...
llvm-svn: 114469
2010-09-21 20:16:12 +00:00
Chris Lattner
c153d48869
even though I'm about to rip it out, simplify the address mode stuff
...
llvm-svn: 114468
2010-09-21 19:41:58 +00:00
Chris Lattner
32ec32b690
finish pushing MachinePointerInfo through selectiondags. At this point,
...
I think I've audited all uses, so it should be dependable for address spaces,
and the pointer+offset info should also be accurate when there.
llvm-svn: 114464
2010-09-21 18:58:22 +00:00
Chris Lattner
3dde58c15a
convert a couple more places to use the new getStore()
...
llvm-svn: 114463
2010-09-21 18:51:21 +00:00
Chris Lattner
8cdc5e75f7
update a bunch of code to use the MachinePointerInfo version of getStore.
...
llvm-svn: 114461
2010-09-21 18:41:36 +00:00
Owen Anderson
97a8fdc19c
When adding the carry bit to another value on X86, exploit the fact that the carry-materialization
...
(sbbl x, x) sets the registers to 0 or ~0. Combined with two's complement arithmetic, we can fold
the intermediate AND and the ADD into a single SUB.
This fixes <rdar://problem/8449754>.
llvm-svn: 114460
2010-09-21 18:41:19 +00:00
Jakob Stoklund Olesen
d09d4a9693
Don't pollute the global namespace.
...
llvm-svn: 114459
2010-09-21 18:34:17 +00:00
Jakob Stoklund Olesen
375867aa60
MSVC9 does not support upper_bound with an asymmetric comparator.
...
llvm-svn: 114455
2010-09-21 18:24:30 +00:00
Bob Wilson
c4345abcc0
Define the TargetLowering::getTgtMemIntrinsic hook for ARM so that NEON load
...
and store intrinsics are represented with MemIntrinsicSDNodes.
llvm-svn: 114454
2010-09-21 17:56:22 +00:00
Chris Lattner
5f584efd31
eliminate some uses of the getStore overload.
...
llvm-svn: 114453
2010-09-21 17:50:43 +00:00
Chris Lattner
86b3f287ce
eliminate an old SelectionDAG::getTruncStore method, propagating
...
MachinePointerInfo around more.
llvm-svn: 114452
2010-09-21 17:42:31 +00:00
Chris Lattner
bf98f86fed
eliminate last SelectionDAG::getLoad old entrypoint, on to stores.
...
llvm-svn: 114450
2010-09-21 17:28:52 +00:00
Chris Lattner
8af4fb7aed
fix the code that infers SV info to be correct when dealing
...
with an indexed load/store that has an offset in the index.
llvm-svn: 114449
2010-09-21 17:24:05 +00:00
Jakob Stoklund Olesen
03451a0e51
Add LiveInterval::find and use it for most LiveRange searching operations
...
instead of calling lower_bound or upper_bound directly.
This cleans up the search logic a bit because {lower,upper}_bound compare
LR->start by default, and it is usually simpler to search LR->end.
Funnelling all searches through one function also makes it possible to replace
the search algorithm with something faster than binary search.
llvm-svn: 114448
2010-09-21 17:12:18 +00:00
Jakob Stoklund Olesen
73d2940daa
Remove dead method.
...
llvm-svn: 114447
2010-09-21 17:12:15 +00:00
Chris Lattner
cdfd993df0
propagate MachinePointerInfo through various uses of the old
...
SelectionDAG::getExtLoad overload, and eliminate it.
llvm-svn: 114446
2010-09-21 17:04:51 +00:00
Jim Grosbach
32cfcf5bba
Fix errant printing of [v]ldm instructions that aren't a pop
...
llvm-svn: 114445
2010-09-21 16:45:31 +00:00
Benjamin Kramer
98e1aab5a8
Simplify code.
...
llvm-svn: 114444
2010-09-21 16:41:29 +00:00
Chris Lattner
0d430648ae
continue MachinePointerInfo'izing, eliminating use of one of the old
...
getLoad overloads.
llvm-svn: 114443
2010-09-21 16:36:31 +00:00
Chris Lattner
5c0bdf4543
convert dagcombine off the old form of getLoad. This fixes several bugs
...
with SVOffset computation.
llvm-svn: 114442
2010-09-21 16:08:50 +00:00
Benjamin Kramer
a81f2ba27e
Make CreateComplexVariable independent of SmallVector.
...
llvm-svn: 114439
2010-09-21 16:00:03 +00:00
Chris Lattner
637762e6d1
simplify DAGCombiner::SimplifySelectOps step #2/2.
...
llvm-svn: 114437
2010-09-21 15:58:55 +00:00
Chris Lattner
e3616071c5
substantially reduce indentation and simplify DAGCombiner::SimplifySelectOps.
...
no functionality change (step #1 )
llvm-svn: 114436
2010-09-21 15:46:59 +00:00
Mikhail Glushenkov
35e2ea68d2
llvmc: Allow multiple output languages.
...
llvm-svn: 114433
2010-09-21 14:59:42 +00:00
Lang Hames
f2e621dcb8
Fixed ambiguous call.
...
llvm-svn: 114431
2010-09-21 13:47:10 +00:00
Gabor Greif
324a43436f
Fix buglet when the TST instruction directly uses the AND result.
...
I am unable to write a test for this case, help is solicited, though...
What I did is to tickle the code in the debugger and verify that we do the right thing.
llvm-svn: 114430
2010-09-21 13:30:57 +00:00
Lang Hames
eae68e1117
Added an additional PBQP problem builder which adds coalescing costs (both between pairs of virtuals, and between virtuals and physicals).
...
llvm-svn: 114429
2010-09-21 13:19:36 +00:00
Gabor Greif
99c07b1d95
Move the search for the appropriate AND instruction
...
into OptimizeCompareInstr.
This necessitates the passing of CmpValue around,
so widen the virtual functions to accomodate.
No functionality changes.
llvm-svn: 114428
2010-09-21 12:01:15 +00:00
Chris Lattner
b68bd70665
a few more trivial updates. This fixes PerformInsertVectorEltInMemory to not
...
pass a completely incorrect SrcValue, which would result in a miscompile with
combiner-aa.
llvm-svn: 114411
2010-09-21 07:32:19 +00:00
Chris Lattner
4320dda4fb
convert the targets off the non-MachinePointerInfo of getLoad.
...
llvm-svn: 114410
2010-09-21 06:44:06 +00:00
Chris Lattner
1cad885bf7
add some accessors
...
llvm-svn: 114409
2010-09-21 06:43:24 +00:00
Chris Lattner
112cf9bc89
it's more elegant to put the "getConstantPool" and
...
"getFixedStack" on the MachinePointerInfo class. While
this isn't the problem I'm setting out to solve, it is the
right way to eliminate PseudoSourceValue, so lets go with it.
llvm-svn: 114406
2010-09-21 06:22:23 +00:00
Chris Lattner
810a630851
update the X86 backend to use the MachinePointerInfo version of one
...
of the getLoad methods. This fixes at least one bug where an incorrect
svoffset is passed in (a potential combiner-aa miscompile).
llvm-svn: 114404
2010-09-21 06:02:19 +00:00
Chris Lattner
80d9e51351
Fix a bug where the x86 backend would lower memcpy/memset of segment relative operations
...
into non-segment-relative copies.
llvm-svn: 114402
2010-09-21 05:43:34 +00:00
Chris Lattner
f94de5bf46
reimplement memcpy/memmove/memset lowering to use MachinePointerInfo
...
instead of srcvalue/offset pairs. This corrects SV info for mem
operations whose size is > 32-bits.
llvm-svn: 114401
2010-09-21 05:40:29 +00:00
Chris Lattner
b6d15db75c
add some helpful accessors.
...
llvm-svn: 114400
2010-09-21 05:39:30 +00:00
Chris Lattner
dbe51ad1b8
add overloads for SelectionDAG::getLoad, getStore, getTruncStore that take a
...
MachinePointerInfo. Among other virtues, this doesn't silently truncate the
svoffset to 32-bits.
llvm-svn: 114399
2010-09-21 05:10:45 +00:00
Chris Lattner
e1fc671030
simplify interface to SelectionDAG::getMemIntrinsicNode, making it take a MachinePointerInfo
...
llvm-svn: 114397
2010-09-21 04:57:15 +00:00
Chris Lattner
e4db4cad3b
chagne interface to SelectionDAG::getAtomic to take a MachinePointerInfo,
...
eliminating some weird "infer a frame address" logic which was dead.
llvm-svn: 114396
2010-09-21 04:53:42 +00:00
Chris Lattner
5de5fada20
don't implicitly drop the offset of a machinememoperand when legalizing atomics.
...
llvm-svn: 114395
2010-09-21 04:51:11 +00:00
Chris Lattner
af01f8d142
force clients of MachineFunction::getMachineMemOperand to provide a
...
MachinePointerInfo, propagating the type out a level of API. Remove
the old MachineFunction::getMachineMemOperand impl.
llvm-svn: 114393
2010-09-21 04:46:39 +00:00
Chris Lattner
2edbad8a3d
convert targets to the new MF.getMachineMemOperand interface.
...
llvm-svn: 114391
2010-09-21 04:39:43 +00:00
Chris Lattner
940c35a3c3
start pushing MachinePointerInfo out through the MachineMemOperand interface
...
to the MachineFunction construction methods.
llvm-svn: 114390
2010-09-21 04:32:08 +00:00
Chris Lattner
7fdf193383
refactor the Value*/offset pair from MachineMemOperand out to a new
...
MachinePointerInfo struct, no functionality change.
This also adds an assert to MachineMemOperand::MachineMemOperand
that verifies that the Value* is either null or is an IR pointer type.
llvm-svn: 114389
2010-09-21 04:23:39 +00:00
Chris Lattner
ecdba24738
fix rdar://8453210, a crash handling a call through a GS relative load.
...
For now, just disable folding the load into the call.
llvm-svn: 114386
2010-09-21 03:37:00 +00:00
Rafael Espindola
93f3fb8aca
Revert unrelated change that was accidentally included in the previous commit.
...
llvm-svn: 114383
2010-09-21 00:40:19 +00:00
Rafael Espindola
02af3cdd58
Implement support for .local and its "interesting" interactions with .comm.
...
llvm-svn: 114382
2010-09-21 00:24:38 +00:00
Evan Cheng
1ce02d180e
Enable machine sinking critical edge splitting. e.g.
...
define double @foo(double %x, double %y, i1 %c) nounwind {
%a = fdiv double %x, 3.2
%z = select i1 %c, double %a, double %y
ret double %z
}
Was:
_foo:
divsd LCPI0_0(%rip), %xmm0
testb $1, %dil
jne LBB0_2
movaps %xmm1, %xmm0
LBB0_2:
ret
Now:
_foo:
testb $1, %dil
je LBB0_2
divsd LCPI0_0(%rip), %xmm0
ret
LBB0_2:
movaps %xmm1, %xmm0
ret
This avoids the divsd when early exit is taken.
rdar://8454886
llvm-svn: 114372
2010-09-20 22:52:00 +00:00
Owen Anderson
fc94b337eb
When TCO is turned on, it is possible to end up with aliasing FrameIndex's. Therefore,
...
CombinerAA cannot assume that different FrameIndex's never alias, but can instead use
MachineFrameInfo to get the actual offsets of these slots and check for actual aliasing.
This fixes CodeGen/X86/2010-02-19-TailCallRetAddrBug.ll and CodeGen/X86/tailcallstack64.ll
when CombinerAA is enabled, modulo a different register allocation sequence.
llvm-svn: 114348
2010-09-20 20:39:59 +00:00
Jim Grosbach
cf90f8beb1
Simplify ARM callee-saved register handling by removing the distinction
...
between the high and low registers for prologue/epilogue code. This was
a Darwin-only thing that wasn't providing a realistic benefit anymore.
Combining the save areas simplifies the compiler code and results in better
ARM/Thumb2 codegen.
For example, previously we would generate code like:
push {r4, r5, r6, r7, lr}
add r7, sp, #12
stmdb sp!, {r8, r10, r11}
With this change, we combine the register saves and generate:
push {r4, r5, r6, r7, r8, r10, r11, lr}
add r7, sp, #12
rdar://8445635
llvm-svn: 114340
2010-09-20 19:32:20 +00:00
Rafael Espindola
78fc1f7f66
Produce a R_X86_64_32 when the value is >=0.
...
llvm-svn: 114339
2010-09-20 19:20:47 +00:00
Evan Cheng
1c7f72d0bc
Avoid splitting critical edge twice for a set of PHI uses.
...
llvm-svn: 114338
2010-09-20 19:12:55 +00:00
Francois Pichet
53617de15e
Fix the "unable to rename temporary" lit test failing on Windows. rename is now copy + delete on Windows. Problem to be revisited for a permanent and clean solution.
...
llvm-svn: 114320
2010-09-20 04:03:07 +00:00
Owen Anderson
9594834ec1
Revert r114312 while I sort out some issues.
...
llvm-svn: 114313
2010-09-19 21:01:26 +00:00
Owen Anderson
65f23dcf7e
Tentatively enabled DAGCombiner Alias Analysis by default. As far as I know,
...
r114268 fixed the last of the blockers to enabling it. I will be monitoring
for failures.
llvm-svn: 114312
2010-09-19 19:51:55 +00:00
Jakob Stoklund Olesen
8ae6803659
Add one more Core i7 model number.
...
llvm-svn: 114310
2010-09-19 17:54:28 +00:00
Chris Lattner
3203bf3688
idiom recognition should catch this.
...
llvm-svn: 114304
2010-09-19 00:37:34 +00:00
Chris Lattner
ac0afb0fbe
add a readme.
...
llvm-svn: 114303
2010-09-19 00:34:58 +00:00
Chris Lattner
4e80799dbb
add corei7, the laptop version.
...
llvm-svn: 114302
2010-09-19 00:31:58 +00:00
NAKAMURA Takumi
a4a0276d4f
X86Subtarget.h: Fix Cygwin's TD.
...
llvm-svn: 114297
2010-09-18 19:50:42 +00:00
Eric Christopher
2901b19344
Add the exit instruction to the PTX target.
...
Patch by Che-Liang Chiou <clchiou@gmail.com>!
llvm-svn: 114294
2010-09-18 18:52:28 +00:00
Michael J. Spencer
3a9b3aae55
Fix build.
...
llvm-svn: 114292
2010-09-18 17:54:37 +00:00
Rafael Espindola
9c3a9bf8aa
Make sure the STT_FILE symbol is the first one in the symbol table.
...
llvm-svn: 114285
2010-09-18 15:03:21 +00:00
Benjamin Kramer
89a330c4b9
Unbreak msvc build.
...
llvm-svn: 114284
2010-09-18 14:41:26 +00:00
Gabor Greif
dd1c709af4
do not rely on the implicit-dereference semantics of dyn_cast_or_null
...
llvm-svn: 114278
2010-09-18 11:55:34 +00:00
Gabor Greif
5348c51fbe
do not rely on the implicit-dereference semantics of dyn_cast_or_null
...
llvm-svn: 114277
2010-09-18 11:53:39 +00:00
Lang Hames
2d87a43549
Fixed non-const iterator error.
...
llvm-svn: 114273
2010-09-18 09:49:08 +00:00
Lang Hames
4a8c999803
Added a separate class (PBQPBuilder) for PBQP Problem construction. This class can be extended to support custom constraints.
...
For now the allocator still uses the old (internal) construction mechanism by default. This will be phased out soon assuming
no issues with the builder system come up.
To invoke the new construction mechanism just pass '-regalloc=pbqp -pbqp-builder' to llc. To provide custom constraints a
Target just needs to extend PBQPBuilder and pass an instance of their derived builder to the RegAllocPBQP constructor.
llvm-svn: 114272
2010-09-18 09:07:10 +00:00
Evan Cheng
442cb9c620
Fix code that break critical edges for PHI uses. Watch out for multiple PHIs in different blocks.
...
llvm-svn: 114270
2010-09-18 06:42:17 +00:00
Owen Anderson
015641f659
Invert the logic of reachesChainWithoutSideEffects(). What we want to check is that there is
...
NO path to the destination containing side effects, not that SOME path contains no side effects.
In practice, this only manifests with CombinerAA enabled, because otherwise the chain has little
to no branching, so "any" is effectively equivalent to "all".
llvm-svn: 114268
2010-09-18 04:45:14 +00:00
Eric Christopher
0c5e912e21
Thumb opcodes for thumb calls.
...
llvm-svn: 114263
2010-09-18 02:32:38 +00:00
Eric Christopher
c9fef312c8
Add addrmode5 fp load support. Swap float/thumb operand adding to handle
...
thumb with floating point.
llvm-svn: 114256
2010-09-18 01:59:37 +00:00
Eric Christopher
b6ce0ab878
Floating point stores have a 3rd addressing mode type.
...
llvm-svn: 114254
2010-09-18 01:23:38 +00:00
Jim Grosbach
c909422ee9
factor out a simple helper function to create a label for PC-relative
...
instructions (PICADD, PICLDR, et.al.)
llvm-svn: 114243
2010-09-18 00:05:05 +00:00
Jim Grosbach
a19f7799fb
PC-relative pseudo instructions are lowered and printed directly. Any encounter
...
with one in the generic printing code is an error.
llvm-svn: 114242
2010-09-18 00:04:53 +00:00
Benjamin Kramer
1cad9b6521
Fix vmov.f64 disassembly on targets where sizeof(long) != 8.
...
llvm-svn: 114240
2010-09-17 23:48:07 +00:00
Jim Grosbach
8b988eb1d4
Add MC-inst handling for tPICADD
...
llvm-svn: 114237
2010-09-17 23:41:53 +00:00
Bob Wilson
670e1915c0
Add target-specific DAG combiner for BUILD_VECTOR and VMOVRRD. An i64
...
value should be in GPRs when it's going to be used as a scalar, and we use
VMOVRRD to make that happen, but if the value is converted back to a vector
we need to fold to a simple bit_convert. Radar 8407927.
llvm-svn: 114233
2010-09-17 22:59:05 +00:00
Jim Grosbach
8ae5cfffdd
Teach the (non-MC) instruction printer to use the cannonical names for push/pop,
...
and shift instructions on ARM. Update the tests to match.
llvm-svn: 114230
2010-09-17 22:36:38 +00:00
Rafael Espindola
acd5bacfb9
Avoid relocations in a common case.
...
llvm-svn: 114229
2010-09-17 22:34:41 +00:00
Evan Cheng
8c2bde65f0
Teach machine sink to
...
1) Do forward copy propagation. This makes it easier to estimate the cost of the
instruction being sunk.
2) Break critical edges on demand, including cases where the value is used by
PHI nodes.
Critical edge splitting is not yet enabled by default.
llvm-svn: 114227
2010-09-17 22:28:18 +00:00
Eric Christopher
716614f126
Rework arm fast isel branch and compare code.
...
llvm-svn: 114226
2010-09-17 22:28:18 +00:00
Evan Cheng
042ab036a2
Machine CSE was forgetting to clear some data structures.
...
llvm-svn: 114222
2010-09-17 21:59:42 +00:00
Evan Cheng
5f2926d516
Fix a potential bug that can cause miscomparison with and without debug info.
...
llvm-svn: 114220
2010-09-17 21:56:26 +00:00
Jakob Stoklund Olesen
37131971c3
Don't include <fenv.h> now that we have llvm/System/FEnv.h.
...
llvm-svn: 114219
2010-09-17 21:47:03 +00:00
Jim Grosbach
6e477cd3d8
Hook up verbose asm comment printing for SOImm operands in MC printer
...
llvm-svn: 114215
2010-09-17 21:33:25 +00:00
Jim Grosbach
352a616f23
trailing whitespace
...
llvm-svn: 114212
2010-09-17 21:25:10 +00:00
Dan Gohman
aaed2c137f
Avoid emitting a PIC base register if no PIC addresses are needed.
...
This fixes rdar://8396318.
llvm-svn: 114201
2010-09-17 20:24:24 +00:00
Dan Gohman
8058e1b851
Attempt to support platforms which don't have fenv.h.
...
llvm-svn: 114196
2010-09-17 20:06:27 +00:00
Jim Grosbach
1703c92cf5
Add skeleton infrastructure for the ARMMCCodeEmitter class. Patch by Jason Kim!
...
llvm-svn: 114195
2010-09-17 18:46:17 +00:00
Jim Grosbach
34a1adb4ea
handle the upper16/lower16 target operand flags on symbol references for MC
...
instruction lowering.
llvm-svn: 114191
2010-09-17 18:25:25 +00:00
Chris Lattner
4bce01542c
fix rdar://8444631 - encoder crash on 'enter'
...
What a weird instruction.
llvm-svn: 114190
2010-09-17 18:02:29 +00:00
Daniel Dunbar
ea0a5aee7b
Fix an MSVC warning.
...
llvm-svn: 114184
2010-09-17 16:34:24 +00:00
Jim Grosbach
23ac157064
expand PICLDR MC lowering to handle other PICLDR and PICSTR versions.
...
llvm-svn: 114183
2010-09-17 16:25:52 +00:00
Daniel Dunbar
ed92665b19
MC/Mach-O/i386: Fix a crash in relocation handling.
...
llvm-svn: 114176
2010-09-17 15:21:50 +00:00
NAKAMURA Takumi
14029b5d65
Move the declaration SetInformationJobObject() outside of namespace.
...
It is also workaround for PR7927.
llvm-svn: 114175
2010-09-17 11:14:18 +00:00
NAKAMURA Takumi
cfded91183
AlphaSchedule.td: 7bit-ize.
...
llvm-svn: 114173
2010-09-17 09:56:43 +00:00
Daniel Dunbar
8a328e38c5
System: Don't reexport ___eprintf when building with Clang; this symbol isn't
...
used on Darwin anymore, and Clang might not always link with the library it is
currently found in.
llvm-svn: 114165
2010-09-17 04:25:24 +00:00
Daniel Dunbar
a43c86b354
MC/AsmParser: Add support for 'a + 4@GOTPCREL' and friends, by reconsing the
...
expression to include the modifier.
- Gross, but this a corner case we don't expect to see often in practice, but
it is worth accepting.
- Also improves diagnostics on invalid modifiers.
llvm-svn: 114154
2010-09-17 02:47:07 +00:00
Dan Gohman
9dc559bdef
Fix the folding of floating-point math library calls, like sin(infinity),
...
so that it detects errors on platforms where libm doesn't set errno.
It's still subject to host libm details though.
llvm-svn: 114148
2010-09-17 01:38:06 +00:00
Dan Gohman
2f0d88bcbe
Add an #include of raw_ostream.h. Previously, this only compiled
...
because it was using Twine.h's declaration of operator<<(const Twine &).
llvm-svn: 114141
2010-09-17 00:33:43 +00:00
Owen Anderson
c71f165f28
Allow the PassRegistry mutex to be lazily initialized, and clean up the global namespace at the same time.
...
llvm-svn: 114131
2010-09-16 23:44:50 +00:00
Owen Anderson
56bc6a9391
Do not expose the locking for the PassRegistry in the header. Be careful to
...
synchronize any method that might lazily initialize the pImpl.
llvm-svn: 114130
2010-09-16 23:32:35 +00:00
Benjamin Kramer
c8808012f9
Update CMake build.
...
llvm-svn: 114128
2010-09-16 23:06:18 +00:00
Dan Gohman
54fa09d403
Rename a variable to avoid a declaration conflict.
...
llvm-svn: 114126
2010-09-16 22:50:09 +00:00
Dan Gohman
836ce09592
Add a pass which prints out all the memdep dependencies.
...
llvm-svn: 114121
2010-09-16 22:08:32 +00:00
Devang Patel
99777d1d07
If FE forgot to provide a file name (usually it uses "stdin" as name in such situation) then make one up to ensure that debug info is not malformed.
...
llvm-svn: 114119
2010-09-16 20:57:49 +00:00
Owen Anderson
3d4644bad9
Revert r114097, adding back in the assertion against replacing an Instruction by itself. Now that CorrelatedValuePropagation is
...
more careful not to call SimplifyInstructionsInBlock() on an unreachable block, the issue has been fixed at a higher level. Add
a big warning to SimplifyInstructionsInBlock() to hopefully prevent this in the future.
llvm-svn: 114117
2010-09-16 20:51:41 +00:00
Chris Lattner
73fc5e794d
fix rdar://8438816 - unrecognized 'fildq' instruction
...
llvm-svn: 114116
2010-09-16 20:46:38 +00:00
Rafael Espindola
d542892fc0
Print the address of sections as 0 and create the metadata sections in the
...
same order as gnu as.
llvm-svn: 114109
2010-09-16 19:46:31 +00:00
Owen Anderson
1a679ae773
Use a depth-first iteratation in CorrelatedValuePropagation to avoid wasting time trying
...
to optimize unreachable blocks.
llvm-svn: 114105
2010-09-16 18:35:07 +00:00
Dale Johannesen
cf9dc14249
When substituting sunkaddrs into indirect arguments an asm, we were
...
walking the asm arguments once and stashing their Values. This is
wrong because the same memory location can be in the list twice, and
if the first one has a sunkaddr substituted, the stashed value for the
second one will be wrong (use-after-free). PR 8154.
llvm-svn: 114104
2010-09-16 18:30:55 +00:00
Owen Anderson
6f3516065f
It is possible, under specific circumstances involving ptrtoint ConstantExpr's, for LVI to end up trying to merge
...
a Constant into a ConstantRange. Handle this conservatively for now, rather than asserting. The testcase is
more complex that I would like, but the manifestation of the problem is sensitive to iteration orders and the state of the
LVI cache, and I have not been able to reproduce it with manually constructed or simplified cases.
Fixes PR8162.
llvm-svn: 114103
2010-09-16 18:28:33 +00:00
Jim Grosbach
73f2f39001
MC-ization of the PICLDR pseudo. Next up, adding the other variants
...
(PICLDRB, et. al.) and PICSTR*
llvm-svn: 114098
2010-09-16 17:43:25 +00:00
Owen Anderson
521e8dfef8
Fix PR8161, in which an unreachable loop causes recursive instruction simplification to try
...
to replace an instruction with itself. Add a predicate to the simplifier to prevent this case.
llvm-svn: 114097
2010-09-16 17:42:36 +00:00
Jim Grosbach
9131eb8bf0
Make sure to promote single precision floats to double before extracting them
...
from the APFloat.
llvm-svn: 114096
2010-09-16 17:37:30 +00:00
Rafael Espindola
fa964e153e
Make sure that names like .note.GNU-stack are accepted as valid section names.
...
llvm-svn: 114091
2010-09-16 17:05:55 +00:00
Rafael Espindola
58aa9e8010
Add support for the .zero directive.
...
llvm-svn: 114077
2010-09-16 15:03:59 +00:00
Kalle Raiskila
68e2c15954
Change SPU register re-interpretations from OR to COPY_TO_REGCLASS instruction.
...
This cleans up after the mess r108567 left in the CellSPU backend.
ORCvt-instruction were used to reinterpret registers, and the ORs were then
removed by isMoveInstr(). This patch now removes 350 instrucions of format:
or $3, $3, $3
(from the 52 testcases in CodeGen/CellSPU). One case of a nonexistant or is
checked for.
Some moves of the form 'ori $., $., 0' and 'ai $., $., 0' still remain.
llvm-svn: 114074
2010-09-16 12:29:33 +00:00
Duncan Sands
c128b42eb8
Add better support for environment portion of triple. Original patch by
...
Cameron Esfahani, tweaked to use array_lengthof.
llvm-svn: 114073
2010-09-16 08:25:48 +00:00
Duncan Sands
82768f4f13
Some versions of gcc still warn about "ignoring return value ... declared
...
with attribute warn_unused_result" here - suppress the warning harder.
llvm-svn: 114072
2010-09-16 08:20:49 +00:00
Bob Wilson
622f0a7592
Remove support for "dregpair" operand modifier, now that it is no longer being
...
used for anything.
llvm-svn: 114067
2010-09-16 04:55:00 +00:00
Bob Wilson
76c730bdbd
When expanding ARM pseudo registers, copy the existing predicate operands
...
instead of using default predicates on the expanded instructions.
llvm-svn: 114066
2010-09-16 04:25:37 +00:00
Jim Grosbach
1c3e1420e1
store MC FP immediates as a double instead of as an APFloat, thus avoiding an
...
unnecessary dtor for MCOperand.
llvm-svn: 114064
2010-09-16 03:45:21 +00:00
Bob Wilson
b85d2897d5
Add missing break.
...
llvm-svn: 114048
2010-09-16 00:31:32 +00:00
Bob Wilson
c63e8b4d2d
Change VLDMQ and VSTMQ to be pseudo instructions. They are expanded after
...
register allocation to VLDMD and VSTMD respectively. This avoids using the
dregpair operand modifier.
llvm-svn: 114047
2010-09-16 00:31:02 +00:00
Owen Anderson
7321210916
Fix a threaded LLVM bug due the need for operator= on reference counted AttrListImpl's. It might
...
be possible to implement this very carefully to allow a lock-free implementation while still
avoiding illegal interleavings, but I haven't been able to figure one out.
llvm-svn: 114046
2010-09-16 00:27:35 +00:00
Jakob Stoklund Olesen
e37047a62f
Use the value mapping provided by LiveIntervalMap. This simplifies the code a
...
great deal because we don't have to worry about maintaining SSA form.
Unconditionally copy back to dupli when the register is live out of the split
range, even if the live-out value was defined outside the range. Skipping the
back-copy only makes sense when the live range is going to spill outside the
split range, and we don't know that it will. Besides, this was a hack to avoid
SSA update issues.
Clear up some confusion about the end point of a half-open LiveRange. Methinks
LiveRanges need to be closed so both start and end are included in the range.
The low bits of a SlotIndex are symbolic, so a half-open range doesn't really
make sense. This would be a pervasive change, though.
llvm-svn: 114043
2010-09-16 00:01:36 +00:00
Michael J. Spencer
4b7f13a515
System/Path: Add x86-64 COFF to IdentifyFileType.
...
llvm-svn: 114037
2010-09-15 23:04:14 +00:00
Owen Anderson
445e4de610
Since PassRegistry is currently a shared global object, it needs locking. While it might intuitively seem
...
that all the setup of this class currently happens at static initialization time, this misses the fact
that some later events can cause mutation of the PassRegistrationListeners list, and thus cause race issues.
llvm-svn: 114036
2010-09-15 23:03:33 +00:00
Michael J. Spencer
915ffb8284
System/Path: Add isObjectFile().
...
llvm-svn: 114032
2010-09-15 22:45:45 +00:00
Jim Grosbach
9375a03d98
Add support for the 'lane' modifier on vdup operands
...
llvm-svn: 114030
2010-09-15 22:13:23 +00:00
Rafael Espindola
8a987c002e
Add a InitSections method to the streamer interface.
...
The ELF implementation now creates text, data and bss to match the gnu as
behavior.
The text streamer still has the old MachO specific behavior since
the testsuite checks that it will error when a directive is given
before a setting the current section for example.
A nice benefit is that -n is not required anymore when producing
ELF files.
llvm-svn: 114027
2010-09-15 21:48:40 +00:00
Jakob Stoklund Olesen
1a38bba871
Remember VLDMQ.
...
llvm-svn: 114026
2010-09-15 21:40:11 +00:00
Jakob Stoklund Olesen
3896e52f08
Add missing break.
...
llvm-svn: 114025
2010-09-15 21:40:09 +00:00
Jim Grosbach
90aca3a6bf
Teach the MC disassembler to handle vmov.f32 and vmov.f64 immediate to register
...
moves. Previously, the immediate was printed as the encoded integer value,
which is incorrect.
llvm-svn: 114021
2010-09-15 21:04:54 +00:00
Jim Grosbach
2699e92c0e
move getRegisterNumbering() to out of ARMBaseRegisterInfo into the helper
...
functions in ARMBaseInfo.h so it can be used in the MC library as well.
For anything bigger than this, we may want a means to have a small support
library for shared helper functions like this. Cross that bridge when we
come to it.
llvm-svn: 114016
2010-09-15 20:26:25 +00:00
Eli Friedman
b5aea103fc
PR7959: Handle negative scales in GEPs correctly in BasicAA for non-64-bit
...
targets.
llvm-svn: 114015
2010-09-15 20:08:03 +00:00
Jim Grosbach
c85818a952
simplify getRegisterNumbering(). Remove the unused isSPVFP argument and
...
merge the common cases.
llvm-svn: 114013
2010-09-15 19:52:17 +00:00
Jim Grosbach
8a4ae35eed
Refactor uses of getRegisterNumbering() to not need the isSPVFP argument. Check
...
if the register is a member of the SPR register class directly instead.
llvm-svn: 114012
2010-09-15 19:44:57 +00:00
Jim Grosbach
c0b045a0ef
Reduce dependencies in the ARM MC instruction printer.
...
llvm-svn: 114009
2010-09-15 19:27:50 +00:00
Jim Grosbach
c74aeaa1c2
Fix spelling typo.
...
llvm-svn: 114008
2010-09-15 19:26:50 +00:00
Jim Grosbach
00f9682efa
Factor out basic enums and hleper functions from ARM.h for cleaner sharing
...
between the compiler back end and the MC libraries.
llvm-svn: 114007
2010-09-15 19:26:06 +00:00
Jim Grosbach
62fb975e6e
Add support for floating point immediates to MC instruction printing. ARM
...
VFP instructions use it for loading some constants, so implement that
handling.
Not thrilled with adding a member to MCOperand, but not sure there's much of
a better option that's not pretty fragile (like putting a double in the
union instead and just assuming that's good enough). Suggestions welcome...
llvm-svn: 113996
2010-09-15 18:47:08 +00:00
Devang Patel
e15f83013d
Check bb to ensure that alloca is in separate basic block.
...
This fixes funcargs.exp regression reported by gdb testsuite.
llvm-svn: 113992
2010-09-15 18:13:55 +00:00
Jakob Stoklund Olesen
36aeeb67c3
Recognize VST1q64Pseudo and VSTMQ as stack slot stores.
...
Recognize VLD1q64Pseudo as a stack slot load.
Reject these if they are loading or storing a subregister. The API (and
VirtRegRewriter) doesn't know how to deal with that.
llvm-svn: 113985
2010-09-15 17:27:09 +00:00
Bob Wilson
e7e2f983e5
Reapply Gabor's 113839, 113840, and 113876 with a fix for a problem
...
encountered while building llvm-gcc for arm. This is probably the same issue
that the ppc buildbot hit. llvm::prior works on a MachineBasicBlock::iterator,
not a plain MachineInstr.
llvm-svn: 113983
2010-09-15 17:12:08 +00:00
Gabor Greif
f7635897c8
the darwin9-powerpc buildbot keeps consistently crashing,
...
backing out following to get it back to green,
so I can investigate in peace:
svn merge -c -113840 llvm/test/CodeGen/ARM/arm-and-tst-peephole.ll
svn merge -c -113876 -c -113839 llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
llvm-svn: 113980
2010-09-15 16:53:07 +00:00
Jakob Stoklund Olesen
4a043370c4
Move ARM is{LoadFrom,StoreTo}StackSlot closer to their siblings so they won't be
...
forgotten in the future.
Coalesce identical cases in switch.
No functional changes intended.
llvm-svn: 113979
2010-09-15 16:36:26 +00:00
Bob Wilson
eb520cd057
Spelling fix.
...
llvm-svn: 113978
2010-09-15 16:28:21 +00:00
Mikhail Glushenkov
649b391de6
llvmc: make -x work with unknown suffixes.
...
llvm-svn: 113972
2010-09-15 15:20:41 +00:00
Devang Patel
fbc9fca6ac
If dbg.declare from non-entry block is using alloca from entry block then use offset available in StaticAllocaMap to emit DBG_VALUE. Right now, this has no material impact because varible info also collected using offset table maintained in machine module info.
...
llvm-svn: 113967
2010-09-15 14:48:53 +00:00
Chris Lattner
fff8e3495b
lcall and ljmp always default to lcalll and ljmpl. This finally
...
wraps up r8418316
llvm-svn: 113949
2010-09-15 05:30:20 +00:00
Chris Lattner
726aae87ee
apparently jmpl $1,$2 is an alias for ljmpl, similiarly
...
for call. Add this.
llvm-svn: 113948
2010-09-15 05:25:21 +00:00
Chris Lattner
5b8a3129a5
Disambiguate lcall/ljmp to the 32-bit version. This happens
...
even in 64-bit mode apparently.
llvm-svn: 113945
2010-09-15 05:14:54 +00:00
Chris Lattner
e542e3e2ad
fix the encoding of sldt GR16 to have the 0x66 prefix, and
...
add sldt GR32, which isn't documented in the intel manual
but which gas accepts. Part of rdar://8418316
llvm-svn: 113938
2010-09-15 04:45:10 +00:00
Chris Lattner
c4a2e044f3
implement aliases for shld/shrd, part of rdar://8418316
...
llvm-svn: 113937
2010-09-15 04:37:18 +00:00
Chris Lattner
ad73a2623c
fix rdar://8431880 - rcl/rcr with no shift amount not recognized
...
llvm-svn: 113936
2010-09-15 04:33:27 +00:00
Chris Lattner
c48bd41698
add various broken forms of fnstsw. I didn't add the %rax
...
version because it adds a prefix and makes even less sense
than the other broken forms. This wraps up rdar://8431422
llvm-svn: 113932
2010-09-15 04:15:16 +00:00
Chris Lattner
b6167a8674
add some aliases for f[u]comi, part of rdar://8431422
...
llvm-svn: 113930
2010-09-15 04:08:38 +00:00
Chris Lattner
c9f1a5cd94
add a bunch of aliases for fp operations with no operand,
...
rdar://8431422
llvm-svn: 113929
2010-09-15 04:04:33 +00:00
Chris Lattner
a9a15c74b1
Diagnose invalid instructions like "incl" with "too few operands for instruction"
...
instead of crashing. This fixes:
rdar://8431815 - crash when invalid operand is one that isn't present
llvm-svn: 113921
2010-09-15 03:50:11 +00:00
Bob Wilson
9d68270b2e
Use VLD1/VST1 pseudo instructions for loadRegFromStackSlot and
...
storeRegToStackSlot.
llvm-svn: 113918
2010-09-15 01:48:05 +00:00
Jim Grosbach
050a857211
trailing whitespace
...
llvm-svn: 113915
2010-09-15 01:01:45 +00:00
Dale Johannesen
c7739ca945
Add x86MMX a few more places.
...
llvm-svn: 113914
2010-09-15 00:52:23 +00:00
Chris Lattner
8729e47b8f
fix PR8144, a bug where constant merge would merge globals marked
...
attribute(used).
llvm-svn: 113911
2010-09-15 00:30:11 +00:00
Jim Grosbach
901a646188
Reapply r113875 with additional cleanups.
...
"The register specified for a dregpair is the corresponding Q register, so to
get the pair, we need to look up the sub-regs based on the qreg. Create a
lookup function since we don't have access to TargetRegisterInfo here to
be able to use getSubReg(ARM::dsub_[01])."
Additionaly, fix the NEON VLD1* and VST1* instruction patterns not to use
the dregpair modifier for the 2xdreg versions. Explicitly specifying the two
registers as operands is more correct and more consistent with the other
instruction patterns. This enables further cleanup of special case code in the
disassembler as a nice side-effect.
llvm-svn: 113903
2010-09-14 23:54:06 +00:00
Chris Lattner
cd4eadce11
add a terrible hack to allow out with dx is parens, a gas bug.
...
This fixes PR8114
llvm-svn: 113894
2010-09-14 23:34:29 +00:00
Dan Gohman
a2e5bf005e
Convert TBAA to use the new TBAATag field of AliasAnalysis::Location.
...
llvm-svn: 113892
2010-09-14 23:28:12 +00:00
Eric Christopher
c6075a71ad
Emit libcalls for SDIV, this requires some call infrastructure
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that needs to be shared a bit more widely around.
llvm-svn: 113886
2010-09-14 23:03:37 +00:00
Jim Grosbach
d7e8d8c018
revert 113875 momentarilly. Need to fix the MC disassembler to handle the
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change.
llvm-svn: 113878
2010-09-14 22:38:39 +00:00
Jim Grosbach
12d12f92ff
trailing whitespace cleanup
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llvm-svn: 113877
2010-09-14 22:27:15 +00:00
Gabor Greif
8856ba094b
an attempt to salvage the darwin9-powerpc buildbot, which could be miscompiling this line
...
llvm-svn: 113876
2010-09-14 22:25:16 +00:00
Jim Grosbach
d338306232
The register specified for a dregpair is the corresponding Q register, so to
...
get the pair, we need to look up the sub-regs based on the qreg. Create a
lookup function since we don't have access to TargetRegisterInfo here to
be able to use getSubReg(ARM::dsub_[01]).
llvm-svn: 113875
2010-09-14 22:20:33 +00:00
Gabor Greif
a9a9743d0d
set isCompare for another three Thumb1 instructions
...
llvm-svn: 113867
2010-09-14 22:00:50 +00:00
Jim Grosbach
a43d109cb3
Add predicate and 's' bit operands to PICADD instruction lowering.
...
llvm-svn: 113860
2010-09-14 21:28:17 +00:00
Dan Gohman
ebbc4df924
Remove the experimental AliasAnalysis::getDependency interface, which
...
isn't a good level of abstraction for memdep. Instead, generalize
AliasAnalysis::alias and related interfaces with a new Location
class for describing a memory location. For now, this is the same
Pointer and Size as before, plus an additional field for a TBAA tag.
Also, introduce a fixed MD_tbaa metadata tag kind.
llvm-svn: 113858
2010-09-14 21:25:10 +00:00
Bob Wilson
fcca92b837
Avoid warnings.
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llvm-svn: 113857
2010-09-14 21:12:05 +00:00
Jim Grosbach
6ade4ae68d
fix comment typo
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llvm-svn: 113856
2010-09-14 21:05:34 +00:00
Bob Wilson
1a69820d6d
Make NEON ld/st pseudo instruction classes take the instruction itinerary as
...
an argument, so that we can distinguish instructions with the same register
classes but different numbers of registers (e.g., vld3 and vld4). Fix some
of the non-pseudo NEON ld/st instruction itineraries to reflect the number
of registers loaded or stored, not just the opcode name.
llvm-svn: 113854
2010-09-14 20:59:49 +00:00
Owen Anderson
9f8f48f221
Remove the option to disable LazyValueInfo in JumpThreading, as it is now
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on by default and has received significant testing.
llvm-svn: 113852
2010-09-14 20:57:41 +00:00
Gabor Greif
32fefaf320
set comparable for a bunch of Thumb instructions
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llvm-svn: 113849
2010-09-14 20:47:43 +00:00
Gabor Greif
bd0b1357e0
must not peephole away side effects
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llvm-svn: 113848
2010-09-14 20:46:08 +00:00
Jim Grosbach
caaab2a7af
Don't ignore the CPSR implicit def when lowering a MachineInstruction to an MCInst.
...
llvm-svn: 113847
2010-09-14 20:41:27 +00:00
Jim Grosbach
c04a3f0ae5
Clarify comment
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llvm-svn: 113846
2010-09-14 20:35:46 +00:00
Devang Patel
632686ac96
Use frame index, if available for byval argument while lowering dbg_declare. Otherwise let getRegForValue() find register for this argument.
...
llvm-svn: 113843
2010-09-14 20:29:31 +00:00
Gabor Greif
357e2fe748
Eliminate a 'tst' that immediately follows an 'and'
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by morphing the 'and' to its recording form 'andS'.
This is basically a test commit into this area, to
see whether the bots like me. Several generalizations
can be applied and various avenues of code simplification
are open. I'll introduce those as I go.
I am aware of stylistic input from Bill Wendling, about
where put the analysis complexity, but I am positive
that we can move things around easily and will find a
satisfactory solution.
llvm-svn: 113839
2010-09-14 09:23:22 +00:00
Eric Christopher
3d2aa0da5f
Fix QOpcode assignment to Opc.
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llvm-svn: 113837
2010-09-14 08:31:25 +00:00
Michael J. Spencer
26fe225080
CBackend: Fix MSVC build.
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This may produce warnings on MSVS, but it's better than failures.
llvm-svn: 113834
2010-09-14 04:27:38 +00:00
Michael J. Spencer
a845c8d2ff
CBackend: Cleanup whitespace before I do this next commit.
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llvm-svn: 113833
2010-09-14 04:27:26 +00:00
Dan Gohman
2a6b987773
When a function-local value with function-local metadata uses gets RAUWed with a
...
non-function-local value, it may result in the metadata no longer needing to be
function-local. Check for this condition, and clear the isFunctionLocal flag, if
it's still in the uniquing map, since any node in the uniquing map needs to have
an accurate function-local flag.
Also, add an assert to help catch problematic cases.
llvm-svn: 113828
2010-09-14 01:37:57 +00:00
Chris Lattner
0718ff9be2
fix PR8102, a case where we'd copyValue from a value that we already
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deleted. Fix this by doing the copyValue's before we delete stuff!
The testcase only repros the problem on my system with valgrind.
llvm-svn: 113820
2010-09-14 00:19:00 +00:00
Michael J. Spencer
90f807fda5
Revert "CMake: Get rid of LLVMLibDeps.cmake and export the libraries normally."
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This reverts commit r113632
Conflicts:
cmake/modules/AddLLVM.cmake
llvm-svn: 113819
2010-09-13 23:59:48 +00:00
Bob Wilson
ba02d5b620
Convert some VTBL and VTBX instructions to use pseudo instructions prior to
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register allocation. Remove the NEONPreAllocPass, which is no longer needed.
Yeah!!
llvm-svn: 113818
2010-09-13 23:55:10 +00:00
Jakob Stoklund Olesen
52d3045d23
Mechanically replace LiveInterval* with LiveIntervalMap for intervals being
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edited without actually using LiveIntervalMap functionality.
llvm-svn: 113816
2010-09-13 23:29:11 +00:00
Jakob Stoklund Olesen
060ad376c4
Allow LiveIntervalMap to be reused by resetting the current live interval.
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llvm-svn: 113815
2010-09-13 23:29:09 +00:00
Bob Wilson
6f35180bec
Switch all the NEON vld-lane and vst-lane instructions over to the new
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pseudo-instruction approach. Change ARMExpandPseudoInsts to use a table
to record all the NEON load/store information.
llvm-svn: 113812
2010-09-13 23:01:35 +00:00
Jakob Stoklund Olesen
0e83d54b2a
Let's just declare that it is impossible to construct a std::pair from a null
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pointer and work around that.
llvm-svn: 113788
2010-09-13 21:29:45 +00:00
Dale Johannesen
eb807a15a3
Fix typos. 128-bit PSHUFB takes 128-bit memory op.
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v8i16 is not an MMX type; put it where it belongs.
llvm-svn: 113785
2010-09-13 21:15:43 +00:00
Benjamin Kramer
9859d9eee4
Fix linux/msvc build, move include.
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llvm-svn: 113776
2010-09-13 20:04:49 +00:00
Owen Anderson
ae195f79a4
Minimize #includes in a top-level header.
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llvm-svn: 113772
2010-09-13 18:47:42 +00:00
Eric Christopher
02df36a2fb
Silence more warnings. Two more unused variables.
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llvm-svn: 113771
2010-09-13 18:30:57 +00:00
Eric Christopher
6d1cd6fab4
Remove unused variable.
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llvm-svn: 113769
2010-09-13 18:27:59 +00:00
Jim Grosbach
a02bbe95be
trailing whitespace
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llvm-svn: 113768
2010-09-13 18:25:42 +00:00
Eric Christopher
591bd5b692
Silence some constructor ordering warnings.
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llvm-svn: 113767
2010-09-13 18:25:05 +00:00
John Thompson
ae3a86d6de
Added skeleton for inline asm multiple alternative constraint support.
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llvm-svn: 113766
2010-09-13 18:15:37 +00:00
Dan Gohman
29644ff388
Add full auto-upgrade support for LLVM 2.7 bitcode metadata.
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llvm-svn: 113764
2010-09-13 18:00:48 +00:00
Owen Anderson
9c34a7831d
Re-apply r113679, which was reverted in r113720, which added a paid of new instcombine transforms
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to expose greater opportunities for store narrowing in codegen. This patch fixes a potential
infinite loop in instcombine caused by one of the introduced transforms being overly aggressive.
llvm-svn: 113763
2010-09-13 17:59:27 +00:00
Rafael Espindola
5b005d087c
Factoring and potential bug fix. The elf "flags" cannot be used as masks.
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For example, setting STT_OBJECT (1) and STT_FUNC (2), should not produce
a STT_SECTION (3).
llvm-svn: 113759
2010-09-13 17:39:45 +00:00
Michael J. Spencer
29dfbc4fbb
CMake: Fix MSVS build. Although I don't know why this didn't break other build systems...
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This problem is unrelated to the recent dependency tracking change. It
seems like noone noticed the problem because I don't think anyone compiles
any target other than X86 on windows.
llvm-svn: 113727
2010-09-12 18:32:57 +00:00
Eric Christopher
d4aaabfa74
Revert 113679, it was causing an infinite loop in a testcase that I've sent
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on to Owen.
llvm-svn: 113720
2010-09-12 06:09:23 +00:00