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Commit Graph

190247 Commits

Author SHA1 Message Date
Sanjay Patel
5e10616d04 [IR] add unit test for Constant::isElementWiseEqual() for undef corner case; NFC 2020-01-17 08:26:00 -05:00
Sam Parker
1f52bc1a15 [ARM][MVE] Tail Predicate IsSafeToRemove
Introduce a method to walk through use-def chains to decide whether
it's possible to remove a given instruction and its users. These
instructions are then stored in a set until the end of the transform
when they're erased. This is now used to perform checks on the
iteration count (LoopDec chain), element count (VCTP chain) and the
possibly redundant iteration count.

As well as being able to remove chains of instructions, we know also
check that the sub feeding the vctp is producing the expected value.

Differential Revision: https://reviews.llvm.org/D71837
2020-01-17 13:19:14 +00:00
Fedor Sergeev
503e66bdc2 [BasicBlock] fix looping in getPostdominatingDeoptimizeCall
Blindly following unique-successors chain appeared to be a bad idea.
In a degenerate case when block jumps to itself that goes into endless loop.

Discovered this problem when playing with additional changes,
managed to reproduce it on existing LoopPredication code.

Fix by checking a "visited" set while iterating through unique successors.

Reviewed By: skatkov

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D72908
2020-01-17 15:40:02 +03:00
Miloš Stojanović
f27b780153 [llvm-exegesis][mips] Add support for memory instructions
Implementing functions used to enable testing of memory instructions.

Differential Revision: https://reviews.llvm.org/D72858
2020-01-17 13:26:09 +01:00
Cullen Rhodes
75e355b62f [AArch64][SVE] Add break intrinsics
Summary:
Implements the following intrinsics:

    * @llvm.aarch64.sve.brka
    * @llvm.aarch64.sve.brka.z
    * @llvm.aarch64.sve.brkb
    * @llvm.aarch64.sve.brkb.z
    * @llvm.aarch64.sve.brkn.z
    * @llvm.aarch64.sve.brkpa.z
    * @llvm.aarch64.sve.brkpb.z

Reviewers: sdesmalen, efriedma, dancgr, mgudim, cameron.mcinally, rengolin

Reviewed By: sdesmalen

Subscribers: tschuett, kristof.beyls, hiraditya, rkruppe, psnobl, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D72393
2020-01-17 11:47:08 +00:00
Simon Pilgrim
3d9a43315e [SelectionDAG] Better ISD::ANY_EXTEND/ISD::ANY_EXTEND_VECTOR_INREG ComputeKnownBits support
Add DemandedElts handling to ISD::ANY_EXTEND and add missing ISD::ANY_EXTEND_VECTOR_INREG handling. Despite the lack of test changes this code IS being used - its just that the ANY_EXTEND ops are legalized later on (typically to ZERO_EXTEND equivalents) so we typically manage to combine later on.
2020-01-17 11:37:58 +00:00
David Spickett
7d570d46c1 [AsmParser] Make generic directives and aliases case insensitive.
GCC will accept any case for assembler directives.
For example ".abort" and ".ABORT" (even ".aBoRt")
are equivalent.

https://sourceware.org/binutils/docs/as/Pseudo-Ops.html#Pseudo-Ops
"The names are case insensitive for most targets,
and usually written in lower case."

Change llvm-mc to accept any case for generic directives
or aliases of those directives.

This for Bugzilla #39527.

Differential Revision: https://reviews.llvm.org/D72686
2020-01-17 11:02:56 +00:00
Kerry McLaughlin
0d8f1e189e [AArch64][SVE] Add ImmArg property to intrinsics with immediates
Summary:
Several SVE intrinsics with immediate arguments (including those
added by D70253 & D70437) do not use the ImmArg property.
This patch adds ImmArg<Op> where required and changes
the appropriate patterns which match the immediates.

Reviewers: efriedma, sdesmalen, andwar, rengolin

Reviewed By: efriedma

Subscribers: tschuett, kristof.beyls, hiraditya, rkruppe, psnobl, cfe-commits, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D72612
2020-01-17 10:47:55 +00:00
Dmitri Gribenko
bac0121a4b Revert "Avoid creating an immutable map in the Automaton class."
This reverts commit 051d330314cb1f175025ca37da8e5e1d851e1790. It broke
buildbots, for example,
http://lab.llvm.org:8011/builders/clang-x86_64-debian-fast/builds/21908.
2020-01-17 10:20:36 +01:00
Hans Wennborg
269a6bd0b2 Remove old Suversion release scripts 2020-01-17 09:35:34 +01:00
Lang Hames
0330b8cc1e [docs][ORC] Try to fix 'title-level inconsistent' error in ORCv2.rst. 2020-01-16 21:46:35 -08:00
Lang Hames
500792d823 [docs][ORC] Fix some RST errors in the ORCv2 doc. 2020-01-16 21:10:56 -08:00
Craig Topper
83deb561a0 [Transforms][RISCV] Remove a "using namespace llvm" from an include file. Fix a place that became dependent on it.
This include file was created in October and has a "using namespace llvm". This seems to get exposed to other include files and finally onto cpp files. While this somewhat okay for llvm itself, its bad for other projects that use llvm as a library and includes a header file that picks this up. This was found by ISPC which has some class names at gloal scope with the same names as LLVM.

It looks like RISCV accidentally became dependent on this. I fixed it by reordering some includes in the RISCV code, but maybe we want to change the TableGenEmitter to put "namespace llvm {" in the generated file instead? But we probably want to do the simplest thing first so we can merge it to 10.0.

Differential Revision: https://reviews.llvm.org/D72895
2020-01-16 20:50:41 -08:00
Lang Hames
aaf8c6c148 [docs][ORC] Update the "utilities" section, tidy intro and fix typo.
This patch updates the formatting and language of the Features section of the
ORCv2 design document. It also fixes a TBD by adding discussion of the
absoluteSymbols, symbolAliases, and reexports utilities.

Typos found during editing were also fixed.
2020-01-16 20:08:39 -08:00
Matt Arsenault
c3b5720619 AMDGPU: Add register classes to MUBUF load patterns 2020-01-16 22:00:44 -05:00
Marcello Maggioni
8c76dbff6b Avoid creating an immutable map in the Automaton class.
Summary:
In the DFAPacketizer we copy the Transitions array
into a map in order to later access the transitions
based on a "Current State/Action" pair as a key.
This map lives in the Automaton object used by the DFAPacketizer.
It is never changed during the life of the object after
having been created during the creation of the Automaton
itself.

This map creation can make the creation of a DFAPacketizer
quite expensive if the target contains a considerable
amount of transition states.

Considering that TableGen already generates a
sorted list of transitions by State/Action pairs
we could just use that directly in our Automaton
and search entries with std::lower_bound instead of copying
it in a map and paying the execution time and memory cost.

Reviewers: jmolloy, ThomasRaoux

Subscribers: llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D72682
2020-01-16 18:44:20 -08:00
Steven Wan
fdc7cc8bf4 [NFC][PowerPC] Remove unnecessary link components.
Remove unused link components for PowerPC target unittest according
to post commit comments. This is a redo for a previous commit
"fc4e43ad618b" that removed a few components that are necessary
when libraries are to be built shared (i.e., BUILD_SHARED_LIBS=ON).
2020-01-16 21:22:51 -05:00
Zakk Chen
1ed22e6edf Revert "[RISCV] Support ABI checking with per function target-features"
This reverts commit 7bc58a779aaa1de56fad8b1bc8e46932d2f2f1e4.
It breaks EXPENSIVE_CHECKS on Windows
2020-01-16 18:01:07 -08:00
Steven Wan
b7039fc72e Add back more link components.
Add all previous link components back to unblock bots for the moment.
In the meantime, I'm investigating the BUILD_SHARED_LIBS=ON build to
find out the minimal list of components needed.
2020-01-16 20:19:25 -05:00
Max Sherman
c822a4fd0d [xray] add --no-demangle cli opt for llvm-xray extract to output mangled names
This adds an additional cli flag for the llvm-xray extract tool.  This
is useful if you're more interested in consuming the mangled symbol
name, instead of the default now which is demangled.

Differential Revision: https://reviews.llvm.org/D72804
2020-01-16 16:37:00 -08:00
Davide Italiano
928fba3079 [FastISel] Lower llvm.dbg.value(undef, ... correctly.
Summary:
Instead of just dropping them.

<rdar://problem/58657146>

Reviewers: aprantl, vsk, ab, paquette, echristo

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D72877
2020-01-16 16:22:20 -08:00
Steven Wan
6b52bd5e43 Add back other PowerPC link components.
Add the link components back to unblock bots for the moment. In the
meantime, I'm investigating the BUILD_SHARED_LIBS=ON build to find
out the minimal list of components needed.
2020-01-16 19:14:39 -05:00
Eric Christopher
0956bb7062 Move static function to inline function - this fixes a conceivable
ODR violation and a clang-tidy warning about an unused function
in a number of translation units.
2020-01-16 16:12:46 -08:00
Nico Weber
02bc480b15 [gn build] replace llvm_allow_tardy_revision with llvm_append_vc_rev
Previously, the gn build would create VCSRevision.h / VCSVersion.h
files with some LLD_REVISION / LLVM_REVISION / CLANG_REVISION but
by default wouldn't add a dependency on .git/logs/HEAD so that
the step doesn't rerun after every branch switch or every pull.

That's bad for deterministic builds, and having --version print
some arbitrarily old revision isn't great either.

Instead, move to the model that the cmake build (now) uses fairly
consistently: If llvm_append_vc_rev is set, include the revision,
else don't.

Since the GN build is focused on developers, set llvm_append_vc_rev
to false instead of true by default (different from the cmake build),
so that things don't rebuild after every branch switch and every
pull.

While here, also remove some pre-monorepo code.

Differential Revision: https://reviews.llvm.org/D72859
2020-01-16 19:05:07 -05:00
Nico Weber
6be5d5bda8 Make LLVM_APPEND_VC_REV=OFF affect clang, lld, and lldb as well.
When LLVM_APPEND_VC_REV=OFF is set, the current git hash is no
longer embedded into binaries (mostly for --version output).
Without it, most binaries need to relink after every single
commit, even if they didn't change otherwise (due to, say,
a documentation-only commit).

LLVM_APPEND_VC_REV is ON by default, so this doesn't change the
default behavior of anything.

With this, all clients of GenerateVersionFromVCS.cmake honor
LLVM_APPEND_VC_REV.

Differential Revision: https://reviews.llvm.org/D72855
2020-01-16 19:04:08 -05:00
David Blaikie
6bae49b565 PointerLikeTypeTraits: Standardize NumLowBitsAvailable on static constexpr rather than anonymous enum
This is (more?) usable by GDB pretty printers and seems nicer to write.

There's one tricky caveat that in C++14 (LLVM's codebase today) the
static constexpr member declaration is not a definition - so odr use of
this constant requires an out of line definition, which won't be
provided (that'd make all these trait classes more annoyidng/expensive
to maintain). But the use of this constant in the library implementation
is/should always be in a non-odr context - only two unit tests needed to
be touched to cope with this/avoid odr using these constants.

Based on/expanded from D72590 by Christian Sigg.
2020-01-16 15:30:50 -08:00
Eric Christopher
40942db2ce [NFC] Fold isHugeExpression into hasHugeExpression and update callers
accordingly.
2020-01-16 15:28:54 -08:00
Jessica Paquette
5ae7bf2aca [AArch64][GlobalISel] Change G_FCONSTANTs feeding into stores into G_CONSTANTS
Given the following situation:

x = G_FCONSTANT (something that can't be materialized)
G_STORE x, some_addr

We know that x must be materialized as at least a single mov. However, at the
time of selection, the G_STORE will have been regbankselected to a FPR store.

So, as a result, you'll get an unnecessary fmov into the G_STORE.

Storing a constant value in a GPR and a constant value in a FPR are the same.
So, whenever you see a G_FCONSTANT that feeds into only G_STORES, so might as
well make it a G_CONSTANT.

This adds a target-specific combine which changes G_FCONSTANTs feeding into
G_STOREs into G_CONSTANTs.

Differential Revision: https://reviews.llvm.org/D72814
2020-01-16 15:18:44 -08:00
Derek Schuff
50c21552f7 Revert "[WebAssembly] Track frame registers through VReg and local allocation"
This reverts commit 3a05c3969c18b5520e360b78fc63cda39a6be98f.
It breaks under expensive-checks and on Windows
2020-01-16 14:38:00 -08:00
Matt Arsenault
02f8021821 AMDGPU: Do permlane16 vdst_in discard optimization in InstCombine
There's more potential value to discarding the source value earlier,
since we always know the value of the fi/bc bits.
2020-01-16 17:27:53 -05:00
Matt Arsenault
ec9629b24b AMDGPU: Move permlane discard vdst_in optimization
This case can be handled as a regular selection pattern, so move it
out of the weird post-isel folding code which doesn't have an exactly
equivalent place in GlobalISel.

I think it doesn't make much sense to do this optimization here
though, and it would be more useful in instcombine. There's not really
any new information that will be gained during lowering since these
inputs were known from the beginning.
2020-01-16 17:27:53 -05:00
Sam Clegg
641286a21a [llvm-nm] Use StringRef over const std::string & params
Differential Revision: https://reviews.llvm.org/D72718
2020-01-16 14:02:58 -08:00
Derek Schuff
ce9124de54 [WebAssembly] Track frame registers through VReg and local allocation
This change has 2 components:

Target-independent: add a method getDwarfFrameBase to TargetFrameLowering. It
describes how the Dwarf frame base will be encoded.  That can be a register (the
default), the CFA (which replaces NVPTX-specific logic in DwarfCompileUnit), or
a DW_OP_WASM_location descriptr.

WebAssembly: Allow WebAssemblyFunctionInfo::getFrameRegister to return the
correct virtual register instead of FP32/SP32 after WebAssemblyReplacePhysRegs
has run.  Make WebAssemblyExplicitLocals store the local it allocates for the
frame register. Use this local information to implement getDwarfFrameBase

The result is that the DW_AT_frame_base attribute is correctly encoded for each
subprogram, and each param and local variable has a correct DW_AT_location that
uses DW_OP_fbreg to refer to the frame base.

Differential Revision: https://reviews.llvm.org/D71681
2020-01-16 13:51:17 -08:00
Sanjay Patel
bc125ae78b [IR] fix crash in Constant::isElementWiseEqual() with FP types
We lifted this code from InstCombine for general usage in:
rL369842
...but it's not safe as-is. There are no existing users that can
trigger this bug, but I discovered it via crashing several
regression tests when trying to use it for select folding in
InstSimplify.

ICmp requires (vector) integer types, so give up on anything that's
not integer or FP (pointers and ?) then bitcast the constants
before trying the match. That matches the definition of "equal or
undef" that I was looking for. If someone wants an FP-aware version
of equality (deal with NaN, -0.0), that could be a different mode
or different function.

Differential Revision: https://reviews.llvm.org/D72784
2020-01-16 16:49:16 -05:00
LLVM GN Syncbot
3c615417b5 [gn build] Port d5c6b8407c1 2020-01-16 21:35:08 +00:00
StevenWanYu
17feeab184 [NFC] Remove unnecessary link components.
Remove unused link components in unittest according to post commit
comments.
2020-01-16 16:08:07 -05:00
Krzysztof Parzyszek
3a2fdd005e [Hexagon] Add ELF flags for Hexagon v66 to ELFYAML.cpp 2020-01-16 15:01:00 -06:00
Fedor Sergeev
bf9f1ee39d [GVN] add GVN parameters parsing to new pass manager
Introduce parsing, add a few instances of parameter use into GVN-PRE tests.

Reviewers: skatkov, asbirlea
Reviewed By: skatkov

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D72752
2020-01-16 23:53:46 +03:00
Kazu Hirata
bed83094ca Resubmit: [JumpThreading] Thread jumps through two basic blocks
This reverts commit 2d258ed931cdf47a7d1dcf08ad963b5452a8670f.  This
revision fixes the Windows build and adds a testcase for it, namely
thread-two-bbs3.ll.  My original patch improperly copied EH pads on
Windows.  This patch disregards jump threading opportunities having to
do with EH pads.

[JumpThreading] Thread jumps through two basic blocks

Summary:
This patch teaches JumpThreading.cpp to thread through two basic
blocks like:

  bb3:
    %var = phi i32* [ null, %bb1 ], [ @a, %bb2 ]
    %tobool = icmp eq i32 %cond, 0
    br i1 %tobool, label %bb4, label ...

  bb4:
    %cmp = icmp eq i32* %var, null
    br i1 %cmp, label bb5, label bb6

by duplicating basic blocks like bb3 above.  Once we duplicate bb3 as
bb3.dup and redirect edge bb2->bb3 to bb2->bb3.dup, we have:

  bb3:
    %var = phi i32* [ @a, %bb2 ]
    %tobool = icmp eq i32 %cond, 0
    br i1 %tobool, label %bb4, label ...

  bb3.dup:
    %var = phi i32* [ null, %bb1 ]
    %tobool = icmp eq i32 %cond, 0
    br i1 %tobool, label %bb4, label ...

  bb4:
    %cmp = icmp eq i32* %var, null
    br i1 %cmp, label bb5, label bb6

Then the existing code in JumpThreading.cpp can thread edge
bb3.dup->bb4 through bb4 and eventually create bb3.dup->bb5.

Reviewers: wmi

Subscribers: hiraditya, jfb, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D70247
2020-01-16 12:33:37 -08:00
StevenWanYu
863a3802fa Address redirect issue on Windows. 2020-01-16 15:07:50 -05:00
Matt Arsenault
2373a4fd8d AMDGPU: Remove outdated comment 2020-01-16 14:54:27 -05:00
StevenWanYu
8e3115ca8a Don't run powerpc lit test case on other platforms.
Only run this test on powerpc tragets, because other platforms might
not have powerpc registered.
2020-01-16 14:37:25 -05:00
Matt Arsenault
077968a109 AMDGPU: Update more tests to use modern buffer intrinsics 2020-01-16 14:29:38 -05:00
Matt Arsenault
408e513c5f AMDGPU/GlobalISel: Improve lowering of G_SEXT_INREG
Clamping the scalar is much better than lowering with superwide shifts
for types > s64.
2020-01-16 14:29:37 -05:00
Matt Arsenault
552fe4c9ba GlobalISel: Don't ignore requested ext narrowing type
This was assuming the narrow target was the source type. Respect the
requested type when these don't match by using intermediate
merges. This avoids producing very wide, illegal shift expansions.
2020-01-16 14:29:37 -05:00
Matt Arsenault
205916c405 GlobalISel: Move extension scalar narrowing to separate function
Also rename a few things. Handling a different requested type will
require this to become much more complex.
2020-01-16 14:29:37 -05:00
Krzysztof Parzyszek
447f535a6a [Hexagon] Update autogeneated intrinsic information in LLVM 2020-01-16 13:11:18 -06:00
Craig Topper
ee6566c72b [LegalizeDAG][Mips] Add an assert to protect a uint_to_fp implementation from double rounding. Add a i32->f32 uint_to_fp implementation that avoids this code.
The algorithm here only works if the sint_to_fp doesn't do any
rounding. Otherwise it can round before the offset fixup is
applied. Add an assert to protect this.

To avoid breaking the one test in tree that tested this code
with a set of types that fail the assert, I've enabled i32->f32
to use the i64->f32 algorithm. This only occurs when f64 isn't
a legal type. If f64 is legal then we do i32->f64->f32 instead.

Differential Revision: https://reviews.llvm.org/D72794
2020-01-16 11:08:16 -08:00
Matt Arsenault
353036eab7 AMDGPU: Remove IR section from MIR test
Also generate check lines so this isn't just testing the meaningless
block name.
2020-01-16 13:49:44 -05:00
Matt Arsenault
69451d9bc3 GlobalISel: Apply target MMO flags to atomics
Unify MMO flag handling with SelectionDAG like with loads and stores.
2020-01-16 13:49:43 -05:00