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Author SHA1 Message Date
Bill Wendling
5fde821884 SystemZ really does mean "has calls" and not just "adjusts stack." Go ahead and 
replace the check with the appropriate predicate. Modify the testcase to reflect
the correct code. (It should be saving callee-saved registers on the stack
allocated by the calling fuction.)

llvm-svn: 103829
 2010-05-14 22:17:42 +00:00
Jakob Stoklund Olesen
21bd5b7fbb Track allocatable instead of reserved regs, and never take an unallocatable hint. 
llvm-svn: 103828
 2010-05-14 22:02:56 +00:00
Dan Gohman
97d22ade75 Don't set kill flags for instructions which the scheduler has cloned. 
llvm-svn: 103827
 2010-05-14 22:01:14 +00:00
Dan Gohman
8a798dcca9 BR is a barrier. 
llvm-svn: 103826
 2010-05-14 22:00:27 +00:00
Bill Wendling
8a2afec7c1 Several tail call tests apparently rely upon this being "adjusts stack" instead 
of "has calls". That's probably wrong, but it needs further
investigation. Revert to the original behavior until this is settled.

llvm-svn: 103824
 2010-05-14 21:58:35 +00:00
Jakob Stoklund Olesen
295d11f215 Avoid scanning the long tail of physreg operands on calls 
llvm-svn: 103823
 2010-05-14 21:55:52 +00:00
Devang Patel
e54dbcd4bf Do not forget to mark prcessed arguments. 
llvm-svn: 103822
 2010-05-14 21:55:50 +00:00
Jakob Stoklund Olesen
83d4c31c0b Count coalesced copies 
llvm-svn: 103821
 2010-05-14 21:55:50 +00:00
Jakob Stoklund Olesen
89a21b1cc3 Allow virtreg redefines when verifying for RegAllocFast 
llvm-svn: 103820
 2010-05-14 21:55:44 +00:00
Bill Wendling
d5fb80cbf4 This should happen if there are no calls, not if it just doesn't adjust the 
stack.

llvm-svn: 103813
 2010-05-14 21:38:44 +00:00
Bill Wendling
adcbee9547 Revert r103804. The comment is correct. 
llvm-svn: 103808
 2010-05-14 21:28:24 +00:00
Jim Grosbach
869f73322d Remove trailing whitespace 
llvm-svn: 103807
 2010-05-14 21:20:46 +00:00
Jim Grosbach
f15a56edfc 80 column and trailing whitespace cleanup 
llvm-svn: 103806
 2010-05-14 21:19:48 +00:00
Jim Grosbach
7a50cfb682 add cmd line option to leave dbgvalues in during post-RA sceduling. Useful 
while debugging what's mishandled about them in the post-RA pass.

llvm-svn: 103805
 2010-05-14 21:18:04 +00:00
Bill Wendling
b2c38c02ea Fix comment. 
llvm-svn: 103804
 2010-05-14 21:17:29 +00:00
Bill Wendling
e346a38ed4 Rename "HasCalls" in MachineFrameInfo to "AdjustsStack" to better describe what 
the variable actually tracks.

N.B., several back-ends are using "HasCalls" as being synonymous for something
that adjusts the stack. This isn't 100% correct and should be looked into.

llvm-svn: 103802
 2010-05-14 21:14:32 +00:00
Devang Patel
6bbba26bf1 Test case for r103800. 
llvm-svn: 103801
 2010-05-14 21:04:45 +00:00
Dan Gohman
6517cc1dd9 Lowering of atomic instructions can result in operands being 
used more than once. If ISel had put a kill flag on one of them,
it's not valid to transfer the kill flag to each new instance.

llvm-svn: 103799
 2010-05-14 21:01:44 +00:00
Devang Patel
2b99c27e47 Add support to preserve type info for the variables that are removed by the optimizer. 
llvm-svn: 103798
 2010-05-14 21:01:35 +00:00
Jakob Stoklund Olesen
4715605740 When verifying two-address instructions, check the following: 
- Kill is implicit when use and def registers are identical.
- Only virtual registers can differ.

Add a -verify-fast-regalloc to run the verifier before the fast allocator.

llvm-svn: 103797
 2010-05-14 20:28:32 +00:00
Kevin Enderby
dc13d89540 Fix so "int3" is correctly accepted, added "into" and fixed "int" with an 
argument, like "int $4", to not get an Assertion error.

llvm-svn: 103791
 2010-05-14 19:16:02 +00:00
Evan Cheng
ab9e0f7315 Model VLD*_UPD and VLD*odd_UPD pair with REG_SEQUENCE. 
llvm-svn: 103790
 2010-05-14 18:54:59 +00:00
Daniel Dunbar
89a1d9036a MC/Mach-O/x86_64: Darwin's special "signed_N" relocation types should only be 
used to replace a normal relocation, not a reference to a GOT entry.

llvm-svn: 103789
 2010-05-14 18:53:40 +00:00
Jakob Stoklund Olesen
3eac02b22f Simplify the handling of physreg defs and uses in RegAllocFast. 
This adds extra security against using clobbered physregs, and it adds kill
markers to physreg uses.

llvm-svn: 103784
 2010-05-14 18:03:25 +00:00
Dan Gohman
dc05cdd475 Set isTerminator on TRAP instructions. 
llvm-svn: 103778
 2010-05-14 16:46:02 +00:00
Dan Gohman
c0438974b2 Don't use isBarrier for the PowerPC sync instruction. isBarrier is for 
control barriers, not memory ordering barriers.

llvm-svn: 103777
 2010-05-14 16:42:16 +00:00
Dan Gohman
b0f18b9c6c Add mayLoad and mayStore flags to instructions which missed them. 
llvm-svn: 103776
 2010-05-14 16:34:55 +00:00
Dan Gohman
79033132d7 Use regular PassManager instead of FunctionPassManager in opt, since it 
isn't doing lazy streaming. This also fixes a missing doFinalization call.

llvm-svn: 103774
 2010-05-14 15:36:54 +00:00
Dan Gohman
6815a4c74d Use PassManagerBase, to give clients the option of using either 
FunctionPassManager or regular PassManager.

llvm-svn: 103773
 2010-05-14 15:35:10 +00:00
Dan Gohman
9383d0f144 Add an isNodeHidden to the graph traits, to support definition of 
subgraph views.

llvm-svn: 103772
 2010-05-14 15:29:31 +00:00
Daniel Dunbar
3c261b3ff8 XFAIL the test I added with vg_leak, apparently it is the first and only llc 
-filetype=obj test, and -filetype=obj leaks a few objects. Added a FIXME, we
need to sort out the ownership model for the various MC objects.

llvm-svn: 103769
 2010-05-14 07:47:51 +00:00
Evan Cheng
ec0d7e6cf2 Get rid of the bit twiddling to read / set OpActions and ValueTypeActions. The small saving in memory isn't worth the increase in runtime and code complexity in my opinion. 
llvm-svn: 103768
 2010-05-14 07:37:40 +00:00
Daniel Dunbar
26fa01eb86 Inline Asm: Ensure buffer is newline terminated to match how the text is printed. 
- This is a hack, but I can't decide the best place to handle this. Chris?

llvm-svn: 103765
 2010-05-14 04:31:50 +00:00
Jakob Stoklund Olesen
892983155c Enable opportunistic coalescing 
llvm-svn: 103764
 2010-05-14 04:30:51 +00:00
Evan Cheng
2af2c9fa14 Added a QQQQ register file to model 4-consecutive Q registers. 
llvm-svn: 103760
 2010-05-14 02:13:41 +00:00
Eric Christopher
ebea91f168 Add AsmParser support for darwin tbss directive. 
Nothing uses this yet.

llvm-svn: 103757
 2010-05-14 01:50:28 +00:00
Eric Christopher
0b3085ae2e Fix a couple of typos. 
llvm-svn: 103756
 2010-05-14 01:38:54 +00:00
Nick Lewycky
aeb998db39 Fix typo. 
llvm-svn: 103755
 2010-05-14 01:02:48 +00:00
Daniel Dunbar
7fee3c7b28 MC: Switch to completely lazy layout. 
- The eliminates the last major algorithmic problem with MC.

llvm-svn: 103754
 2010-05-14 00:51:14 +00:00
Daniel Dunbar
66c2ccec2d MC: Extend MCAsmLayout to explicitly track which fragments have been layed out, and enforce several invariants to LayoutFragment to ensure we only do layout in a sensible order. 
llvm-svn: 103753
 2010-05-14 00:37:21 +00:00
Daniel Dunbar
bfc0b2083d MC: Implicitly assign section addresses when the previous fragment is layed out. 
llvm-svn: 103752
 2010-05-14 00:37:17 +00:00
Daniel Dunbar
11467b2eaa MC: Switch MCFragment to storing the layout order index, not its index in the file. 
llvm-svn: 103751
 2010-05-14 00:37:14 +00:00
Daniel Dunbar
b2a98e0a16 MC: Change LayoutSection() to only do the section initializiation. 
Also, elimminate MCAsmLayout::set*, which are no longer needed.

llvm-svn: 103750
 2010-05-14 00:37:11 +00:00
Evan Cheng
d1f60c198d Fix comments. 
llvm-svn: 103749
 2010-05-14 00:21:45 +00:00
Jakob Stoklund Olesen
f913d9f2b8 Trust kill flags from isel and later passes. 
llvm-svn: 103748
 2010-05-14 00:02:23 +00:00
Jakob Stoklund Olesen
aa38789fd4 Fix an embarrassing runtime regression for RegAllocFast. 
This loop is quadratic in the capacity for a DenseMap:

  while(!map.empty())
    map.erase(map.begin());

Instead we now do a normal begin() - end() iteration followed by map.clear().
That also has the nice sideeffect of shrinking the map capacity on demand.

llvm-svn: 103747
 2010-05-14 00:02:20 +00:00
Evan Cheng
775549c9e7 Adding a v8i64 512-bit vector type. This will be used to model ARM NEON intrinsics which translate into a pair of vld / vst instructions that can load / store 8 consecutive 64-bit (D) registers. 
llvm-svn: 103746
 2010-05-13 23:55:47 +00:00
Dale Johannesen
9f19b6a761 Implement a correct ui64->f32 conversion. The old 
one was subject to double rounding in extreme cases.

llvm-svn: 103744
 2010-05-13 23:50:42 +00:00
Evan Cheng
5e115a09ec Eliminate use of magic numbers to access OpActions. It also has the effect of allowing more than 31 scalar value types. MAX_ALLOWED_VALUETYPE had already been updated to 64 a while back. 
llvm-svn: 103743
 2010-05-13 23:25:21 +00:00
Evan Cheng
f2572ea73b Fix up LoadExtActions, TruncStoreActions, and IndexedModeActions representation and setter and getter's so they will continue to work if the number of scalar ValueType's exceeds 31. 
llvm-svn: 103742
 2010-05-13 23:01:26 +00:00